hbox-docs: inventario por sitio

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_016X4CAujMuib2tDqt9JRg6X

CLAUDE.md

@@ -468,6 +468,7 @@ lote `2026-10-22_fota-4g`.
 **V5.6/V5.7 quick wins — T42a (2026-10-22, 17:00; Leo: «quick wins to make this board epic based on the audit files»).** `kicad/tools/t42a_v5_quickwins.py` (dry run by default; `--solo-bom`; drift checks on every field, track and via; idempotent; keeps the pristine `.T42abak`) — **applied: Leo chose D-22-7 (a) and ran it at 17:20; kicad 51a2cc6 with Rev6/Rev7 regenerated**. BOM (sch + pcb identical, parity unchanged): D10 SMBJ33A → **SMBJ33CA C83325** (Littelfuse; the audit's C8838 is not in JLC's DB and C2688178 had 39 pcs) · U15 MAX3232 → **TRS3232E C308878** (pin-compatible, ±15 kV) · ten 22 µF C86817 (16 V, 4 144 in stock < 430 × 10) → **C45783** (Basic, 25 V) · 10 nF C1589 → **C57112** (Basic; the audit's P-6 had the direction backwards) · C22 label → 10uF/50V (C138687 is 10 µF) · 1 k → C21190, 22 k Rdfu1/Rig1/Rig2 → C31850 (1 %, 75 V), 49.9 Ω → C23185, D6 → C81598 (Basic) · 40.2 k → C12447, 68 pF → C28262 (Preferred). Copper (both boards): `/IGN_IN` (raw machine ignition, ≤ 1.3 mA through Rig1 22 k) 15 In1 segments 1.0 → 0.3 mm (min clearance on In1 0.15 → 0.54 mm); its via by Rig1 → (131.605, 54.75) + F.Cu stub 0.5 mm (0.15 → 0.30 mm, /NTC_CELL on In2); a 0.34-mm In1 stub keeps the P1-side via connected; **V5.7 E-11:** second /SYS5V via (146.365, 86.15) + 0.5-mm B.Cu stub (D12 → MCU LDO, C101 and U12 EN no longer hang on one via). Verified on the Mac (Python 3.14, byte-identical to the cloud; twice): DRC with refill + parity identical to the audit (3 MOD1 errors; 96 / 98 warnings; 0 unconnected; 13 PWR_FLAG); refilled shas **b1313cd1 (V5.6) / 4e0a40f6 (V5.7)**; Gerber vs 13:00: masks, paste, silk, outline, NPTH identical, PTH 1 hole moved (+1 new on V5.7), copper changes only at the edits; BOM 226 / 229 parts in 107 / 115 rows. **New finding (T42b):** HV24 patterns `24V`, `IGN_IN`, `Q10_GATE` lack the leading «/», so only `/24V_IN` is HV24; /24V, /IGN_IN, /Q10_GATE (+ V5.7 /VIN_FUSED, /SW_PWRIN, /BOOT_PWRIN; V5.6 /SW_FAN, /BST_FAN) are checked at 0.15 mm — not an electrical risk at ≤ 32 V (IPC 0.05–0.13 mm), but the team's 0.5-mm rule was never applied. Fixed patterns + the v6 DRU (F-01) give 28 / 27 clearance errors, **14 / 15 after T42a** (V5.6: /24V near U2, /24V on In2, Cbst1, the IGN via; V5.7: /EN_PWRIN near /24V — U25 EN abs max 8.4 V —, 2 GND vias, the IGN via) → T42b by script before the 108/322. **D-22-7 (Leo):** (a) full T42a into the pilot (recommended, ≈ 40 min: script → kicad-cli refill + DRC → sha check → Fabrication Toolkit → commit) · (b) `--solo-bom` · (c) only D10. Canonical: `03-Architecture-Hardware/2026-10-22_Drogheda_Victorias-Rapidas_V5.6-V5.7_T42a_ES_v1.0.md` (site `hardware/v56-v57-victorias-rapidas-22oct/`); figure `img/2026-10-22_Drogheda_V5.6-V5.7-T42a_v1.0.png`; test copies `kicad/_to_delete/audit-20261022/qw/`; lote `2026-10-22_t42a-v5`.
 **Designators in order — T43 (2026-10-22, evening; Leo: «designators … ordered connectors and resistors … I don't want to skip numbers … make sure the board reflects the version», D-22-8).** `kicad/tools/t43_renumber.py` (`plan` / `apply`, backups `*.T43bak`; per-board rules for labels and rewritten/protected notes at the top) + `kicad/tools/t43_check.py` (token-by-token diff + `--kicad`: netlist through the table, ERC, DRC with parity and refill, before vs after). Standard prefixes only (C R D J U L Q F JP K MH MOD SW TP Y; Rcomp/Rfreq/Rig/RS… → R, Cbst/Ccomp/Cu → C, DB/Dbk/DzG/D4G1 → D, SW4G1 → SW), **all connectors J** (P*, J*, H4), no gaps. **V5.6/V5.7 share numbering** by V5.6 position (5-mm rows top→bottom, left→right): 235 shared parts (same symbol UUID, or C129/C130 added separately — now C59/C63) keep the same designator on both; board-only parts go last in their prefix (U15 = MP1584 fan buck on V5.6, TPS54360B on V5.7). v6 by its own position (parallel agent): 366/376 change. PWR_FLAG PF* → #FLG01… — **KiCad counted the PF refs as real parts without footprint: those were the "normal" 13/13/19 parity errors → now 0**. Labels: V5.6/V5.7 MODEM_EN_U7 → MODEM_EN_U13, Q10_GATE → Q6_GATE, Q6_BASE → Q5_BASE; v6 Q10_GATE → Q9_GATE, **Q23_GATE → Q10_GATE** (the name now means another net), Q22_BASE → Q2_BASE, Q6_BASE → Q4_BASE (HV24 patterns follow). DRU: V5.6 U2 → U15; V5.7 dead U2 exception removed; v6 U2/U20/U25 → U15/U4/U22. V5.7 silk «IGN 24V» → «IGN 12-24V»; title blocks dated 2026-10-22 + T43 comment; v6 title block now «EINARBoard HBOX v6» rev 6.0. Verified: netlist/ERC/DRC identical through the table, refill byte-identical, BOM/CPL identical part by part, Gerber geometry identical except F_Silkscreen. Commits: kicad **e13d074** (V5.6/V5.7 + packages; made by the 18:00 `projects-sync` LaunchAgent, hence the generic message) and **a08e49a** (v6 + DRU single-pass fix). **Open: D-22-9 (Leo)** — designators are 0.5 mm with 0.1 mm stroke, below JLC's 0.8 / 0.15 minimum (recommended 1.0 / 0.2); proposal (a) pilot as is with the designator maps, (b) 0.8 / 0.15 in the T42b pass. Docs dated before 22-oct use the old numbering. Canonical: `03-Architecture-Hardware/2026-10-22_Drogheda_Designadores-T43_V5.6-V5.7-v6_ES_v1.0.md` (site `hardware/designadores-t43-22oct/`) + CSVs `2026-10-22_Drogheda_T43_{V5.6-V5.7,v6}_viejo-nuevo.csv` + maps `img/2026-10-22_Drogheda_{V5.6,V5.7,v6}-Designadores-T43_v1.0.png`; test copies `kicad/_to_delete/audit-20261022/t43/` and `t43-v6/`; lote `2026-10-22_t43-designadores`.
 **22–23-oct: living docs in T43 numbering, T44 silkscreen, one design document per board (Leo, 22-oct 18:56: "make sure that all documentation … has the correct reference on new designators, … an engineering document for each of the board … update the v6 designators").** Done by four agents overnight; the cloud container restarted twice, so integration slipped to 23-oct morning. **Living docs (T43b):** V5.6 datasheet + pinout (harness doc), pinmap-v6, manuals, site pages (producción/taller/descargas) and the `board_v56.h` comments (code identical) now use T43 designators; V5 bench procedures keep V5.5 numbering plus a V5.5→V5.6/V5.7 table; 54 dated docs got a banner (absolute link when the doc is not on the site); V5.5/V4/V3 untouched; 23 Project copies refreshed (parent `d70dd80`, firmware `18a9f82`, kicad `2895871`, hbox-docs `4c0b98c`). **T44** (`kicad/tools/t44_serigrafia.py`: dry run by default, `--apply` demands a byte-identical simulation, `.T44bak`; geometry from pcbnew, edits only `(at)`/`(size)`/`(thickness)`): silk designators 0.5/0.1 → **0.8/0.15 mm** (JLC minimum) placed next to their own part, no part moved, no copper; `.kicad_dru` text ≥ 0.8/0.15 on F and B silk; `.kicad_pro` silk defaults 0.8/0.15 applied to footprint fields. **D-22-9 = (b) on all three** (v6: Leo 22-oct night; V5.6/V5.7: Leo 23-oct 08:53, pilot included). v6 `bd27501`: 338/350 placed, 12 left at 0.5 mm for Michelle (C44, C63, C101, C111, C112, R38, R58, R63, R64, R65, R98, TP6 + «IGN 12-24V»), DRC errors 11 unchanged, silk overlaps 17 → 4. V5.6 239/239 and V5.7 244/244 (`93d13e3`), DRC identical (3 MOD1), Rev6/Rev7 regenerated: only `F_Silkscreen.gto` changes (copper, masks, paste, drills, BOM, CPL identical). **T44b** (23-oct 09:15): 0.10 mm between texts let neighbours read as one word («R31R32R33»), so `CL_TXT` = 0.40 mm between a designator and any other text; V5.6/V5.7 re-run (44 more moved each, 0 leftovers, `d19c832`), Rev6/Rev7 regenerated again (only `F_Silkscreen.gto`); v6 waits for the layout close (would leave 17 instead of 12). Re-run T43 then T44 when the v6 layout closes; no hand placement of designators before that. **Design documents:** `03-Architecture-Hardware/2026-10-22_Drogheda_Documento-de-Diseno_{V5.6,V5.7,v6}_ES_v1.0.{md,pdf}` + `img/diseno-{V5.6,V5.7,v6}/` (site `hardware/diseno-v56|v57|v6/`, nav «Documentos de diseño»): 15 sections (ficha, changes, blocks, power tree, specs, MCU pins, connectors, schematic, PCB layers/3D/T43 map, test points, BOM, rules/DRC, risks/decisions, history, references), tables generated from the netlist, PCB and `board_v56.h`, plus the full schematic PDF. v6 plan rev 1.7. Lote `2026-10-23_t44-documentos-diseno` (closes d-22-9 and t-docs-designadores-t43; creates the bench-procedure/forms task for 0.7.0). Lessons: `device_commit_files` leaves files 600/700 → chmod 644 before publishing; long agent runs must checkpoint to a PROGRESS file (results survived the restarts in the work dir and transcripts). Canonical: `03-Architecture-Hardware/2026-10-22_Drogheda_v6-T44-Serigrafia_ES_v1.0.md` (site `hardware/v6-t44-serigrafia/`).
+**Inventory per site (2026-10-23, 10:50; Leo: «an inventory page for every website to see installation material»).** `/tableros/inventario/` now has a tab per site (ICAVE · TIMSA · EIT · LCT · Querétaro) plus «Todo»: what is on site, what is on its way there and — for items with «Por instalación» > 0, the installation kit — what is missing to install *N* units. Every inventory movement carries `sitio` (older ones count as Querétaro; no migration, totals unchanged); new types `envio` (leaves a site and stays «en camino»; origin `fuera` = a purchase in transit or material shipped before anyone counted it, e.g. EIT's material from Manzanillo) and `recepcion` («Recibir» in the destination tab; a shortfall comes off the total with the receiver's name). New item category `instalacion` (brackets, hardware, power cable). Instalaciones got a «Material» button to the site's tab. `backend/app.py` changed → `restart actas-hbox`; tests `hbox-docs/backend/tests-1023.sh` (35) and `tests-1013.sh` (65) pass. Team rules: `docs/inventario/index.md` (who registers what per site; kit starting point from the shipping and installation actas). Lote `2026-10-23_inventario-sitios`: `t-kit-instalacion` (Adriana + Leo), `t-conteo-sitios` (Alán, Jesús Honorato, Miguel, Antonio), Querétaro count `t-inventario-inicial`, notes on `t-eit-material`, `t-lct-herreria`, `t-ferreteria-eit-timsa`.
 
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hbox-docs

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