diff --git a/03-Architecture-Hardware/2026-08-12_Drogheda_EinarBoard-3.0_MCU-Integration_Design-Brief_v1.0.md b/03-Architecture-Hardware/2026-08-12_Drogheda_EinarBoard-3.0_MCU-Integration_Design-Brief_v1.0.md new file mode 100644 index 0000000..f36c9a2 --- /dev/null +++ b/03-Architecture-Hardware/2026-08-12_Drogheda_EinarBoard-3.0_MCU-Integration_Design-Brief_v1.0.md @@ -0,0 +1,188 @@ +--- +title: EinarBoard 3.0 — On-Board MCU Integration — Design Brief & Execution Prompt +tags: [project-drogheda, hardware, einarboard, mcu-integration, stm32f411, dfu, design-brief, prompt] +project: Project Drogheda +author: Helgen CTO + Claude (decisions locked 2026-08-12) +date: 2026-08-12 +status: Active — THE prompt for the 3.0 design sessions. Read this first, then execute the phases in §10. +authority: supplements [[watchdog-electrical-design-state]] (canonical) + the 1.1 brief (as executed in v4 = EinarBoard 2.0); where they conflict on 3.0 scope, THIS file wins. +--- + +# EinarBoard 3.0 — Design Brief ("the prompt") + +> **How to use this doc.** Self-contained instruction set for turning `hbox-watchdog-v4` +> (EinarBoard 2.0, as sent to fab ~2026-08-01, git `b505cb3`) into **EinarBoard 3.0** +> (`kicad/hbox-watchdog-v5`). Standing rules unchanged from the 1.1 brief: **file-level +> KiCad edits only** (KiCad MCP backend clobbered disk state 2026-07-24 — read-only MCP +> queries are fine); git checkpoint after every phase; verify every structural edit with an +> independent parse; bench gates unchanged. + +## 0. Decisions locked 2026-08-12 (Leo) + +| Topic | Decision | +|---|---| +| MCU | **On-board STM32F411RET6 (LQFP64)** replaces the Blackpill module + J1/J2 sockets | +| Flash path | **USB DFU on a board-mounted USB-C** (BOOT0 + NRST buttons on-board, Blackpill parity) + SWD recovery pads | +| Base | `hbox-watchdog-v4` (EinarBoard 2.0: W5500 Ethernet, SC16IS752 serial, PCF8574 expander — all kept) | +| Modem / GNSS | **Stay modular** — XBee socket + simpleRTK2B Pro shield (stock already purchased) | +| Fixation | Shield **bolted through its UNO-pattern holes** into matching EinarBoard holes (M2.5); **2× M2.5 holes near the XBee** for a heatsink that also clamps the modem | +| Fan | **2-pin fan only** — 4-pin header + tach conditioning removed, PB10 freed | +| Naming | Product **EinarBoard 3.0** · KiCad project **`hbox-watchdog-v5`** | + +## 1. Why the F411RET6 (and not something else) + +Same silicon family as the Blackpill's F411CEU6 → **firmware v2.3/v3.x runs unchanged**. +Only the build target moves: Arduino board = *Generic F411RE* (or a copied Blackpill +variant) with `HSE_VALUE = 25 MHz` — a build-config change, not a port. + +| | F411CEU6 (Blackpill chip) | **F411RET6 (chosen)** | G431CBT6 (rejected for now) | +|---|---|---|---| +| Package | UFQFPN48 (hot-air only) | **LQFP64 — hand-solder/rework OK** | LQFP48 | +| JLC price/stock (2026-08-12) | $3.31 · 1,333 (C2054095) | **$2.47 · 5,342 (C94355)** | $2.96 · 13,744 (C529355) | +| Extra pins | — | **PC0–PC12, PD2** (+ USART6 on PC6/PC7 = real 3rd UART; more ADC) | FDCAN (future CAN), crystal-less USB | +| Firmware | zero change | build-target change only | **full port — wrong timing mid-fleet** | + +The 1.1 brief's "F411 has no third USART" was a **48-pin-package** limitation (USART6 lives +on PA11/PA12 there = USB). On LQFP64 it's on PC6/PC7 — reserve them. If vehicle CAN ever +becomes a requirement: MCP2518FD on SPI, or a G4 port as its own project. +Source **genuine ST via LCSC/JLC only** — the ROM bootloader behavior is the product feature. + +## 2. ⚠ THE BOOT TRAP — read before touching pins + +DFU entry on the F411 requires, at reset: **BOOT0 = 1 AND BOOT1 (PB2) = 0** +(BOOT0=1 + PB2=1 boots SRAM = dead end). v4 has **`ETH_INT` (W5500 INTn) on PB2**, per the +1.1 note "BOOT1: irrelevant with BOOT0=0; do not strap" — which was true only while the MCU +was a removable module. W5500 INTn **idles HIGH** → with the MCU soldered down, DFU would +be unreachable. Therefore in v5: + +- **Move `ETH_INT` PB2 → PC0** (EXTI0 is free: PA0/PB0 don't use EXTI). +- **Strap PB2 → 10 k → GND.** Nothing else on PB2, ever. +- ROM bootloader also listens on **USART1 (PA9/PA10)** = the Modo-B pins. Flash with the + RTK stack unpowered (current practice) so F9P TX2 traffic can't capture the bootloader; + if field-reflash-with-stack-on is ever needed, add a series jumper on the PA10 tap then. + +DFU bootloader clocking: the F411 has **no HSI48** — the ROM bootloader derives the 48 MHz +USB clock from the **external HSE crystal (4–26 MHz, auto-detected)**. Our 25 MHz HSE is +therefore **mandatory, not optional** (AN2606; same reason the Blackpill carries one). + +## 3. NEW Block P — on-board MCU (Blackpill absorbed) + +**U14 STM32F411RET6** (LQFP64, JLC C94355). Support circuitry, Blackpill-parity where noted: + +- **HSE:** 25.000 MHz crystal (3225, CL 10–12 pF) + 2× load caps `C = 2(CL − C_stray)` + (≈15 pF for CL=10 pF; finalize per chosen crystal). Short symmetric traces, GND guard. +- **LSE:** 32.768 kHz (3215/2012, CL 12.5 pF, e.g. Q13FC-class) + caps per CL. Fit it + (Blackpill parity; RTC available). Firmware note: F411 LSE wants low drive level. +- **VCAP1:** 4.7 µF X5R ≥6.3 V at the pin (DS10314 — confirm value/pin in Phase A). +- **Decoupling:** 100 nF at **every** VDD pin + 4.7 µF bulk; **VDDA:** ferrite bead (or + 10 Ω) from 3V3 + 1 µF + 100 nF (BAT_SENSE/VEH5V/NTC ADC quality — free upgrade vs the + module's direct tie). **VBAT → 3V3** + 100 nF. +- **BOOT0:** dedicated pin → **10 k pull-down** + tact switch to 3V3 (+ optional 2-pin jig + pad). **PB2/BOOT1: 10 k pull-down (§2).** +- **NRST:** joins the existing `NRST` net (SW1 on-board + P10 external — already designed) + + 100 nF at the pin. +- **LEDs:** `LED_C13` **active-LOW** (3V3 → 1 k → LED → PC13, Blackpill polarity so v2.3+ + blink code is unchanged) + PWR LED on 3V3. +- **USB-C (J11):** 16-pin USB 2.0 receptacle (TYPE-C-31-M-12 class) on a case-reachable + edge. CC1/CC2 → 5.1 k to GND (UFP). D+ → PA12, D− → PA11 via **USBLC6-2SC6** ESD array. + Shield → GND via RC (1 MΩ ∥ 4.7 nF) or direct — decide Phase A. +- **SWD:** 4 pads/test-points (3V3, PA13 SWDIO, PA14 SWCLK, GND) — DNP header. With a + soldered MCU this is the brick-recovery + factory path; the 1.1 brief already wanted it. +- **PA0 note:** no KEY button (Blackpill's KEY is PA0 = our `BAT_SENSE`). Not a loss. + +## 4. Power — who makes 3V3 now + +The Blackpill's on-module LDO dies with the module, so: + +- **U15 LDO 3V3:** AMS1117-3.3 (SOT-223, JLC Basic C6186) — or equal ≥500 mA. Budget: + MCU ~50 mA + SHT40 + TMP102 + PCF8574 + SC16IS752 + MAX3232 + SP3485 TX bursts ≈ + 150–250 mA worst → 1 A part with margin, ~0.3 W dissipation OK in SOT-223. +- **Input OR:** `LDO_IN = MAIN5V (via D_or1 SS34) ∥ USB VBUS (via D_or2 SS34)`. + **Bench flashing on USB alone powers the 3V3 domain only** (MCU, sensors, expander, + serial bridge): W5500 (3V3_ETH from SYS5V) stays dark, K1 stays NC (corrections path + untouched), no backfeed into the LTC4040/MAIN5V. This replaces the module's + VBUS-to-5V tie with something that can't fight the backed-up rail. +- **Phase-A sweep:** every net the module's 3V3 pin used to source (I²C pull-ups, sensor + VDD, PCF8574, SC16IS752, IOREF row to MOD1, D5 clamp reference, NTC divider top…) moves + to the new LDO output net — keep the net name `3V3`. Verify with a netlist diff. +- 3V3_MODEM and 3V3_ETH bucks: **unchanged**. + +## 5. Fan — 2-pin, done + +- Fan connector → **2-pin** (`5V_FAN`, `FAN_RET`). Remove the 1×04 header, `FAN_TACH` / + `FAN_TACH_RAW` conditioning (pull-up/divider). Driver chain (PA6 `FAN_PWM` → Q → low-side) + and the U2 fan buck stay exactly as-is. +- **PB10 freed** (tach DNP provision retired — fleet fans are 2-wire, decided 2026-06-24). +- Firmware v3.0 already plans tach-less fan-fault inference (temp climbs while PWM high). + +## 6. NEW Block Q — fixation (mechanical) + +- **Shield bolts:** 4× holes in EinarBoard at **exactly MOD1's UNO-pattern hole coords** + (read the NPTH positions out of the `Arduino_UNO_R3` footprint in the v5 PCB — do not + re-derive from a drawing). Drill **Ø2.75 mm (M2.5)**; bolts pass shield → standoffs → + EinarBoard (→ optionally the mounting plate). **Bench check before freezing drill:** + caliper the real simpleRTK2B Pro holes — UNO-pattern boards are usually Ø3.2 (M3); if so + either keep M2.5 hardware (washers, slop is fine) or open ours to Ø3.2 and use M3. Keepout + annulus top/bottom, NPTH, no copper — and respect the HV24/inner-layer clearance rule. +- **XBee heatsink:** **2× M2.5 holes near J7/J8** so a small heatsink/bracket bolts down and + indirectly clamps the modem module. Position in Phase B with the case; keep clear of the + RF side of the socket and the 24 V copper. +- Case/plate: bolt pass-through and heatsink height ride the ASA reprint — coordinate + connector-edge plan (USB-C now needs an opening too) **before routing** (Phase B gate, + same as 1.1). + +## 7. Pin map delta (v4 → v5) + +| Pin | v4 (EinarBoard 2.0) | v5 (EinarBoard 3.0) | +|---|---|---| +| PB2 | `ETH_INT` (W5500 INTn) | **BOOT1 strap: 10 k → GND. Nothing else.** | +| PC0 *(new pin)* | — (module had no PC0) | **`ETH_INT`** | +| PB10 | tach DNP provision | **free** (fan is 2-pin) | +| PA13/PA14 | not broken out (module USB only) | **SWD pads** (DNP header) | +| PC6/PC7 *(new)* | — | **reserved: USART6** (future 3rd UART) | +| PC1–PC5, PC8–PC12, PD2 *(new)* | — | free — do not spend without updating this table | +| PA11/PA12 | module USB | **J11 USB-C** D−/D+ | +| everything else | per [[watchdog-electrical-design-state]] §2 + 1.1 blocks M/N/O | **unchanged** | + +## 8. Depopulation / cleanup (3.0) + +REMOVE: J1/J2 2×20 sockets + Blackpill-L/R symbols and footprint (→ **errata E-J1 retired +by construction** — no module, no mirroring, no "never power a seated module" hazard); +1×04 fan header + tach parts; stale Blackpill silkscreen (module outline, header labels). +KEEP: SW1 + P10 reset, P11 (jumper plug), P12 NTC, J7/J8 XBee, MOD1 shield sockets, J7 USB +modem-config path. SILKSCREEN: USB-C "DFU: hold BOOT0" hint, SWD pad labels, hole callouts +(M2.5), fan "2-pin 5V". + +## 9. Risks / open items + +- **PB2 strap is load-bearing** (§2) — make it a Phase-D ERC-notes item like the SC16IS + address strap was in 1.1. +- LQFP64 symbol/footprint: use KiCad lib `MCU_ST_STM32F4:STM32F411RETx` + + `Package_QFP:LQFP-64_10x10mm_P0.5mm`; save copies into the project libs (same policy as + the RevNum_EJ1 footprint). +- Blackpill variant nuances: confirm `Generic F411RE` Arduino variant boots USB CDC as + today's build does (bench item F-1 on first article; SWD pads are the net if it doesn't). +- Shield hole diameter verify (§6). · LSE drive/caps verify on first article. +- DFU with stack powered = USART1 capture risk (§2) — procedure note, not hardware. +- v4 boards at fab: 3.0 starts now as design work; nothing in 3.0 blocks v4 bring-up, and + v4 bench findings (modem rail, LTC4040 timer behavior) feed Phase D review. + +## 10. Execution phases (each ends: git commit + parse-verify + snapshot) + +- **A. Schematic** — copy v4 → `hbox-watchdog-v5` (done 2026-08-12 with this brief); + Block P + LDO OR (§3/§4); ETH_INT move + PB2 strap (§2); 3V3 net sweep (§4); fan 2-pin + (§5); depop §8; ERC = 0. +- **B. Outline & placement** — reclaim the Blackpill socket area; USB-C edge + case plan; + Block-Q holes (shield coords from MOD1 footprint; XBee heatsink pair); **Gate: Leo + approves connector-edge + hole plan before routing.** +- **C. Routing** — MCU fanout (crystal + USB first), re-route displaced nets, zones refill; + HV24 rules stand. +- **D. Verify** — ERC/DRC clean; strap/boot checklist (BOOT0 pull-down, PB2 low, HSE + present = DFU truth table); netlist diff v4→v5 reviewed; SVG/PDF review pack for Leo. +- **E. Outputs** — gerbers/BOM/CPL, LCSC pass (C94355 + new passives/USB-C/LDO), delta-doc + §-update, PINOUT.md rewrite (RET6 + freed pins), errata page (E-J1 retired), firmware + ticket: build target Generic F411RE + HSE flag + PC0 EXTI for ETH_INT. + +*Fab gate unchanged: v5 doesn't go out before a v4-lineage bench validates the power path, +and first-article v5 must prove **USB DFU enumeration + a full flash cycle** before any +fleet quantity.* diff --git a/03-Architecture-Hardware/hbox-watchdog-v5-schematic.pdf b/03-Architecture-Hardware/hbox-watchdog-v5-schematic.pdf new file mode 100644 index 0000000..6f35631 Binary files /dev/null and b/03-Architecture-Hardware/hbox-watchdog-v5-schematic.pdf differ diff --git a/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_dru b/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_dru new file mode 100644 index 0000000..362e232 --- /dev/null +++ b/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_dru @@ -0,0 +1,48 @@ +(version 1) + +# hbox-watchdog v4 — design rules +# +# Why three rules instead of one blanket minimum: +# +# The old file was a single unconditional (min 0.15mm). A custom rule outranks +# the netclass table, and an unconditional rule matches EVERY pair on the board, +# so it was silently overriding the HV24 netclass's 0.5 mm clearance everywhere. +# The netclass said 0.5; DRC was only ever enforcing 0.15. +# +# These three are mutually exclusive on the case that matters, so they give the +# same answer whether KiCad resolves by rule order or by specificity: +# +# 1. neither item is HV24 -> 0.15 mm (unchanged) +# 2. either item is HV24 -> 0.50 mm +# 3. except U2 pad-to-pad, its own land pattern -> 0.15 mm +# +# Rule 3 exists for exactly one pair. U2 is the MP1584EN buck (SOIC-8-EP): +# pad 7 (24V, 1.95 x 0.6) to pad 9 (the 2.29 x 3.0 exposed thermal pad, GND) is +# 0.355 mm, and that is the manufacturer's qualified land pattern — it is set by +# the package, not by routing, so no amount of rerouting can open it. Scoping +# the exception to Pad-to-Pad inside U2 keeps it from relaxing anything else: +# measured on this board, U2's courtyard contains 9 pads and all 9 belong to U2, +# so this condition cannot match a foreign pad. The tracks and vias that pass +# through that courtyard are excluded by the A.Type/B.Type test and stay at the +# full 0.5 mm. +# +# HV24 = /24V_IN, 24V, IGN_IN, Q10_GATE (netclass_patterns in the .kicad_pro) +# +# Note: raising HV24 to 0.5 mm also widens the copper pour pullback around those +# nets, because a zone floods to max(its own clearance, the effective DRC +# clearance) — 0.3 mm before, 0.5 mm now. Press B to refill before running DRC. + +(rule "Minimum clearance 1" + (constraint clearance (min 0.15mm)) + (condition "A.NetClass != 'HV24' && B.NetClass != 'HV24'") +) + +(rule "HV24 clearance" + (constraint clearance (min 0.5mm)) + (condition "(A.NetClass == 'HV24' || B.NetClass == 'HV24') && !(A.Type == 'Pad' && B.Type == 'Pad' && A.memberOfFootprint('U2') && B.memberOfFootprint('U2'))") +) + +(rule "HV24 exception: MP1584EN land pattern" + (constraint clearance (min 0.15mm)) + (condition "A.Type == 'Pad' && B.Type == 'Pad' && A.memberOfFootprint('U2') && B.memberOfFootprint('U2')") +) diff --git a/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_pcb b/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_pcb new file mode 100644 index 0000000..02d312e --- /dev/null +++ b/03-Architecture-Hardware/kicad/hbox-watchdog-v5.kicad_pcb @@ -0,0 +1,54380 @@ +(kicad_pcb + (version 20260206) + (generator "pcbnew") + (generator_version "10.0") + (general + (thickness 1.6) + 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"7450b667-6175-4d30-b4c2-a98cc8d45852") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "C86") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 582.93 189.23) (xy 582.93 185.42) + ) + (stroke + (width 0) + (type default) + ) + (uuid "e0d23841-4879-4140-9668-76a747aab1d1") + ) + (label "RS232_C2P" + (at 582.93 185.42 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "e96bb7a5-b124-43b0-a62e-b403bdbec337") + ) + (wire + (pts + (xy 582.93 196.85) (xy 582.93 200.66) + ) + (stroke + (width 0) + (type default) + ) + (uuid "71406b3f-5c6a-491a-8218-ac2e00a21113") + ) + (label "RS232_C2N" + (at 582.93 200.66 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "1a52e2c0-4e8c-4c7f-ba38-f132674fd30a") + ) + (symbol + (lib_id "Device:C") + (at 588.01 193.04 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "7397d314-0c3b-4906-9485-5c6a8ad7c953") + (property "Reference" "C87" + (at 585.01 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "100nF" + (at 591.01 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0603_1608Metric" + (at 588.01 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 588.01 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 588.01 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "a853403a-41a9-4841-915b-6ebb6b73bb83") + ) + (pin "2" + (uuid "8c918f16-4f0f-4d83-9015-c27fe0c718ae") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "C87") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 588.01 189.23) (xy 588.01 185.42) + ) + (stroke + (width 0) + (type default) + ) + (uuid "43083738-3f68-4ff9-aa96-d5fbc3413053") + ) + (label "RS232_VP" + (at 588.01 185.42 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "df0febbf-ab68-4622-931f-124555212a54") + ) + (wire + (pts + (xy 588.01 196.85) (xy 588.01 200.66) + ) + (stroke + (width 0) + (type default) + ) + (uuid "3a5647fe-ebb2-4fd1-93f0-ff5738c161a0") + ) + (label "GND" + (at 588.01 200.66 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "f49d2593-9d31-4bef-885d-05771c96a685") + ) + (symbol + (lib_id "Device:C") + (at 593.09 193.04 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "a4fc67e9-1144-4965-a835-43f2e0b48aad") + (property "Reference" "C88" + (at 590.09 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "100nF" + (at 596.09 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0603_1608Metric" + (at 593.09 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 593.09 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 593.09 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "adcfdd8d-ac93-4284-8adf-b21722f78612") + ) + (pin "2" + (uuid "e959e61b-eb51-4bbd-bcba-6acb954dfe93") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "C88") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 593.09 189.23) (xy 593.09 185.42) + ) + (stroke + (width 0) + (type default) + ) + (uuid "83b65e3e-9b42-4a51-aeb7-b791e536b2dd") + ) + (label "RS232_VN" + (at 593.09 185.42 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "3f63d3c9-cb27-4031-a679-2ba4899bfd76") + ) + (wire + (pts + (xy 593.09 196.85) (xy 593.09 200.66) + ) + (stroke + (width 0) + (type default) + ) + (uuid "f7509b98-4ae6-4035-9288-5938c879f3d8") + ) + (label "GND" + (at 593.09 200.66 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "60f49131-8aa5-44be-b633-42b4041046c1") + ) + (symbol + (lib_id "Device:C") + (at 598.17 193.04 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "55af6bcc-a386-410e-89d8-a57a7f28c0bb") + (property "Reference" "C89" + (at 595.17 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "100nF" + (at 601.17 190.04 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0603_1608Metric" + (at 598.17 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 598.17 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 598.17 193.04 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "5af2b762-869c-4824-ab95-da5ec2fbc135") + ) + (pin "2" + (uuid "28194121-e036-4976-bb05-f892c5791900") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "C89") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 598.17 189.23) (xy 598.17 185.42) + ) + (stroke + (width 0) + (type default) + ) + (uuid "d97bfd0c-96c8-409f-8a71-3d2345f9304a") + ) + (label "3V3" + (at 598.17 185.42 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "b7d85ee3-7c31-406e-ad69-9ad9950f5975") + ) + (wire + (pts + (xy 598.17 196.85) (xy 598.17 200.66) + ) + (stroke + (width 0) + (type default) + ) + (uuid "e7872bc3-b02e-4a0d-99d0-5d124d5a9a27") + ) + (label "GND" + (at 598.17 200.66 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "8b388182-5fef-4289-ac71-492745a1850b") + ) + (symbol + (lib_id "Connector_Generic:Conn_01x03") + (at 650.24 204.47 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "fcc08237-78df-47bc-a41e-19545ce01e19") + (property "Reference" "P16" + (at 647.24 201.47 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "RS232_OUT" + (at 653.24 201.47 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Connector_Phoenix_MC:PhoenixContact_MC_1,5_3-G-3.5_1x03_P3.50mm_Vertical" + (at 650.24 204.47 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 650.24 204.47 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 650.24 204.47 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "e920cfa5-2c18-4de6-a29b-0c53b4ee2a7a") + ) + (pin "2" + (uuid "b3141b5a-ea77-458c-b4bf-e6dbdc2180ec") + ) + (pin "3" + (uuid "837b3df1-ff17-472b-b5d1-64199c2482d1") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "P16") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 645.16 201.93) (xy 641.35 201.93) + ) + (stroke + (width 0) + (type default) + ) + (uuid "c91f8275-f3c1-4f08-bfea-1759eccaf40f") + ) + (label "RS232_TX" + (at 641.35 201.93 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "eee5db71-42ba-4b4f-b077-2cfddf71304e") + ) + (wire + (pts + (xy 645.16 204.47) (xy 641.35 204.47) + ) + (stroke + (width 0) + (type default) + ) + (uuid "c8a0e71f-cf32-449f-81b4-2dc85befbdd8") + ) + (label "RS232_RX" + (at 641.35 204.47 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "516a4824-78da-42c5-96cc-5ea1ea9bf4e2") + ) + (wire + (pts + (xy 645.16 207.01) (xy 641.35 207.01) + ) + (stroke + (width 0) + (type default) + ) + (uuid "0a560b93-a4ae-4927-addd-00f5fc0a7cc8") + ) + (label "GND" + (at 641.35 207.01 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "97a58a11-2fb5-4d8d-bf09-358927464ddf") + ) + (symbol + (lib_id "Connector_Generic:Conn_01x04") + (at 650.24 229.87 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "5622e795-a27b-4bdc-a77d-5a82957a2148") + (property "Reference" "H4" + (at 647.24 226.87 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "TTL_UARTB" + (at 653.24 226.87 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical" + (at 650.24 229.87 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 650.24 229.87 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 650.24 229.87 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Note" "3V3 TTL tap of ChB. Do not use together with RS-232." + (at 650.24 229.87 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "91411e4d-d225-4037-8c79-78cbd3388f88") + ) + (pin "2" + (uuid "1f22002f-294e-490c-906b-3fe1eb753b9f") + ) + (pin "3" + (uuid "056a8ead-c33c-4dc6-a550-a53cf72ad4c8") + ) + (pin "4" + (uuid "e541cf38-19bb-4685-97f7-446ce447ef1e") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "H4") + (unit 1) + ) + ) + ) + ) + (wire + (pts + (xy 645.16 227.33) (xy 641.35 227.33) + ) + (stroke + (width 0) + (type default) + ) + (uuid "76611f8e-7e47-4b0a-ab18-2daa1c8fbbd4") + ) + (label "3V3" + (at 641.35 227.33 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "1efa51c2-cb25-4eb2-a8dc-f75e86c2f21b") + ) + (wire + (pts + (xy 645.16 229.87) (xy 641.35 229.87) + ) + (stroke + (width 0) + (type default) + ) + (uuid "d7e423c0-1f26-4714-a998-38c1d1dd5fde") + ) + (label "SER_TXB" + (at 641.35 229.87 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "bad673e5-d13b-4d47-bb0f-95951fe817e4") + ) + (wire + (pts + (xy 645.16 232.41) (xy 641.35 232.41) + ) + (stroke + (width 0) + (type default) + ) + (uuid "746fb774-a6f1-484e-95df-4eadcf095bc1") + ) + (label "SER_RXB" + (at 641.35 232.41 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "d1d05154-2e8d-4f20-8673-9e13887d780e") + ) + (wire + (pts + (xy 645.16 234.95) (xy 641.35 234.95) + ) + (stroke + (width 0) + (type default) + ) + (uuid "a5164ed7-c519-4650-95aa-3da549cde46e") + ) + (label "GND" + (at 641.35 234.95 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "4e206041-49d0-4917-a83f-4afbb6d1064f") + ) + (text "BLOCK N - Ethernet W5500 on SPI2 (PB13/14/15 + CS PB12, RST PA15, INT PC0 (3.0: PB2 = BOOT1 strap — never repurpose)). 3V3_ETH from SYS5V buck U12 - NEVER 3V3_MODEM (must survive stack power-cycles). VERIFY vs W5500 ref v1.1.0: RSVD23=GND, RSVD38-42 open, VBG open, TOCAP/1V2O caps, 49R9+6.8nF magjack termination." + (at 690 30 0) + (effects + (font + (size 1.6 1.6) + ) + (justify left bottom) + ) + (uuid "11355d7b-d431-4314-b1f4-1aa39b73c104") + ) + (symbol + (lib_id "Interface_Ethernet:W5500") + (at 720.09 100.33 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "cbb8c345-a480-4a2e-8fb4-65ecaa8d4eba") + (property "Reference" "U11" + (at 717.09 97.33 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "W5500" + (at 723.09 97.33 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Package_QFP:LQFP-48_7x7mm_P0.5mm" + (at 720.09 100.33 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 720.09 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LED pins 9-12 mapped G+/G-/Y+/Y- - VERIFY vs HR911105A datasheet. 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826.77 85.09 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "931244c3-8cc7-4292-926b-efbbbbafb228") + ) + (wire + (pts + (xy 822.96 82.55) (xy 826.77 82.55) + ) + (stroke + (width 0) + (type default) + ) + (uuid "b3d1454f-081a-4a54-ac57-7da0d379c142") + ) + (label "ETH_ACTLED" + (at 826.77 82.55 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "f983014b-1fec-4006-8712-ea3dc221466e") + ) + (wire + (pts + (xy 779.78 87.63) (xy 775.97 87.63) + ) + (stroke + (width 0) + (type default) + ) + (uuid "f27da376-6eb7-4ca0-a67d-8e3d2f5125eb") + ) + (label "ETH_TXN" + (at 775.97 87.63 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "d920599e-a7ad-4954-94b7-bcb460e708ca") + ) + (wire + (pts + (xy 779.78 90.17) (xy 775.97 90.17) + ) + (stroke + (width 0) + (type default) + ) + (uuid "50aa9a6d-426f-45ea-920f-3d04822d6d61") + ) + (label "ETH_RXP" + (at 775.97 90.17 0) + (effects + (font + (size 1.27 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(do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 177.8 213.106 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 177.8 213.106 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "af8594c5-cb44-42a8-a52d-7207713186aa") + ) + (pin "2" + (uuid "38326ae2-ac08-44e2-913a-8677ddbd624c") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "P6") + (unit 1) + ) + ) + ) + ) + (label "5V_FAN" + (at 232.41 149.86 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "40b43700-d9e5-4326-a445-85c30ec1b6b7") + ) + (label "FAN_RET" + (at 232.41 152.4 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "b25a040e-9846-4e6c-86ee-d187fe9b4f4e") + ) + (text "BLOCK P - ON-BOARD MCU (EinarBoard 3.0). STM32F411RET6 LQFP64 replaces Blackpill+J1/J2. DFU: hold BOOT0, tap NRST -> USB. HSE 25MHz REQUIRED for ROM-bootloader USB clock (AN2606). PB2=BOOT1 strapped LOW via R99 - NEVER repurpose PB2. Bench flash: USB powers 3V3 domain only via D13 (SYS5V dark, K1 stays NC)." + (exclude_from_sim no) + (at 420 372 0) + (effects + (font + (size 1.27 1.27) + ) + ) + (uuid "173ad499-0ca1-4911-9e3f-003f2bb6a474") + ) + (text "PC6/PC7 reserved: USART6 (3rd UART, future). Free: PA7, PB9, PB10, PC1-PC5, PC8-PC12, PD2. LED_C13 active-LOW (Blackpill parity). SWD: TP3-TP7 (SWDIO/SWCLK/NRST/GND/3V3)." + (exclude_from_sim no) + (at 420 377 0) + (effects + (font + (size 1.27 1.27) + ) + ) + (uuid "da9f3940-d9e0-43b3-8372-7b5b26b1d3e0") + ) + (symbol + (lib_id "power:PWR_FLAG") + (at 741.68 502.92 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "aa46c9f8-8409-4f42-9c0f-13fd201d228a") + (property "Reference" "PF14" + (at 207.772 213.106 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "PWR_FLAG" + (at 199.136 213.106 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 201.422 213.106 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 203.2 213.106 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 203.2 213.106 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "2a7e82b2-3aa7-492d-9ceb-e787d452b380") + ) + (instances + (project "hbox-watchdog-v5" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "PF14") + (unit 1) + ) + ) + ) + ) + (label "VDDA" + (at 741.68 502.92 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "ae0bc749-f391-4adc-8443-acd616c2c37d") + ) +) diff --git a/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_blockP_review.svg b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_blockP_review.svg new file mode 100644 index 0000000..b4340c1 --- /dev/null +++ b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_blockP_review.svg @@ -0,0 +1,498 @@ + + +3V3 +LED_C13 +LSE_IN +LSE_OUT +HSE_IN +HSE_OUT +NRST +ETH_INT +GND +VDDA +BAT_SENSE +PWR_CTRL +GNSS_TX +GNSS_RX +GND +3V3 +5V_SENSE +IGN_SENSE +FAN_PWM +EXT_LED +NTC_TEMP +BOOT1_STRAP +VCAP1 +3V3 +ETH_CS +ETH_SCK +ETH_MISO +ETH_MOSI +CHRG_EN +USART1_TX +USART1_RX +DFU_DM +DFU_DP +SWDIO +3V3 +SWCLK +ETH_RST +CHRG_STAT +CHRG_FAULT +BYP_CTRL +I2C_SCL +I2C_SDA +BOOT0 +SER_IRQ +3V3 +3V3 +BOOT0 +BOOT0 +GND +BOOT1_STRAP +GND +NRST +GND +3V3 +GND +3V3 +GND +3V3 +GND +3V3 +GND +VDDA +GND +3V3 +GND +VCAP1 +GND +VDDA +GND +3V3 +VDDA +HSE_IN +HSE_OUT +HSE_IN +GND +HSE_OUT +GND +LSE_IN +LSE_OUT +LSE_IN +GND +LSE_OUT +GND +3V3 +LED_C13_A +LED_C13 +LED_C13_A +3V3 +LED_PWR_A +GND +LED_PWR_A +SWDIO +SWCLK +NRST +GND +3V3 +LDO_IN +SYS5V +LDO_IN +DFU_VBUS +GND +3V3 +LDO_IN +LDO_IN +GND +3V3 +GND +LDO_IN +DFU_VBUS +GND +DFU_VBUS +DFU_CC1 +DFU_DP +DFU_DM +DFU_VBUS +GND +GND +DFU_VBUS +DFU_CC2 +DFU_DP +DFU_DM +DFU_VBUS +GND +GND +DFU_CC1 +GND +DFU_CC2 +GND +DFU_DP +GND +DFU_DM +GND +DFU_VBUS +GND + + + + + + + + + + + + + + + + + + +VBAT + +PC13 + +PC14 + +PC15 + +PH0 + +PH1 + +NRST + +PC0 + +PC1 + +PC2 + +PC3 + +VSSA + +VDDA + +PA0 + +PA1 + +PA2 + +PA3 + +VSS + +VDD + +PA4 + +PA5 + +PA6 + +PA7 + +PC4 + +PC5 + +PB0 + +PB1 + +PB2 + +PB10 + +VCAP1 + +VSS + +VDD + +PB12 + +PB13 + +PB14 + +PB15 + +PC6 + +PC7 + +PC8 + +PC9 + +PA8 + +PA9 + +PA10 + +PA11 + +PA12 + +PA13 + +VSS + +VDD + +PA14 + +PA15 + +PC10 + +PC11 + +PC12 + +PD2 + +PB3 + +PB4 + +PB5 + +PB6 + +PB7 + +BOOT0 + +PB8 + +PB9 + +VSS + +VDD +U16 +STM32F411RET6 + + + +SW2 +BOOT0 + + + +R98 +10k + + + +R99 +10k + + + +C104 +100nF + + + +C105 +100nF + + + +C106 +100nF + + + +C107 +100nF + + + +C108 +100nF + + + +C109 +100nF + + + +C110 +4.7uF + + + +C111 +4.7uF + + + +C112 +1uF + + + +R104 +10R + + + +Y3 +25MHz + + + +C113 +15pF + + + +C114 +15pF + + + +Y4 +32.768kHz + + + +C115 +12pF + + + +C116 +12pF + + + +R102 +1k + + + +D17 +LED C13 (blue) + + + +R103 +1k + + + +D18 +LED PWR (green) + + +TP3 +SWDIO + + +TP4 +SWCLK + + +TP5 +NRST + + +TP6 +GND + + +TP7 +3V3 + + + +D12 +SS34 + + + +D13 +SS34 + + + + +U17 +AMS1117-3.3 + + + +C117 +10uF + + + +C118 +22uF/16V + + +PF12 +PWR_FLAG + + +PF13 +PWR_FLAG + + + + + + + + + + + + + + + + +J11 +USB-C DFU + + + +R100 +5.1k + + + +R101 +5.1k + + + +D14 +PESD5V0S1BA + + + +D15 +PESD5V0S1BA + + + +D16 +PESD5V0S1BA +BLOCK P - ON-BOARD MCU (EinarBoard 3.0). STM32F411RET6 LQFP64 replaces Blackpill+J1/J2. DFU: hold BOOT0, tap NRST -> USB. HSE 25MHz REQUIRED for ROM-b +PC6/PC7 reserved: USART6 (3rd UART, future). Free: PA7, PB9, PB10, PC1-PC5, PC8-PC12, PD2. LED_C13 active-LOW (Blackpill parity). SWD: TP3-TP7 (SWDIO/ + \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseA_ERC-fix-note.md b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseA_ERC-fix-note.md new file mode 100644 index 0000000..2c8b413 --- /dev/null +++ b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseA_ERC-fix-note.md @@ -0,0 +1,34 @@ +# EinarBoard 3.0 — Phase A ERC pass: 17 errors → root causes & fixes (2026-08-12) + +Leo's KiCad 10 ERC (`v5-ERC.rpt`, 19:41): **17 errors / 369 warnings**. All 17 errors traced +to 3 root causes in the Phase A generator output; fixed file-level the same day. + +## Root causes + +1. **J11 origin 4 µm off-grid (15 of the 17 errors).** The USB-C DFU port was cloned from J9 + by coordinate-shifting. J9's origin is `(446.786, 278.638)` — a 3-decimal position — and the + clone placed labels at 2-decimal-rounded pin positions while the instance origin stayed at + `(660.396, 430.528)`. Every cloned label/NC missed its pin by a uniform **(+0.004, +0.002) mm**. + KiCad connectivity is exact (nanometer ints); the ERC report rounds to mils, so pin and label + *print* identical coordinates while not touching — 9 `pin_not_connected` + 6 `label_dangling`. + **Fix:** nudge J11's instance origin `(660.396 430.528)` → `(660.4 430.53)` — one edit aligns + every cloned label and NC exactly. **Lesson for future file-level work: never round coordinates + independently on both sides of a connection; verify with exact arithmetic, not 2-decimal floats.** +2. **PF3 vs U17 (1 error).** The 3V3 net carried a PWR_FLAG (PF3) from the socket era, when the + Blackpill's passive socket pin was the only "source". U17 (AMS1117) VO is a real Power-Output → + two power outputs on one net. **Fix:** PF3 + its stub wire + its 3V3 label deleted. +3. **VDDA undriven (1 error).** VDDA is fed through R104 (10 R, passive) so no power output reaches + U16's VDDA power-in pin. **Fix:** PF14 (PWR_FLAG) added on VDDA next to PF12/PF13. + +Bonus (warning-level): new P6's footprint was auto-derived as `JST_XH_B4B-XH-A_1x02…` — the JST +2-pin housing is **B2B**, not B4B → set `Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical`. + +## Verification (container, exact Decimal arithmetic — no rounding) + +- Unconnected pins whole-sheet: **0** · J11 pins unattached: **0** · sexp balance ✓ +- Expected next ERC: **0 errors**. Remaining warnings are baseline/pre-existing, notably: + 212× `lib_symbol_issues` — KiCad can't find the `power` library at + `/Applications/KiCad/KiCad.app/…/symbols//power.kicad_sym` (Mac lib-table config, worth fixing + once in KiCad prefs); ~148× `endpoint_off_grid` (v4 heritage); J10 RJ45 lib mismatch (known); + 3× `no_connect_connected` + 1 `unconnected_wire_endpoint` (pre-existing v4 items at + SW4G1/J9-hidden-pins area — candidates for a later cleanup pass, not introduced in 3.0). diff --git a/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseB2_placement.svg b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseB2_placement.svg new file mode 100644 index 0000000..4d0fd99 --- /dev/null +++ b/03-Architecture-Hardware/kicad/logs/2026-08-12_einarboard30_phaseB2_placement.svg @@ -0,0 +1,107690 @@ + + + +SVG Image created as 2026-08-12_einarboard30_phaseB2_placement.svg date 2026-08-11T21:04:29 + Image generated by PCBNEW + + + + + + + + +1 +1 + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/03-Architecture-Hardware/kicad/v5-ERC.rpt b/03-Architecture-Hardware/kicad/v5-ERC.rpt new file mode 100644 index 0000000..f37f1bd --- /dev/null +++ b/03-Architecture-Hardware/kicad/v5-ERC.rpt @@ -0,0 +1,534 @@ +ERC report (2026-08-11T19:57:12, Encoding UTF8) +Report includes: Errors, Warnings + +***** Sheet / +[lib_symbol_mismatch]: Symbol 'SW_Push' doesn't match copy in library 'Switch' + ; warning + @(1300 mils, 10900 mils): Symbol SW4G1 [SW_Push] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(2480 mils, 8910 mils): Wire, length 51 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(2481 mils, 8559 mils): Symbol Rcc1 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3250 mils, 12358 mils): Symbol R60 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3250 mils, 12658 mils): Vertical Wire, length 172 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3250 mils, 12830 mils): Symbol R61 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3250 mils, 13260 mils): Vertical Wire, length 130 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3253 mils, 12218 mils): Wire, length 139 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3362 mils, 11239 mils): Symbol C41 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(3362 mils, 11712 mils): Symbol C43 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(4000 mils, 8730 mils): Vertical Wire, length 80 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(4910 mils, 8190 mils): Symbol Dbk1 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(4958 mils, 10370 mils): Symbol JP2 Pin 1 [A, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5158 mils, 10700 mils): Vertical Wire, length 180 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5160 mils, 10700 mils): Horizontal Wire, length 2 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5160 mils, 10720 mils): Vertical Wire, length 20 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5509 mils, 10370 mils): Horizontal Wire, length 151 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5509 mils, 10370 mils): Symbol JP3 Pin 1 [A, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(5710 mils, 10710 mils): Wire, length 190 mils +[lib_symbol_mismatch]: Symbol 'L' doesn't match copy in library 'Device' + ; warning + @(6000 mils, 9000 mils): Symbol L2 [L] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(6060 mils, 10370 mils): Symbol JP4 Pin 1 [A, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(6060 mils, 10370 mils): Horizontal Wire, length 151 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(6260 mils, 10740 mils): Vertical Wire, length 220 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7000 mils, 8210 mils): Vertical Wire, length 30 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7000 mils, 8240 mils): Symbol R20 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7000 mils, 8540 mils): Vertical Wire, length 710 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7540 mils, 9250 mils): Symbol JP1 Pin 1 [A, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7940 mils, 7750 mils): Wire, length 7 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7940 mils, 7750 mils): Symbol R51 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7940 mils, 8050 mils): Vertical Wire, length 170 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7940 mils, 8220 mils): Symbol R52 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(7940 mils, 8520 mils): Vertical Wire, length 130 mils +[unconnected_wire_endpoint]: Unconnected wire endpoint + ; warning + @(7940 mils, 8520 mils): Vertical Wire, length 130 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(8604 mils, 10300 mils): Symbol R57 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(8600 mils, 10650 mils): Wire, length 50 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(8900 mils, 7550 mils): Wire, length 78 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(8976 mils, 7567 mils): Symbol C30 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(8950 mils, 7900 mils): Wire, length 43 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9076 mils, 10300 mils): Symbol R58 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9050 mils, 10800 mils): Wire, length 202 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9249 mils, 984 mils): Symbol P11 Pin 1 [Pin_1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9370 mils, 7567 mils): Symbol C31 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9350 mils, 7900 mils): Wire, length 39 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9449 mils, 8118 mils): Symbol R55 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9400 mils, 8500 mils): Wire, length 96 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9449 mils, 8590 mils): Symbol R50 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9450 mils, 9000 mils): Wire, length 110 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9548 mils, 10450 mils): Symbol TP1 Pin 1 [1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9600 mils, 10750 mils): Wire, length 304 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9830 mils, 8460 mils): Wire, length 159 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9921 mils, 8590 mils): Symbol R56 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9900 mils, 9050 mils): Wire, length 161 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10050 mils, 10750 mils): Wire, length 319 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9942 mils, 10450 mils): Symbol TP2 Pin 1 [1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10450 mils, 10700 mils): Wire, length 252 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10415 mils, 10450 mils): Symbol PF8 Pin 1 [Power output, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(9750 mils, 1300 mils): Horizontal Wire, length 730 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10480 mils, 1300 mils): Symbol P8 Pin 1 [Pin_1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10480 mils, 1400 mils): Horizontal Wire, length 80 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10900 mils, 10700 mils): Wire, length 266 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(10808 mils, 10450 mils): Symbol PF9 Pin 1 [Power output, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11449 mils, 2913 mils): Wire, length 73 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11449 mils, 3494 mils): Wire, length 84 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11450 mils, 2540 mils): Vertical Wire, length 20 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11450 mils, 2540 mils): Symbol RB3 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11450 mils, 3110 mils): Symbol RB4 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11480 mils, 2050 mils): Symbol RB2 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11480 mils, 2390 mils): Vertical Wire, length 40 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11590 mils, 1380 mils): Symbol RB1 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11590 mils, 1730 mils): Vertical Wire, length 50 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11611 mils, 4331 mils): Symbol SW1 Pin 1 [1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11611 mils, 5039 mils): Symbol P10 Pin 1 [Pin_1, Passive, Line] +[lib_symbol_mismatch]: Symbol 'SW_Push' doesn't match copy in library 'Switch' + ; warning + @(11811 mils, 4331 mils): Symbol SW1 [SW_Push] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11940 mils, 6428 mils): Symbol R53 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11940 mils, 6900 mils): Vertical Wire, length 172 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11940 mils, 6900 mils): Symbol R54 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(11940 mils, 7298 mils): Vertical Wire, length 98 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12200 mils, 3350 mils): Wire, length 63 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12552 mils, 1260 mils): Symbol DB1 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12552 mils, 1969 mils): Symbol DB2 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12552 mils, 2677 mils): Symbol DB3 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12552 mils, 3386 mils): Symbol DB4 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12740 mils, 6540 mils): Horizontal Wire, length 110 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12770 mils, 5590 mils): Symbol Rcomp2 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12770 mils, 5590 mils): Wire, length 18 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12770 mils, 5990 mils): Vertical Wire, length 100 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12770 mils, 5990 mils): Symbol Ccomp2 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12770 mils, 6290 mils): Wire, length 9 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12850 mils, 4990 mils): Symbol Rfreq2 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12850 mils, 5370 mils): Vertical Wire, length 80 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(12850 mils, 6540 mils): Symbol L6 Pin 1 [1, Passive, Line] +[lib_symbol_mismatch]: Symbol 'L' doesn't match copy in library 'Device' + ; warning + @(13000 mils, 6540 mils): Symbol L6 [L] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13150 mils, 7567 mils): Symbol C32 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13150 mils, 8039 mils): Symbol C34 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13150 mils, 6540 mils): Horizontal Wire, length 20 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13150 mils, 7910 mils): Wire, length 43 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13230 mils, 6890 mils): Wire, length 32 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13230 mils, 6890 mils): Symbol C35 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13230 mils, 7190 mils): Vertical Wire, length 40 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13260 mils, 3930 mils): Symbol Cbst2 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13260 mils, 4230 mils): Vertical Wire, length 70 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13543 mils, 7567 mils): Symbol C33 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13600 mils, 8028 mils): Symbol R40 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13600 mils, 7950 mils): Vertical Wire, length 78 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13600 mils, 8328 mils): Vertical Wire, length 172 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(13701 mils, 5992 mils): Symbol C40 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14010 mils, 9080 mils): Vertical Wire, length 30 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14010 mils, 9080 mils): Symbol R42 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14010 mils, 9380 mils): Vertical Wire, length 260 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14010 mils, 9640 mils): Symbol C24 Pin 1 [Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14010 mils, 10060 mils): Vertical Wire, length 120 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14910 mils, 9550 mils): Wire, length 8 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14918 mils, 9449 mils): Symbol P12 Pin 1 [Pin_1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(14920 mils, 9450 mils): Wire, length 2 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(15680 mils, 1540 mils): Symbol J7 Pin 1 [Pin_1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(16543 mils, 2257 mils): Wire, length 27 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(16570 mils, 1560 mils): Symbol J8 Pin 1 [Pin_1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17150 mils, 8440 mils): Horizontal Wire, length 650 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17150 mils, 8540 mils): Horizontal Wire, length 550 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17150 mils, 8690 mils): Horizontal Wire, length 450 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17150 mils, 8790 mils): Horizontal Wire, length 350 mils +[lib_symbol_mismatch]: Symbol 'SW_Push' doesn't match copy in library 'Switch' + ; warning + @(17200 mils, 19800 mils): Symbol SW2 [SW_Push] +[lib_symbol_mismatch]: Symbol 'Crystal' doesn't match copy in library 'Device' + ; warning + @(17200 mils, 20900 mils): Symbol Y3 [Crystal] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17290 mils, 11990 mils): Vertical Wire, length 120 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17500 mils, 9390 mils): Symbol Q7 Pin 1 [S, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17500 mils, 9540 mils): Vertical Wire, length 150 mils +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(17560 mils, 7660 mils): Symbol U7 [MP1584EN] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17590 mils, 11870 mils): Symbol J9 Pin A1 [GND, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17590 mils, 12000 mils): Vertical Wire, length 130 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17600 mils, 8690 mils): Vertical Wire, length 100 mils +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(17600 mils, 9090 mils): Symbol Q7 [AO4406A] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17600 mils, 9640 mils): Vertical Wire, length 250 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17700 mils, 8540 mils): Vertical Wire, length 250 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17700 mils, 9740 mils): Vertical Wire, length 350 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17800 mils, 8440 mils): Vertical Wire, length 350 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(17860 mils, 7560 mils): Symbol U7 Pin 1 [SW, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(18040 mils, 7345 mils): Symbol L7 Pin 1 [1, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(18040 mils, 7345 mils): Wire, length 280 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(18040 mils, 7817 mils): Symbol Dbk2 Pin 1 [K, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(18040 mils, 7817 mils): Wire, length 314 mils +[lib_symbol_mismatch]: Symbol 'L' doesn't match copy in library 'Device' + ; warning + @(18190 mils, 7345 mils): Symbol L7 [L] +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(18460 mils, 2050 mils): Symbol U6 [LTC4040EUFD] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(18460 mils, 3040 mils): Vertical Wire, length 90 mils +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(18470 mils, 4220 mils): Symbol MOD1 [SimpleRTK2B_Pro_Socket] +[lib_symbol_mismatch]: Symbol 'Crystal' doesn't match copy in library 'Device' + ; warning + @(18700 mils, 20900 mils): Symbol Y4 [Crystal] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19070 mils, 4720 mils): Symbol MOD1 Pin 14 [A5, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19160 mils, 1750 mils): Symbol U6 Pin 24 [VSYS, Passive, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19420 mils, 8170 mils): Wire, length 27 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19420 mils, 8170 mils): Symbol Q6 Pin 1 [B, Input, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19440 mils, 9390 mils): Symbol U4 Pin 1 [SCL, Input, Line] +[lib_symbol_mismatch]: Symbol 'STM32F411RETx' doesn't match copy in library 'MCU_ST_STM32F4' + ; warning + @(19700 mils, 17100 mils): Symbol U16 [STM32F411RETx] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19720 mils, 7970 mils): Vertical Wire, length 190 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19720 mils, 8380 mils): Vertical Wire, length 10 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19720 mils, 8380 mils): Horizontal Wire, length 3 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19723 mils, 8380 mils): Vertical Wire, length 117 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(19840 mils, 9940 mils): Vertical Wire, length 50 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(20020 mils, 7020 mils): Vertical Wire, length 160 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(20020 mils, 7180 mils): Symbol K1 Pin 1 [Passive, Line] +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(20060 mils, 10900 mils): Symbol U2 [MP1584EN] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(20060 mils, 11300 mils): Symbol U2 Pin 5 [GND, Power input, Line] +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(20060 mils, 11400 mils): Vertical Wire, length 100 mils +[endpoint_off_grid]: Symbol pin or wire end off connection grid + ; warning + @(20321 mils, 7992 mils): Symbol D6 Pin 1 [K, Passive, Line] +[lib_symbol_mismatch]: Symbol 'D' doesn't match copy in library 'Device' + ; warning + @(20471 mils, 7992 mils): Symbol D6 [D] +[lib_symbol_mismatch]: Symbol 'Crystal' doesn't match copy in library 'Device' + ; warning + @(21250 mils, 6600 mils): Symbol Y2 [Crystal] +[lib_symbol_issues]: Symbol 'PCF8574' not found in symbol library 'Interface_Expansion' + ; warning + @(22250 mils, 2350 mils): Symbol U13 [PCF8574] +[lib_symbol_mismatch]: Symbol 'SP3485EN' doesn't match copy in library 'Interface_UART' + ; warning + @(24000 mils, 5500 mils): Symbol U14 [SP3485EN] +[footprint_link_issues]: Footprint 'PhoenixContact_MC_1,5_3-G-3.5_1x03_P3.50mm_Vertical' not found in library 'Connector_Phoenix_MC' + ; warning + @(25600 mils, 5500 mils): Symbol P15 [Conn_01x03] +[footprint_link_issues]: Footprint 'PhoenixContact_MC_1,5_3-G-3.5_1x03_P3.50mm_Vertical' not found in library 'Connector_Phoenix_MC' + ; warning + @(25600 mils, 8050 mils): Symbol P16 [Conn_01x03] +[lib_symbol_mismatch]: Symbol 'AMS1117-3.3' doesn't match copy in library 'Regulator_Linear' + ; warning + @(26200 mils, 19800 mils): Symbol U17 [AMS1117-3.3] +[lib_symbol_mismatch]: Symbol 'Crystal' doesn't match copy in library 'Device' + ; warning + @(27350 mils, 6900 mils): Symbol Y1 [Crystal] +[lib_symbol_issues]: The current configuration does not include the symbol library 'Drogheda-sym' + ; warning + @(27550 mils, 9050 mils): Symbol U12 [MP1584EN] +[lib_symbol_mismatch]: Symbol 'L' doesn't match copy in library 'Device' + ; warning + @(28450 mils, 8750 mils): Symbol L8 [L] +[footprint_link_issues]: The current configuration does not include the footprint library 'Connector_RJ45' + ; warning + @(31500 mils, 3550 mils): Symbol J10 [RJ45_Hanrun_HR911105A_Horizontal] +[lib_symbol_mismatch]: Symbol 'RJ45_Hanrun_HR911105A_Horizontal' doesn't match copy in library 'Connector' + ; warning + @(31500 mils, 3550 mils): Symbol J10 [RJ45_Hanrun_HR911105A_Horizontal] + + ** ERC messages: 174 Errors 0 Warnings 174 + + ** Ignored checks: + - Global label only appears once in the schematic + - Four connection points are joined together + - SPICE model issue + - Assigned footprint doesn't match footprint filters diff --git a/03-Architecture-Hardware/kicad/~hbox-watchdog-v4.kicad_pcb.lck b/03-Architecture-Hardware/kicad/~hbox-watchdog-v5.kicad_pcb.lck similarity index 100% rename from 03-Architecture-Hardware/kicad/~hbox-watchdog-v4.kicad_pcb.lck rename to 03-Architecture-Hardware/kicad/~hbox-watchdog-v5.kicad_pcb.lck diff --git a/03-Architecture-Hardware/kicad/~hbox-watchdog-v4.kicad_pro.lck b/03-Architecture-Hardware/kicad/~hbox-watchdog-v5.kicad_pro.lck similarity index 100% rename from 03-Architecture-Hardware/kicad/~hbox-watchdog-v4.kicad_pro.lck rename to 03-Architecture-Hardware/kicad/~hbox-watchdog-v5.kicad_pro.lck diff --git a/scripts/2026-08-12_einarboard30_phaseA_gen_blockP.py b/scripts/2026-08-12_einarboard30_phaseA_gen_blockP.py new file mode 100644 index 0000000..b0452eb --- /dev/null +++ b/scripts/2026-08-12_einarboard30_phaseA_gen_blockP.py @@ -0,0 +1,630 @@ +#!/usr/bin/env python3 +""" +EinarBoard 3.0 — Phase A generator: Block P (on-board STM32F411RET6) into hbox-watchdog-v5.kicad_sch +File-level edit per project standing rule (no KiCad MCP backend writes). +Surgical text splice: deletions by byte-span, insertions at anchors. Independent re-parse + netlist diff after. +Run: python3 gen_blockP.py +""" +import re, sys, math, uuid, collections, json + +FN = sys.argv[1] if len(sys.argv) > 1 else 'hbox-watchdog-v5.kicad_sch' +src = open(FN, encoding='utf-8').read() +if 'STM32F411RETx' in src: + print('ABORT: U16/STM32F411RETx already present — idempotence guard'); sys.exit(1) + +# ---------------- sexp parser with byte spans ---------------- +def tokenize(s): + toks = []; i = 0; n = len(s) + while i < n: + c = s[i] + if c in ' \t\r\n': i += 1; continue + if c in '()': toks.append((c, i, i+1)); i += 1; continue + if c == '"': + j = i+1; buf = [] + while j < n: + if s[j] == '\\' and j+1 < n: buf.append(s[j:j+2]); j += 2; continue + if s[j] == '"': break + buf.append(s[j]); j += 1 + toks.append((('STR', ''.join(buf)), i, j+1)); i = j+1; continue + j = i + while j < n and s[j] not in ' \t\r\n()"': j += 1 + toks.append((('ATOM', s[i:j]), i, j)); i = j + return toks + +def parse(toks): + pos = [0] + def rd(): + t, a, b = toks[pos[0]] + if t == '(': + pos[0] += 1; lst = [] + while toks[pos[0]][0] != ')': lst.append(rd()) + _, _, e = toks[pos[0]]; pos[0] += 1 + return ('L', lst, a, e) + pos[0] += 1 + return ('T', t, a, b) + out = [] + while pos[0] < len(toks): out.append(rd()) + return out + +toks = tokenize(src) +doc = parse(toks)[0] +assert doc[0] == 'L' +def kids(e): return e[1] if e[0] == 'L' else [] +def tag(e): + k = kids(e) + if k and k[0][0] == 'T': return k[0][1][1] + return None +def sval(e): return e[1][1] if e[0] == 'T' else None +def span(e): return (e[2], e[3]) +def find_all(e, t): return [c for c in kids(e) if c[0] == 'L' and tag(c) == t] +def find1(e, t): + r = find_all(e, t); return r[0] if r else None +def fnum(e): + try: return float(sval(e)) + except: return None + +top = kids(doc) +root_uuid = sval(kids(find1(doc, 'uuid'))[1]) +libsym_el = find1(doc, 'lib_symbols') + +# ---------------- lib pin tables ---------------- +def lib_pins(libname): + for s in find_all(libsym_el, 'symbol'): + if sval(kids(s)[1]) == libname: + pins = [] + def walk(e): + for c in kids(e): + if c[0] == 'L': + if tag(c) == 'pin': + at = find1(c, 'at'); num = find1(c, 'number'); nm = find1(c, 'name') + pins.append(dict(x=fnum(kids(at)[1]), y=fnum(kids(at)[2]), + num=sval(kids(num)[1]), name=sval(kids(nm)[1]) if nm else '')) + else: walk(c) + walk(s) + return pins + raise KeyError(libname) + +# ---------------- collect elements ---------------- +symbols = find_all(doc, 'symbol') +wires = find_all(doc, 'wire') +labels = find_all(doc, 'label') +ncs = find_all(doc, 'no_connect') +juncs = find_all(doc, 'junction') +texts = find_all(doc, 'text') + +def sym_info(s): + lid = sval(kids(find1(s, 'lib_id'))[1]); at = kids(find1(s, 'at')) + ref = value = fp = None + for p in find_all(s, 'property'): + pk = kids(p) + if sval(pk[1]) == 'Reference': ref = sval(pk[2]) + elif sval(pk[1]) == 'Value': value = sval(pk[2]) + elif sval(pk[1]) == 'Footprint': fp = sval(pk[2]) + mir = find1(s, 'mirror') + return dict(lib_id=lid, ref=ref, value=value, fp=fp, x=fnum(at[1]), y=fnum(at[2]), + rot=(fnum(at[3]) if len(at) > 3 else 0) or 0, + mirror=sval(kids(mir)[1]) if mir else None, el=s) +SYMS = [sym_info(s) for s in symbols] +def by_ref(r): + m = [s for s in SYMS if s['ref'] == r] + assert len(m) == 1, f'ref {r}: {len(m)} matches' + return m[0] + +def R2(v): return round(v, 2) +def pin_world(inst, pins=None): + pins = pins or lib_pins(inst['lib_id']) + out = {} + for p in pins: + x, y = p['x'], -p['y'] + if inst['mirror'] == 'y': x = -x + if inst['mirror'] == 'x': y = -y + r = math.radians(inst['rot']) + out[p['num']] = (R2(inst['x'] + x*math.cos(r) + y*math.sin(r)), + R2(inst['y'] - x*math.sin(r) + y*math.cos(r))) + return out + +adj = collections.defaultdict(set) +wire_pts = {} +for w in wires: + pts = [(R2(fnum(kids(xy)[1])), R2(fnum(kids(xy)[2]))) for xy in find_all(find1(w, 'pts'), 'xy')] + wire_pts[id(w)] = pts + for a, b in zip(pts, pts[1:]): adj[a].add(b); adj[b].add(a) +lab_at = collections.defaultdict(list) # pos -> [(name, element)] +for L in labels: + at = kids(find1(L, 'at')) + lab_at[(R2(fnum(at[1])), R2(fnum(at[2])))].append((sval(kids(L)[1]), L)) +nc_at = {} +for n in ncs: + at = kids(find1(n, 'at')); nc_at[(R2(fnum(at[1])), R2(fnum(at[2])))] = n +junc_at = {} +for jn in juncs: + at = kids(find1(jn, 'at')); junc_at[(R2(fnum(at[1])), R2(fnum(at[2])))] = jn + +# all pin positions of every symbol (for safety asserts + netlist) +ALLPINS = [] # (ref, pinnum, pos) +for s in SYMS: + try: + for num, p in pin_world(s).items(): ALLPINS.append((s['ref'], num, p)) + except KeyError: + pass +pin_pos_map = collections.defaultdict(list) +for ref, num, p in ALLPINS: pin_pos_map[p].append((ref, num)) + +# ---------------- netlist (union-find over positions + label names) ---------------- +def build_netlist(adjacency, labels_at, pinlist): + parent = {} + def find(a): + while parent.setdefault(a, a) != a: + parent[a] = parent[parent[a]]; a = parent[a] + return a + def union(a, b): parent[find(a)] = find(b) + for a, nbrs in adjacency.items(): + for b in nbrs: union(('P', a), ('P', b)) + for pos, lst in labels_at.items(): + for nm, _ in lst: union(('P', pos), ('N', nm)) + for ref, num, p in pinlist: union(('P', p), ('PIN', ref, num)) + groups = collections.defaultdict(lambda: dict(names=set(), pins=set())) + for a in list(parent): + r = find(a); g = groups[r] + if a[0] == 'N': g['names'].add(a[1]) + elif a[0] == 'PIN': g['pins'].add((a[1], a[2])) + nets = {} + for g in groups.values(): + if not g['names'] and not g['pins']: continue + nm = '/'.join(sorted(g['names'])) if g['names'] else None + if nm: nets.setdefault(nm, set()).update(g['pins']) + return nets +NET_BEFORE = build_netlist(adj, lab_at, ALLPINS) + +# ---------------- deletion set ---------------- +J1 = by_ref('J1'); J2 = by_ref('J2'); P6 = by_ref('P6'); Rts1 = by_ref('Rts1'); Rtp1 = by_ref('Rtp1') +assert J1['value'] == 'Blackpill-L' and J2['value'] == 'Blackpill-R' +assert P6['lib_id'].endswith('Conn_01x04') and P6['value'] == 'FAN' +del_syms = [J1, J2, P6, Rts1, Rtp1] +del_sym_ids = {id(s['el']) for s in del_syms} +seed_pins = [] +for s in del_syms: seed_pins += list(pin_world(s).values()) +seed_set = set(seed_pins) + +kept_pin_pos = {p for ref, num, p in ALLPINS if not any(by is s for s in [] )} +kept_pin_pos = set() +for s in SYMS: + if id(s['el']) in del_sym_ids: continue + try: kept_pin_pos.update(pin_world(s).values()) + except KeyError: pass + +# graph walk from seeds +gnodes = set() +stack = [p for p in seed_pins if p in adj] +while stack: + p = stack.pop() + if p in gnodes: continue + gnodes.add(p) + for q in adj[p]: + if q not in gnodes: stack.append(q) +# safety: deletion graph must not touch kept pins +touch = gnodes & kept_pin_pos +assert not touch, f'deletion graph touches kept pins at {sorted(touch)[:5]}' + +del_spans = [] +report = collections.defaultdict(list) +for s in del_syms: + del_spans.append(span(s['el'])); report['symbols_deleted'].append(f"{s['ref']} ({s['value']})") +for w in wires: + pts = wire_pts[id(w)] + if pts and all(p in gnodes for p in pts): + del_spans.append(span(w)); report['wires_deleted'].append(pts) +node_del = gnodes | seed_set +for pos, lst in lab_at.items(): + if pos in node_del: + for nm, el in lst: + del_spans.append(span(el)); report['labels_deleted'].append((nm, pos)) +# any FAN_TACH-family label anywhere (retired nets) +for pos, lst in lab_at.items(): + if pos not in node_del: + for nm, el in lst: + if nm in ('FAN_TACH', 'FAN_TACH_RAW'): + del_spans.append(span(el)); report['labels_deleted'].append((nm, pos, 'tach-sweep')) +for pos, el in nc_at.items(): + if pos in node_del: + del_spans.append(span(el)); report['nc_deleted'].append(pos) +for pos, el in junc_at.items(): + if pos in node_del: + del_spans.append(span(el)); report['junctions_deleted'].append(pos) + +# text patch: BLOCK N note (ETH_INT moved) +text_patches = [] +for t in texts: + tv = sval(kids(t)[1]) + if tv and 'INT PB2' in tv: + a, b = span(t) + text_patches.append((a, b, src[a:b].replace('INT PB2', 'INT PC0 (3.0: PB2 = BOOT1 strap — never repurpose)'))) + report['texts_patched'].append('BLOCK N note: INT PB2 -> INT PC0') + +# ---------------- templates from live file ---------------- +def label_template(pos): + for nm, el in lab_at[pos]: + a, b = span(el); return src[a:b], nm + return None, None +# LEFT-side sample: label on J1 pin15 (NTC_TEMP); RIGHT-side: label on J2 pin1 (ETH_CS) +J1p = pin_world(J1); J2p = pin_world(J2) +tmplL, _ = label_template(J1p['15']) +tmplR, _ = label_template(J2p['1']) +assert tmplL and tmplR + +def NU(): return str(uuid.uuid4()) +def mk_label(name, x, y, side): + """side: 'L' extends left, 'R' extends right, 'U' vertical up, 'D' vertical down""" + t = tmplL if side == 'L' else tmplR + # replace name, position, uuid in template + def rep(m): + return f'(at {x:g} {y:g} {ANG})' + ANG = {'L': 180, 'R': 0, 'U': 90, 'D': 270}[side] + out = re.sub(r'\(label "[^"]*"', f'(label "{name}"', t, count=1) + out = re.sub(r'\(at [^)]*\)', f'(at {x:g} {y:g} {ANG})', out, count=1) + out = re.sub(r'\(uuid "[^"]*"\)', f'(uuid "{NU()}")', out, count=1) + if side in ('R',): + out = re.sub(r'\(justify [^)]*\)', '(justify left bottom)', out, count=1) + elif side in ('L',): + out = re.sub(r'\(justify [^)]*\)', '(justify right bottom)', out, count=1) + else: + out = re.sub(r'\(justify [^)]*\)', '(justify left bottom)', out, count=1) + return out +def mk_nc(x, y): + return f'(no_connect\n\t\t(at {x:g} {y:g})\n\t\t(uuid "{NU()}")\n\t)' +def mk_text(txt, x, y): + e = texts[0]; a, b = span(e); t = src[a:b] + t = re.sub(r'^\(text "[^"]*(?:\\.[^"]*)*"', '(text ' + json.dumps(txt), t, count=1) + t = re.sub(r'\(at [^)]*\)', f'(at {x:g} {y:g} 0)', t, count=1) + t = re.sub(r'\(uuid "[^"]*"\)', f'(uuid "{NU()}")', t, count=1) + return t + +# generic instance factory from template R20 +R20 = by_ref('R20'); a, b = span(R20['el']); INST_TMPL = src[a:b] +def mk_instance(lib_id, ref, value, footprint, x, y, rot=0, pin_nums=None, extra_props=None): + t = INST_TMPL + t = re.sub(r'\(lib_id "[^"]*"\)', f'(lib_id "{lib_id}")', t, count=1) + t = re.sub(r'\(at [^)]*\)', f'(at {x:g} {y:g} {rot:g})', t, count=1) # first (at = instance + t = re.sub(r'\(property "Reference" "[^"]*"', f'(property "Reference" "{ref}"', t, count=1) + t = re.sub(r'\(property "Value" "[^"]*"', f'(property "Value" {json.dumps(value)}', t, count=1) + t = re.sub(r'\(property "Footprint" "[^"]*"', f'(property "Footprint" {json.dumps(footprint)}', t, count=1) + # property positions: drop to instance pos (KiCad re-autoplaces visually; positions cosmetic) + # fix property (at ...) occurrences AFTER the first: leave — cosmetic only. + # pins: template has pins "1","2" — rebuild pin uuid list for pin_nums + pin_nums = pin_nums or ['1', '2'] + pin_block = '\n'.join(f'\t\t(pin "{p}"\n\t\t\t(uuid "{NU()}")\n\t\t)' for p in pin_nums) + t = re.sub(r'(\t\t\(pin "1".*?\)\n)+.*?\t\t\(pin "2"\n\t\t\t\(uuid "[^"]*"\)\n\t\t\)', + pin_block, t, count=1, flags=re.S) + t = re.sub(r'\(reference "[^"]*"\)', f'(reference "{ref}")', t, count=1) + t = re.sub(r'\(uuid "a2b3658d[^"]*"\)', f'(uuid "{NU()}")', t, count=1) + return t + +# ---------------- MCU lib symbol (built from official pin map) ---------------- +MCU_PINS = [ + (1,'VBAT','power_in',-5.08,48.26,270),(2,'PC13','bidirectional',-17.78,-15.24,0), + (3,'PC14','bidirectional',-17.78,-17.78,0),(4,'PC15','bidirectional',-17.78,-20.32,0), + (5,'PH0','bidirectional',-17.78,30.48,0),(6,'PH1','bidirectional',-17.78,27.94,0), + (7,'NRST','input',-17.78,40.64,0),(8,'PC0','bidirectional',-17.78,17.78,0), + (9,'PC1','bidirectional',-17.78,15.24,0),(10,'PC2','bidirectional',-17.78,12.7,0), + (11,'PC3','bidirectional',-17.78,10.16,0),(12,'VSSA','power_in',2.54,-45.72,90), + (13,'VDDA','power_in',7.62,48.26,270),(14,'PA0','bidirectional',17.78,40.64,180), + (15,'PA1','bidirectional',17.78,38.1,180),(16,'PA2','bidirectional',17.78,35.56,180), + (17,'PA3','bidirectional',17.78,33.02,180),(18,'VSS','power_in',0,-45.72,90), + (19,'VDD','power_in',-2.54,48.26,270),(20,'PA4','bidirectional',17.78,30.48,180), + (21,'PA5','bidirectional',17.78,27.94,180),(22,'PA6','bidirectional',17.78,25.4,180), + (23,'PA7','bidirectional',17.78,22.86,180),(24,'PC4','bidirectional',-17.78,7.62,0), + (25,'PC5','bidirectional',-17.78,5.08,0),(26,'PB0','bidirectional',17.78,-2.54,180), + (27,'PB1','bidirectional',17.78,-5.08,180),(28,'PB2','bidirectional',17.78,-7.62,180), + (29,'PB10','bidirectional',17.78,-27.94,180),(30,'VCAP1','power_out',-17.78,-25.4,0), + (31,'VSS','passive',0,-45.72,90),(32,'VDD','power_in',0,48.26,270), + (33,'PB12','bidirectional',17.78,-30.48,180),(34,'PB13','bidirectional',17.78,-33.02,180), + (35,'PB14','bidirectional',17.78,-35.56,180),(36,'PB15','bidirectional',17.78,-38.1,180), + (37,'PC6','bidirectional',-17.78,2.54,0),(38,'PC7','bidirectional',-17.78,0,0), + (39,'PC8','bidirectional',-17.78,-2.54,0),(40,'PC9','bidirectional',-17.78,-5.08,0), + (41,'PA8','bidirectional',17.78,20.32,180),(42,'PA9','bidirectional',17.78,17.78,180), + (43,'PA10','bidirectional',17.78,15.24,180),(44,'PA11','bidirectional',17.78,12.7,180), + (45,'PA12','bidirectional',17.78,10.16,180),(46,'PA13','bidirectional',17.78,7.62,180), + (47,'VSS','passive',0,-45.72,90),(48,'VDD','power_in',2.54,48.26,270), + (49,'PA14','bidirectional',17.78,5.08,180),(50,'PA15','bidirectional',17.78,2.54,180), + (51,'PC10','bidirectional',-17.78,-7.62,0),(52,'PC11','bidirectional',-17.78,-10.16,0), + (53,'PC12','bidirectional',-17.78,-12.7,0),(54,'PD2','bidirectional',-17.78,22.86,0), + (55,'PB3','bidirectional',17.78,-10.16,180),(56,'PB4','bidirectional',17.78,-12.7,180), + (57,'PB5','bidirectional',17.78,-15.24,180),(58,'PB6','bidirectional',17.78,-17.78,180), + (59,'PB7','bidirectional',17.78,-20.32,180),(60,'BOOT0','input',-17.78,35.56,0), + (61,'PB8','bidirectional',17.78,-22.86,180),(62,'PB9','bidirectional',17.78,-25.4,180), + (63,'VSS','passive',0,-45.72,90),(64,'VDD','power_in',5.08,48.26,270), +] +def mcu_libsym(): + pins_txt = [] + for num, name, etype, x, y, ang in MCU_PINS: + hide = '\n\t\t\t\t\t(hide yes)' if etype == 'passive' and name == 'VSS' and num != 18 else '' + pins_txt.append(f'''\t\t\t\t(pin {etype} line +\t\t\t\t\t(at {x:g} {y:g} {ang}){hide} +\t\t\t\t\t(length 2.54) +\t\t\t\t\t(name "{name}" +\t\t\t\t\t\t(effects +\t\t\t\t\t\t\t(font +\t\t\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t\t\t) +\t\t\t\t\t\t) +\t\t\t\t\t) +\t\t\t\t\t(number "{num}" +\t\t\t\t\t\t(effects +\t\t\t\t\t\t\t(font +\t\t\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t\t\t) +\t\t\t\t\t\t) +\t\t\t\t\t) +\t\t\t\t)''') + pins = '\n'.join(pins_txt) + return f'''\t\t(symbol "MCU_ST_STM32F4:STM32F411RETx" +\t\t\t(pin_names +\t\t\t\t(offset 1.016) +\t\t\t) +\t\t\t(exclude_from_sim no) +\t\t\t(in_bom yes) +\t\t\t(on_board yes) +\t\t\t(property "Reference" "U" +\t\t\t\t(at -15.24 49.53 0) +\t\t\t\t(effects +\t\t\t\t\t(font +\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t) +\t\t\t\t\t(justify left) +\t\t\t\t) +\t\t\t) +\t\t\t(property "Value" "STM32F411RETx" +\t\t\t\t(at -15.24 -46.99 0) +\t\t\t\t(effects +\t\t\t\t\t(font +\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t) +\t\t\t\t\t(justify left) +\t\t\t\t) +\t\t\t) +\t\t\t(property "Footprint" "Package_QFP:LQFP-64_10x10mm_P0.5mm" +\t\t\t\t(at 0 0 0) +\t\t\t\t(effects +\t\t\t\t\t(font +\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t) +\t\t\t\t\t(hide yes) +\t\t\t\t) +\t\t\t) +\t\t\t(property "Datasheet" "https://www.st.com/resource/en/datasheet/stm32f411re.pdf" +\t\t\t\t(at 0 0 0) +\t\t\t\t(effects +\t\t\t\t\t(font +\t\t\t\t\t\t(size 1.27 1.27) +\t\t\t\t\t) +\t\t\t\t\t(hide yes) +\t\t\t\t) +\t\t\t) +\t\t\t(symbol "STM32F411RETx_0_1" +\t\t\t\t(rectangle +\t\t\t\t\t(start -15.24 45.72) +\t\t\t\t\t(end 15.24 -43.18) +\t\t\t\t\t(stroke +\t\t\t\t\t\t(width 0.254) +\t\t\t\t\t\t(type default) +\t\t\t\t\t) +\t\t\t\t\t(fill +\t\t\t\t\t\t(type background) +\t\t\t\t\t) +\t\t\t\t) +\t\t\t) +\t\t\t(symbol "STM32F411RETx_1_1" +{pins} +\t\t\t) +\t\t)''' + +# ---------------- Block P content ---------------- +INS = [] # element text blocks to append at end of doc +def add(t): INS.append(t) + +# U16 at grid +U16X, U16Y = 500.38, 434.34 +mcu_world = {} +for num, name, etype, x, y, ang in MCU_PINS: + mcu_world[num] = (R2(U16X + x), R2(U16Y - y)) +MCU_NETS = {1:'3V3',2:'LED_C13',3:'LSE_IN',4:'LSE_OUT',5:'HSE_IN',6:'HSE_OUT',7:'NRST',8:'ETH_INT', + 12:'GND',13:'VDDA',14:'BAT_SENSE',15:'PWR_CTRL',16:'GNSS_TX',17:'GNSS_RX',18:'GND',19:'3V3', + 20:'5V_SENSE',21:'IGN_SENSE',22:'FAN_PWM',26:'EXT_LED',27:'NTC_TEMP',28:'BOOT1_STRAP',30:'VCAP1', + 32:'3V3',33:'ETH_CS',34:'ETH_SCK',35:'ETH_MISO',36:'ETH_MOSI',41:'CHRG_EN',42:'USART1_TX', + 43:'USART1_RX',44:'DFU_DM',45:'DFU_DP',46:'SWDIO',48:'3V3',49:'SWCLK',50:'ETH_RST', + 55:'CHRG_STAT',56:'CHRG_FAULT',57:'BYP_CTRL',58:'I2C_SCL',59:'I2C_SDA',60:'BOOT0', + 61:'SER_IRQ',62:None,64:'3V3'} +MCU_NC = [9,10,11,23,24,25,29,37,38,39,40,51,52,53,54,62] +add(mk_instance('MCU_ST_STM32F4:STM32F411RETx', 'U16', 'STM32F411RET6', + 'Package_QFP:LQFP-64_10x10mm_P0.5mm', U16X, U16Y, 0, + [str(n) for n, *_ in MCU_PINS])) +for num, name, etype, x, y, ang in MCU_PINS: + wx, wy = mcu_world[num] + net = MCU_NETS.get(num) + if num in MCU_NC: + add(mk_nc(wx, wy)); continue + if net is None: continue + side = {0: 'L', 180: 'R', 270: 'U', 90: 'D'}[ang] + if num in (31, 47, 63): continue # stacked VSS share pin18's point/label + add(mk_label(net, wx, wy, side)) + +# passives / support parts: label-on-pin style (v4 house pattern) +PART_LIBS = {} +def two_pin(lib_id, ref, value, fp, x, y, net1, net2, rot=0): + pins = lib_pins(lib_id) + inst = dict(lib_id=lib_id, x=x, y=y, rot=rot, mirror=None) + pw = pin_world(inst, pins) + nums = sorted(pw, key=lambda n: int(re.sub(r'\D', '', n) or 0)) + add(mk_instance(lib_id, ref, value, fp, x, y, rot, nums)) + for num, net in zip(nums, (net1, net2)): + px, py = pw[num] + side = 'R' if px > x else ('L' if px < x else ('U' if py < y else 'D')) + if net: add(mk_label(net, px, py, side)) + +FP_R = 'Resistor_SMD:R_0603_1608Metric' +FP_C = 'Capacitor_SMD:C_0603_1608Metric' +FP_C0805 = 'Capacitor_SMD:C_0805_2012Metric' +FP_LED = 'LED_SMD:LED_0603_1608Metric' +FP_TVS = 'Diode_SMD:D_SOD-323' +D2fp = by_ref('D2')['fp'] # SS34 footprint in use +Y1fp = by_ref('Y1')['fp'] # 25MHz crystal footprint in use +SW1fp = by_ref('SW1')['fp'] +TP1fp = by_ref('TP1')['fp'] +J9 = by_ref('J9') +C23fp = by_ref('C23')['fp'] +P6fp_old = P6['fp'] or '' +P6fp_new = P6fp_old.replace('1x04', '1x02') if '1x04' in P6fp_old else P6fp_old + +ROWA, ROWB = 502.92, 530.86 +two_pin('Switch:SW_Push', 'SW2', 'BOOT0', SW1fp, 436.88, ROWA, '3V3', 'BOOT0') +two_pin('Device:R', 'R98', '10k', FP_R, 449.58, ROWA, 'BOOT0', 'GND') +two_pin('Device:R', 'R99', '10k', FP_R, 462.28, ROWA, 'BOOT1_STRAP', 'GND') +two_pin('Device:C', 'C104', '100nF', FP_C, 474.98, ROWA, 'NRST', 'GND') +for i, xx in enumerate([487.68, 500.38, 513.08, 525.78]): + two_pin('Device:C', f'C{105+i}', '100nF', FP_C, xx, ROWA, '3V3', 'GND') +two_pin('Device:C', 'C109', '100nF', FP_C, 538.48, ROWA, 'VDDA', 'GND') +two_pin('Device:C', 'C110', '4.7uF', FP_C, 551.18, ROWA, '3V3', 'GND') +two_pin('Device:C', 'C111', '4.7uF', FP_C, 563.88, ROWA, 'VCAP1', 'GND') +two_pin('Device:C', 'C112', '1uF', FP_C, 576.58, ROWA, 'VDDA', 'GND') +two_pin('Device:R', 'R104', '10R', FP_R, 589.28, ROWA, '3V3', 'VDDA') + +two_pin('Device:Crystal', 'Y3', '25MHz', Y1fp, 436.88, ROWB, 'HSE_IN', 'HSE_OUT') +two_pin('Device:C', 'C113', '15pF', FP_C, 449.58, ROWB, 'HSE_IN', 'GND') +two_pin('Device:C', 'C114', '15pF', FP_C, 462.28, ROWB, 'HSE_OUT', 'GND') +two_pin('Device:Crystal', 'Y4', '32.768kHz', 'Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm', + 474.98, ROWB, 'LSE_IN', 'LSE_OUT') +two_pin('Device:C', 'C115', '12pF', FP_C, 487.68, ROWB, 'LSE_IN', 'GND') +two_pin('Device:C', 'C116', '12pF', FP_C, 500.38, ROWB, 'LSE_OUT', 'GND') +# LEDs: Device:LED pin1=K pin2=A +two_pin('Device:R', 'R102', '1k', FP_R, 513.08, ROWB, '3V3', 'LED_C13_A') +two_pin('Device:LED', 'D17', 'LED C13 (blue)', FP_LED, 525.78, ROWB, 'LED_C13', 'LED_C13_A') +two_pin('Device:R', 'R103', '1k', FP_R, 538.48, ROWB, '3V3', 'LED_PWR_A') +two_pin('Device:LED', 'D18', 'LED PWR (green)', FP_LED, 551.18, ROWB, 'GND', 'LED_PWR_A') +for ref, net, xx in [('TP3', 'SWDIO', 563.88), ('TP4', 'SWCLK', 576.58), ('TP5', 'NRST', 589.28), + ('TP6', 'GND', 601.98), ('TP7', '3V3', 614.68)]: + pins = lib_pins('Connector:TestPoint') + inst = dict(lib_id='Connector:TestPoint', x=xx, y=ROWB, rot=0, mirror=None) + pw = pin_world(inst, pins) + add(mk_instance('Connector:TestPoint', ref, net, TP1fp, xx, ROWB, 0, list(pw))) + (px, py) = list(pw.values())[0] + add(mk_label(net, px, py, 'D' if py > ROWB else 'U')) + +# LDO block +two_pin('Device:D_Schottky', 'D12', 'SS34', D2fp, 627.38, ROWA, 'LDO_IN', 'SYS5V') # pin1=K pin2=A +two_pin('Device:D_Schottky', 'D13', 'SS34', D2fp, 640.08, ROWA, 'LDO_IN', 'DFU_VBUS') +u17pins = lib_pins('Regulator_Linear:AMS1117-3.3') +U17X, U17Y = 665.48, ROWA +inst = dict(lib_id='Regulator_Linear:AMS1117-3.3', x=U17X, y=U17Y, rot=0, mirror=None) +pw = pin_world(inst, u17pins) +add(mk_instance('Regulator_Linear:AMS1117-3.3', 'U17', 'AMS1117-3.3', + 'Package_TO_SOT_SMD:SOT-223-3_TabPin2', U17X, U17Y, 0, [p['num'] for p in u17pins])) +name_by_num = {p['num']: p['name'].upper() for p in u17pins} +for num, (px, py) in pw.items(): + nm = name_by_num[num] + net = 'LDO_IN' if nm in ('VI', 'VIN', 'IN') else ('3V3' if nm in ('VO', 'VOUT', 'OUT') else 'GND') + side = 'R' if px > U17X else ('L' if px < U17X else ('U' if py < U17Y else 'D')) + add(mk_label(net, px, py, side)) +two_pin('Device:C', 'C117', '10uF', FP_C0805, 690.88, ROWA, 'LDO_IN', 'GND') +two_pin('Device:C', 'C118', '22uF/16V', C23fp or FP_C0805, 703.58, ROWA, '3V3', 'GND') +for ref, net, xx in [('PF12', 'LDO_IN', 716.28), ('PF13', 'DFU_VBUS', 728.98)]: + pins = lib_pins('power:PWR_FLAG') + inst = dict(lib_id='power:PWR_FLAG', x=xx, y=ROWA, rot=0, mirror=None) + pw = pin_world(inst, pins) + add(mk_instance('power:PWR_FLAG', ref, 'PWR_FLAG', '', xx, ROWA, 0, list(pw))) + (px, py) = list(pw.values())[0] + add(mk_label(net, px, py, 'D' if py > ROWA else 'U')) + +# USB-C DFU port: clone J9 geometry+pattern with DFU_* nets +J9pins = pin_world(J9) +J11X, J11Y = 660.4, 430.53 +NETMAP = {'USB_VBUS': 'DFU_VBUS', 'USB_DP': 'DFU_DP', 'USB_DM': 'DFU_DM', + 'USB_CC1': 'DFU_CC1', 'USB_CC2': 'DFU_CC2'} +# what J9 has per pin: label at pin OR nc +a9, b9 = span(J9['el']); j9txt = src[a9:b9] +j9txt = re.sub(r'\(property "Reference" "J9"', '(property "Reference" "J11"', j9txt, count=1) +j9txt = re.sub(r'\(property "Value" "[^"]*"', '(property "Value" "USB-C DFU"', j9txt, count=1) +j9txt = re.sub(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', + lambda m, base=[0]: m.group(0), j9txt) # keep; we shift below numerically +# shift all coordinates by delta +DX, DY = R2(J11X - J9['x']), R2(J11Y - J9['y']) +def shift_coords(txt, dx, dy): + def r(m): + vals = m.group(1).split() + x = float(vals[0]) + dx; y = float(vals[1]) + dy + rest = (' ' + ' '.join(vals[2:])) if len(vals) > 2 else '' + return f'(at {x:g} {y:g}{rest})' + return re.sub(r'\(at ([^)]*)\)', r, txt) +j9txt = shift_coords(j9txt, DX, DY) +j9txt = re.sub(r'\(uuid "[^"]*"\)', lambda m: f'(uuid "{NU()}")', j9txt) +j9txt = re.sub(r'\(reference "J9"\)', '(reference "J11")', j9txt) +add(j9txt) +# labels/nc for J11 pins mirroring J9's connection style +for num, pos in J9pins.items(): + npos = (R2(pos[0] + DX), R2(pos[1] + DY)) + if pos in nc_at: + add(mk_nc(*npos)); continue + here = [nm for nm, _ in lab_at.get(pos, [])] + if not here and pos in adj: + # pin connected via a wire run in the original (e.g. SH -> wire -> GND label): + # resolve the net name by graph walk and label the cloned pin directly. + seen = {pos}; st = [pos]; found = None + while st and not found: + q = st.pop() + lbls = [nm for nm, _ in lab_at.get(q, [])] + if lbls: found = lbls[0]; break + for r_ in adj[q]: + if r_ not in seen: seen.add(r_); st.append(r_) + if found: here = [found] + if here: + nm = here[0] + newnm = NETMAP.get(nm, nm) + side = 'R' if pos[0] > J9['x'] else 'L' + add(mk_label(newnm, npos[0], npos[1], side)) +# CC pulldowns + TVS +two_pin('Device:R', 'R100', '5.1k', FP_R, 704.85, 430.53, 'DFU_CC1', 'GND') +two_pin('Device:R', 'R101', '5.1k', FP_R, 717.55, 430.53, 'DFU_CC2', 'GND') +two_pin('Device:D_TVS', 'D14', 'PESD5V0S1BA', FP_TVS, 704.85, 458.47, 'DFU_DP', 'GND') +two_pin('Device:D_TVS', 'D15', 'PESD5V0S1BA', FP_TVS, 717.55, 458.47, 'DFU_DM', 'GND') +two_pin('Device:D_TVS', 'D16', 'PESD5V0S1BA', FP_TVS, 730.25, 458.47, 'DFU_VBUS', 'GND') + +# 2-pin fan connector at old P6 site (reuse ref P6) +oldp = pin_world(P6) +np6x, np6y = P6['x'], P6['y'] +two_pin('Connector_Generic:Conn_01x02', 'P6', 'FAN 2-pin', P6fp_new, np6x, np6y, + '5V_FAN', 'FAN_RET', rot=P6['rot']) + +# notes +add(mk_text('BLOCK P - ON-BOARD MCU (EinarBoard 3.0). STM32F411RET6 LQFP64 replaces Blackpill+J1/J2. DFU: hold BOOT0, tap NRST -> USB. HSE 25MHz REQUIRED for ROM-bootloader USB clock (AN2606). PB2=BOOT1 strapped LOW via R99 - NEVER repurpose PB2. Bench flash: USB powers 3V3 domain only via D13 (SYS5V dark, K1 stays NC).', 420, 372)) +add(mk_text('PC6/PC7 reserved: USART6 (3rd UART, future). Free: PA7, PB9, PB10, PC1-PC5, PC8-PC12, PD2. LED_C13 active-LOW (Blackpill parity). SWD: TP3-TP7 (SWDIO/SWCLK/NRST/GND/3V3).', 420, 377)) + +# ---------------- splice ---------------- +new_src = src +# apply text patches + deletions together, sorted desc by start +ops = [(a, b, '') for (a, b) in del_spans] + [(a, b, t) for (a, b, t) in text_patches] +ops.sort(key=lambda o: -o[0]) +spans_sorted = sorted([(a, b) for a, b, _ in ops]) +for (a1, b1), (a2, b2) in zip(spans_sorted, spans_sorted[1:]): + assert b1 <= a2, f'overlapping spans {a1,b1} {a2,b2}' +for a, b, t in ops: + # widen deletion to swallow leading whitespace + a0 = a + while a0 > 0 and new_src[a0-1] in ' \t\n': a0 -= 1 + if t == '': + new_src = new_src[:a0] + '\n\t' + new_src[b:] + else: + new_src = new_src[:a] + t + new_src[b:] +# insert lib symbol before lib_symbols closing paren +ls_a, ls_b = span(libsym_el) +# recompute shift: all deletions were AFTER lib_symbols? assert to be safe +assert all(a > ls_b for a, b, _ in ops), 'a deletion overlaps lib_symbols - unhandled' +new_src = new_src[:ls_b-1] + '\n' + mcu_libsym() + '\n\t' + new_src[ls_b-1:] +# append new elements before final closing paren +end = new_src.rfind(')') +body = '\n\t' + '\n\t'.join(INS) + '\n' +new_src = new_src[:end] + body + new_src[end:] + +open(FN, 'w', encoding='utf-8').write(new_src) +print('WROTE', FN, len(new_src), 'bytes (was', len(src), ')') +for k, v in report.items(): + print(f'-- {k}: {len(v)}') + for item in v[:40]: print(' ', item) diff --git a/scripts/2026-08-12_einarboard30_phaseB2_revision.py b/scripts/2026-08-12_einarboard30_phaseB2_revision.py new file mode 100644 index 0000000..14d9cbf --- /dev/null +++ b/scripts/2026-08-12_einarboard30_phaseB2_revision.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python3 +""" +EinarBoard 3.0 — Phase B.2: placement revision per Leo's review (12-Ago). +- Rip ALL tracks/vias of the 24 old socket nets + /NRST (reroute in C) +- Endpoint-rip stubs at old pad sites of every moved footprint (this + last round) +- Delete Blackpill bay silk (labels row + title + outline gfx) +- Pack R85/R86/R87/R88/D11 east beside Q1/Q5; buck cluster U12+L8+C100+C101 below C43 +- U16 + full support ring -> freed bay (~119,63.5); LDO cluster -> tight block; J11 north; + LEDs south of J11; SW2 -> beside H4; TPs -> north strip +- MH7-12 reference text -> 1.0mm; version silk 2.0->3.0, HBOX v4->v5 +""" +import re, sys, math, uuid, collections + +CUR = 'hbox-watchdog-v5.kicad_pcb' +ORIG = 'pcb.orig' +src = open(CUR, encoding='utf-8').read() +orig = open(ORIG, encoding='utf-8').read() +assert '"U16"' in src, 'phase B output expected' +if 'STM32F411 BLACKPILL' not in src: + print('ABORT: bay silk already gone (B.2 already ran?)'); sys.exit(1) + +def NU(): return str(uuid.uuid4()) +def endof(s, start): + d=0; ins=False; esc=False + for k in range(start, len(s)): + c=s[k] + if esc: esc=False; continue + if c=='\\': esc=True; continue + if c=='"': ins=not ins; continue + if not ins: + if c=='(': d+=1 + elif c==')': + d-=1 + if d==0: return k+1 + return -1 +def rotpt(lx, ly, deg): + r = math.radians((-deg) % 360) # ROTSGN=-1 convention baked in + return (lx*math.cos(r) - ly*math.sin(r), lx*math.sin(r) + ly*math.cos(r)) + +def parse_fps(s): + out={} + for m in re.finditer(r'\(footprint\s+"([^"]+)"', s): + a=m.start(); e=endof(s,a); blk=s[a:e] + rm=re.search(r'\(property "Reference"\s+"([^"]+)"', blk) + am=re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', blk) + if rm and am and rm.group(1) not in out: + out[rm.group(1)]=dict(ref=rm.group(1), lib=m.group(1), x=float(am.group(1)), + y=float(am.group(2)), rot=float((am.group(3) or '0')), + span=(a,e), blk=blk) + return out +def pads_of(blk): + out=[] + for m in re.finditer(r'\(pad\s+"([^"]*)"\s+(np_thru_hole|thru_hole|smd)\s+(\w+)', blk): + a=m.start(); e=endof(blk,a); p=blk[a:e] + am=re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', p) + nm=re.search(r'\(net "((?:[^"\\]|\\.)*)"\)', p) + sm=re.search(r'\(size ([\-0-9.]+) ([\-0-9.]+)\)', p) + out.append(dict(num=m.group(1), lx=float(am.group(1)), ly=float(am.group(2)), + net=nm.group(1) if nm else None, + sx=float(sm.group(1)) if sm else 1, sy=float(sm.group(2)) if sm else 1)) + return out +def pad_world(f, p): + dx,dy = rotpt(p['lx'], p['ly'], f['rot']) + return (f['x']+dx, f['y']+dy) + +FP = parse_fps(src); FPO = parse_fps(orig) + +# ---------------- 1) net rip: socket nets + /NRST ---------------- +RIP_NETS = {'/BAT_SENSE','/PWR_CTRL','/GNSS_TX','/GNSS_RX','/5V_SENSE','/IGN_SENSE','/FAN_PWM', + '/EXT_LED','/NTC_TEMP','/ETH_INT','/ETH_CS','/ETH_SCK','/ETH_MISO','/ETH_MOSI','/ETH_RST', + '/CHRG_EN','/CHRG_STAT','/CHRG_FAULT','/BYP_CTRL','/USART1_TX','/USART1_RX','/I2C_SCL', + '/I2C_SDA','/SER_IRQ','/NRST'} +del_spans=[]; stats=collections.Counter() +for m in re.finditer(r'\(segment\b|\(via\b|\(arc\b', src): + a=m.start(); e=endof(src,a); blk=src[a:e] + nm=re.search(r'\(net "((?:[^"\\]|\\.)*)"\)', blk) + if nm and nm.group(1) in RIP_NETS: + del_spans.append((a,e)); stats['net-rip '+m.group(0)[1:]]+=1 + +# ---------------- 2) endpoint rip at old pad sites ---------------- +old_sites=[] +for ref in ('J1','J2','P6','Y1','Y2','C83','C90','C91','C96','C102','R96','R97'): + f=FPO.get(ref) + if f: + for p in pads_of(f['blk']): old_sites.append(pad_world(f,p)) +for ref in ('R85','R86','R87','R88','D11','L8','U12','C100','C101'): + f=FP.get(ref) + if f: + for p in pads_of(f['blk']): old_sites.append(pad_world(f,p)) +def near_site(x,y,tol=0.15): + return any(abs(x-sx)<=tol and abs(y-sy)<=tol for sx,sy in old_sites) +ripped=set(a for a,e in del_spans) +for m in re.finditer(r'\(segment\b|\(via\b', src): + a=m.start() + if a in ripped: continue + e=endof(src,a); blk=src[a:e] + if m.group(0)=='(via': + am=re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)\)', blk) + pts=[(float(am.group(1)),float(am.group(2)))] + else: + pts=[] + sm=re.search(r'\(start ([\-0-9.]+) ([\-0-9.]+)\)', blk); em=re.search(r'\(end ([\-0-9.]+) ([\-0-9.]+)\)', blk) + if sm: pts.append((float(sm.group(1)),float(sm.group(2)))) + if em: pts.append((float(em.group(1)),float(em.group(2)))) + if any(near_site(x,y) for x,y in pts): + del_spans.append((a,e)); stats['endpoint-rip']+=1 + +# ---------------- 3) bay silk deletion + version text patches ---------------- +text_patches=[] +BAY=(98,49,162,79) +for m in re.finditer(r'\(gr_(text|rect|line|poly|circle)\b', src): + a=m.start(); e=endof(src,a); blk=src[a:e] + if 'Silk' not in blk: continue + coords=[(float(mm.group(1)),float(mm.group(2))) for mm in + re.finditer(r'\((?:at|start|end|xy|center) ([\-0-9.]+) ([\-0-9.]+)', blk)] + if not coords: continue + inside=all(BAY[0]=0: text_patches.append((i+1, i+1+len(old), new)) + +# ---------------- 4) footprint moves ---------------- +MOVES = {} # ref -> (x, y) new position (rot preserved) +# packed east row beside Q1/Q5 at y 63.9 (all rot preserved: R's are rot90, D11 rot90) +MOVES.update({'R88':(140.0,63.9), 'R87':(142.5,63.9), 'D11':(145.6,63.9), + 'R85':(148.7,63.9), 'R86':(151.2,63.9)}) +# buck cluster below C43 (C43 at 146.95,109.31; keep loop tight) +MOVES.update({'U12':(144.0,116.5), 'L8':(145.0,123.5), 'C100':(139.2,116.5), 'C101':(139.2,120.0)}) +# J11 4.5mm north +MOVES['J11']=(71.11,87.5) +# LEDs + resistors south of J11 +MOVES.update({'D17':(64.5,97.6), 'D18':(64.5,100.2), 'R102':(67.94,97.6), 'R103':(67.94,100.2)}) +# SW2 beside H4 (bottom edge service row) +MOVES['SW2']=(84.0,134.3) +# U16 into freed bay + support ring +UX,UY=119.0,63.5 +MOVES['U16']=(UX,UY) +MOVES.update({ + 'C105':(111.4,56.6), 'C106':(126.6,56.6), 'C107':(111.4,70.4), 'C108':(126.6,70.4), + 'C110':(114.5,56.0), 'C111':(119.0,71.9), 'C104':(110.6,66.5), 'R99':(110.6,60.5), + 'R104':(114.5,71.9), 'C109':(123.5,71.9), 'C112':(126.0,73.9), 'R98':(127.4,60.5), + 'Y3':(133.0,66.8), 'C113':(129.4,70.2), 'C114':(133.0,70.2), + 'Y4':(133.0,58.4), 'C115':(129.4,61.4), 'C116':(133.0,61.9), + 'TP3':(108.0,52.0), 'TP4':(110.8,52.0), 'TP5':(113.6,52.0), 'TP6':(116.4,52.0), 'TP7':(119.2,52.0), +}) +# LDO tight block in freed old-U16 zone (between J11 and new U16) +MOVES.update({'U17':(90.5,69.5), 'D12':(96.3,67.0), 'D13':(96.3,70.5), + 'C117':(87.0,74.5), 'C118':(90.5,74.5)}) + +for ref,(nx,ny) in MOVES.items(): + f=FP[ref] + del_spans.append(f['span']) + nb=re.sub(r'\(at [\-0-9. ]+\)', + f'(at {nx:g} {ny:g}{(" %g"%f["rot"]) if f["rot"] else ""})', f['blk'], count=1) + MOVES[ref]=(nx,ny,nb) + stats['moved']+=1 + +# ---------------- 5) MH7-12 reference text size ---------------- +mh_patches=[] +for ref in ('MH7','MH8','MH9','MH10','MH11','MH12'): + f=FP[ref] + a,e=f['span'] + blk=f['blk'] + pm=re.search(r'\(property "Reference"\s+"'+ref+r'"', blk) + pe=endof(blk, pm.start()) + ptxt=blk[pm.start():pe] + ptxt2=re.sub(r'\(size [0-9.]+ [0-9.]+\)', '(size 1 1)', ptxt) + if '(thickness' in ptxt2: ptxt2=re.sub(r'\(thickness [0-9.]+\)', '(thickness 0.15)', ptxt2) + else: ptxt2=ptxt2.replace('(size 1 1)', '(size 1 1)\n\t\t\t\t\t(thickness 0.15)') + nb=blk[:pm.start()]+ptxt2+blk[pe:] + del_spans.append(f['span']); MOVES[ref]=(f['x'],f['y'],nb); stats['mh-text']+=1 + +# ---------------- splice ---------------- +new=src +ops=[(a,b,'') for a,b in del_spans]+[(a,b,t) for a,b,t in text_patches] +ops.sort(key=lambda o:-o[0]) +ss=sorted([(a,b) for a,b,_ in ops]) +for (a1,b1),(a2,b2) in zip(ss,ss[1:]): + assert b1<=a2, f'overlap {a1,b1} {a2,b2}' +for a,b,t in ops: + if t=='': + a0=a + while a0>0 and new[a0-1] in ' \t\n': a0-=1 + new=new[:a0]+'\n\t'+new[b:] + else: + new=new[:a]+t+new[b:] +end=new.rfind(')') +blocks=[v[2] for v in MOVES.values()] +new=new[:end]+'\t'+'\n\t'.join(blocks)+'\n'+new[end:] +open(CUR,'w',encoding='utf-8').write(new) +print(f'WROTE {CUR}: {len(src)} -> {len(new)}; balance={new.count("(")==new.count(")")}') +for k,v in sorted(stats.items()): print(f' {k}: {v}') diff --git a/scripts/2026-08-12_einarboard30_phaseB_gen_placement.py b/scripts/2026-08-12_einarboard30_phaseB_gen_placement.py new file mode 100644 index 0000000..c3c49c6 --- /dev/null +++ b/scripts/2026-08-12_einarboard30_phaseB_gen_placement.py @@ -0,0 +1,597 @@ +#!/usr/bin/env python3 +""" +EinarBoard 3.0 — Phase B generator: PCB placement for hbox-watchdog-v5.kicad_pcb +File-level edits per standing rule. Removes Blackpill sockets + tach parts, swaps P6 to +JST B2B 1x02, fabricates+places all Phase-A footprints (dims from KiCad v7 lib files, +syntax from same-board templates), moves Y1/Y2, adds Block-Q mounting holes, updates +net table + title date. Verifies: courtyard overlaps, pad-net consistency, board bounds. +""" +import re, sys, math, uuid, collections +from decimal import Decimal as D + +PCB = sys.argv[1] if len(sys.argv) > 1 else 'hbox-watchdog-v5.kicad_pcb' +SCH = sys.argv[2] if len(sys.argv) > 2 else 'hbox-watchdog-v5.kicad_sch' +LIB = '/usr/share/kicad/footprints' +src = open(PCB, encoding='utf-8').read() +if '"U16"' in src: + print('ABORT: U16 already on board'); sys.exit(1) + +def NU(): return str(uuid.uuid4()) +def endof(s, start): + d = 0; ins = False; esc = False + for k in range(start, len(s)): + c = s[k] + if esc: esc = False; continue + if c == '\\': esc = True; continue + if c == '"': ins = not ins; continue + if not ins: + if c == '(': d += 1 + elif c == ')': + d -= 1 + if d == 0: return k + 1 + return -1 + +# ---------------- board facts ---------------- +X0, X1, Y0, Y1 = 60.19165, 215.19165, 40.3231, 140.3231 + +# ---------------- net table ---------------- +nets = set() +for m in re.finditer(r'\(net "((?:[^"\\]|\\.)*)"\)', src): + nets.add(m.group(1)) +NEW_NETS = ['DFU_VBUS','DFU_DP','DFU_DM','DFU_CC1','DFU_CC2','LDO_IN','BOOT0','BOOT1_STRAP', + 'VCAP1','VDDA','HSE_IN','HSE_OUT','LSE_IN','LSE_OUT','SWDIO','SWCLK', + 'LED_C13','LED_C13_A','LED_PWR_A'] +def resolve(name): + if name in nets: return name + if '/'+name in nets: return '/'+name + return None +def N(name): + r = resolve(name) + return f'(net "{r if r else "/"+name}")' # new nets follow the local-label "/" convention +addnets = [n for n in NEW_NETS if resolve(n) is None] +for req in ['NRST','3V3','SYS5V','GND','ETH_INT','5V_FAN','FAN_RET']: + assert resolve(req), f'expected existing net {req}' + +# ---------------- footprint blocks ---------------- +fp_blocks = [] # (ref, at(x,y,rot), span, block) +for m in re.finditer(r'\(footprint\s+"([^"]+)"', src): + a = m.start(); e = endof(src, a); blk = src[a:e] + rm = re.search(r'\(property "Reference"\s+"([^"]+)"', blk) + am = re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', blk) + if rm and am: + fp_blocks.append(dict(ref=rm.group(1), lib=m.group(1), + x=float(am.group(1)), y=float(am.group(2)), + rot=float((am.group(3) or '0')), span=(a, e), blk=blk)) +def by_ref(r): + c = [f for f in fp_blocks if f['ref'] == r] + assert len(c) == 1, f'{r}: {len(c)}' + return c[0] + +def pads_of(blk): + out = [] + for m in re.finditer(r'\(pad\s+"([^"]*)"\s+(np_thru_hole|thru_hole|smd)\s+(\w+)', blk): + a = m.start(); e = endof(blk, a); p = blk[a:e] + am = re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', p) + nm = re.search(r'\(net "((?:[^"\\]|\\.)*)"\)', p) + sm = re.search(r'\(size ([\-0-9.]+) ([\-0-9.]+)\)', p) + out.append(dict(num=m.group(1), kind=m.group(2), shape=m.group(3), + lx=float(am.group(1)), ly=float(am.group(2)), + rot=float((am.group(3) or '0')), + net=nm.group(1) if nm else None, + sx=float(sm.group(1)) if sm else 1, sy=float(sm.group(2)) if sm else 1, + span=(a, e), txt=p)) + return out + +def rotpt(lx, ly, deg): + r = math.radians(deg % 360) + return (lx*math.cos(r) - ly*math.sin(r), lx*math.sin(r) + ly*math.cos(r)) + +# validate rotation convention with P12 (rot 90 B2B) vs its connected tracks +P12 = by_ref('P12') +p12p = pads_of(P12['blk']) +cands = {} +for sgn in (1, -1): + pts = [] + for p in p12p: + dx, dy = rotpt(p['lx'], p['ly'], sgn*P12['rot']) + pts.append((round(P12['x']+dx, 3), round(P12['y']+dy, 3))) + cands[sgn] = pts +seg_pts = set() +for m in re.finditer(r'\(segment\s*\(start ([\-0-9.]+) ([\-0-9.]+)\)\s*\(end ([\-0-9.]+) ([\-0-9.]+)\)', src): + seg_pts.add((round(float(m.group(1)), 3), round(float(m.group(2)), 3))) + seg_pts.add((round(float(m.group(3)), 3), round(float(m.group(4)), 3))) +score = {1: 0, -1: 0} +segnet = collections.defaultdict(set) +for m in re.finditer(r'\(segment\s*\(start ([\-0-9.]+) ([\-0-9.]+)\)\s*\(end ([\-0-9.]+) ([\-0-9.]+)\)(.*?)\(net "((?:[^"\\]|\\.)*)"\)', src, re.S): + nn = m.group(6) + segnet[nn].add((round(float(m.group(1)), 2), round(float(m.group(2)), 2))) + segnet[nn].add((round(float(m.group(3)), 2), round(float(m.group(4)), 2))) +for f in fp_blocks: + if not f['rot'] % 360: continue + for p in pads_of(f['blk']): + if not p['net'] or p['net'] not in segnet: continue + for sgn in (1, -1): + dx, dy = rotpt(p['lx'], p['ly'], sgn*f['rot']) + pt = (round(f['x']+dx, 2), round(f['y']+dy, 2)) + if pt in segnet[p['net']]: score[sgn] += 1 +ROTSGN = 1 if score[1] >= score[-1] else -1 +print(f'rotation convention: sign={ROTSGN} (net-aware pad-track hits {score})') +def pad_world(f, p): + dx, dy = rotpt(p['lx'], p['ly'], ROTSGN*f['rot']) + return (f['x']+dx, f['y']+dy) + +# ---------------- courtyard/occupancy map (AABB per footprint from pads + courtyard rects) ---------------- +def fp_bbox(f): + xs = []; ys = [] + for p in pads_of(f['blk']): + wx, wy = pad_world(f, p) + xs += [wx - p['sx']/2, wx + p['sx']/2]; ys += [wy - p['sy']/2, wy + p['sy']/2] + for m in re.finditer(r'\(fp_(?:rect|line|circle|poly)\b', f['blk']): + e = endof(f['blk'], m.start()); g = f['blk'][m.start():e] + if '"F.CrtYd"' not in g and '"B.CrtYd"' not in g: continue + for mm in re.finditer(r'\((?:start|end|center|xy) ([\-0-9.]+) ([\-0-9.]+)\)', g): + dx, dy = rotpt(float(mm.group(1)), float(mm.group(2)), ROTSGN*f['rot']) + xs.append(f['x']+dx); ys.append(f['y']+dy) + if not xs: return None + return (min(xs), min(ys), max(xs), max(ys)) + +REMOVE = {'J1', 'J2', 'Rts1', 'Rtp1', 'P6'} +occ = [] +for f in fp_blocks: + if f['ref'] in REMOVE or f['ref'] in ('Y1', 'Y2'): continue + if f['ref'] == 'MOD1': + # header rows + USB/barrel-corner overhang keepout only; under-shield SMD is allowed + pws = [pad_world(f, p) for p in pads_of(f['blk'])] + ys = sorted({round(w[1], 1) for w in pws}) + xs = [w[0] for w in pws] + rowA, rowB = min(ys), max(ys) + occ.append(('MOD1-rowA', (min(xs)-1, rowA-1, max(xs)+1, rowA+1))) + occ.append(('MOD1-rowB', (min(xs)-1, rowB-1, max(xs)+1, rowB+1))) + occ.append(('MOD1-ovh', (min(xs)-10, rowB-18.5, min(xs)-0.5, rowB-4.5))) + continue + bb = fp_bbox(f) + if bb: occ.append((f['ref'], bb)) +def colliders(bb, margin=0.3): + x0, y0, x1, y1 = bb + hits = [] + if x0 < X0+0.8 or y0 < Y0+0.8 or x1 > X1-0.8 or y1 > Y1-0.8: hits.append('BOARD-EDGE') + for ref, (a0, b0, a1, b1) in occ: + if not (x1+margin < a0 or a1+margin < x0 or y1+margin < b0 or b1+margin < y0): + hits.append(ref) + return hits +def clear(bb, margin=0.3): + return not colliders(bb, margin) +def place(w, h, ax, ay, fixed=False, label=''): + """find position for a w×h courtyard near anchor; returns center""" + if fixed: + bb = (ax-w/2, ay-h/2, ax+w/2, ay+h/2) + assert clear(bb), f'FIXED position blocked: {label} at {ax},{ay}' + occ.append((label, bb)); return (ax, ay) + step = 0.635 + for ring in range(0, 40): + for dx in range(-ring, ring+1): + for dy in range(-ring, ring+1): + if max(abs(dx), abs(dy)) != ring: continue + cx, cy = ax + dx*step, ay + dy*step + bb = (cx-w/2, cy-h/2, cx+w/2, cy+h/2) + if clear(bb): + occ.append((label, bb)); return (round(cx, 2), round(cy, 2)) + raise RuntimeError(f'no space for {label} near {ax},{ay}') + +# ---------------- sch symbol uuid map (for footprint path linkage) ---------------- +schsrc = open(SCH, encoding='utf-8').read() +sch_uuid = {} +for m in re.finditer(r'\(symbol\b', schsrc): + e = endof(schsrc, m.start()); b = schsrc[m.start():e] + um = re.search(r'\(uuid "([^"]+)"\)', b) + rm = re.search(r'\(property "Reference"\s+"([^"]+)"', b) + if um and rm and rm.group(1) not in sch_uuid: + sch_uuid[rm.group(1)] = um.group(1) + +# ---------------- v7 lib dims ---------------- +def lib_dims(path): + s = open(path).read() + pads = [] + for m in re.finditer(r'\(pad\s+"?([^"\s]*)"?\s+(np_thru_hole|thru_hole|smd)\s+(\w+)', s): + e = endof(s, m.start()); p = s[m.start():e] + am = re.search(r'\(at ([\-0-9.]+) ([\-0-9.]+)( [\-0-9.]+)?\)', p) + sm = re.search(r'\(size ([\-0-9.]+) ([\-0-9.]+)\)', p) + dm = re.search(r'\(drill ([\-0-9.]+)', p) + rr = re.search(r'\(roundrect_rratio ([\-0-9.]+)\)', p) + lay = re.search(r'\(layers ([^)]+)\)', p) + pads.append(dict(num=m.group(1).strip('"'), kind=m.group(2), shape=m.group(3), + x=float(am.group(1)), y=float(am.group(2)), rot=float((am.group(3) or '0')), + sx=float(sm.group(1)), sy=float(sm.group(2)), + drill=float(dm.group(1)) if dm else None, + rratio=rr.group(1) if rr else None, layers=lay.group(1))) + cxs = []; cys = [] + for m in re.finditer(r'\(fp_(?:rect|line|circle)\b', s): + e = endof(s, m.start()); g = s[m.start():e] + if 'CrtYd' not in g: continue + for mm in re.finditer(r'\((?:start|end|center) ([\-0-9.]+) ([\-0-9.]+)\)', g): + cxs.append(float(mm.group(1))); cys.append(float(mm.group(2))) + crt = (min(cxs), min(cys), max(cxs), max(cys)) if cxs else None + return dict(pads=pads, crt=crt) + +LQFP64 = lib_dims(f'{LIB}/Package_QFP.pretty/LQFP-64_10x10mm_P0.5mm.kicad_mod') +SOT223 = lib_dims(f'{LIB}/Package_TO_SOT_SMD.pretty/SOT-223-3_TabPin2.kicad_mod') +SOD323 = lib_dims(f'{LIB}/Diode_SMD.pretty/D_SOD-323.kicad_mod') +X3215 = lib_dims(f'{LIB}/Crystal.pretty/Crystal_SMD_3215-2Pin_3.2x1.5mm.kicad_mod') +LED063 = lib_dims(f'{LIB}/LED_SMD.pretty/LED_0603_1608Metric.kicad_mod') +UNOH = lib_dims(f'{LIB}/Module.pretty/Arduino_UNO_R3_WithMountingHoles.kicad_mod') +HOLES_LOCAL = [(p['x'], p['y']) for p in UNOH['pads'] if p['kind'] == 'np_thru_hole'] +assert len(HOLES_LOCAL) == 4 + +# MOD1 transform fit: board pad locals vs library pad locals (plain UNO, pad1..32) +UNO = lib_dims(f'{LIB}/Module.pretty/Arduino_UNO_R3.kicad_mod') +MOD1 = by_ref('MOD1') +bp = {p['num']: (p['lx'], p['ly']) for p in pads_of(MOD1['blk'])} +lp = {p['num']: (p['x'], p['y']) for p in UNO['pads']} +common = [k for k in ('1', '2', '11', '20', '32') if k in bp and k in lp] +assert len(common) >= 3, f'MOD1 pads for fit: {common}' +# solve: board_local = (sx * lib_x, sy * lib_y) with sx,sy in {+1,-1} + offset +fits = [] +for sx in (1, -1): + for sy in (1, -1): + offs = {(round(bp[k][0]-sx*lp[k][0], 3), round(bp[k][1]-sy*lp[k][1], 3)) for k in common} + if len(offs) == 1: fits.append((sx, sy, offs.pop())) +assert len(fits) == 1, f'MOD1 fit ambiguous: {fits}' +MSX, MSY, (MOX, MOY) = fits[0] +print(f'MOD1 mirror fit: sx={MSX} sy={MSY} off=({MOX},{MOY})') +shield_holes = [] +for hx, hy in HOLES_LOCAL: + blx, bly = MSX*hx + MOX, MSY*hy + MOY + dx, dy = rotpt(blx, bly, ROTSGN*MOD1['rot']) + shield_holes.append((round(MOD1['x']+dx, 3), round(MOD1['y']+dy, 3))) +print('shield bolt holes (world):', shield_holes) + +# ---------------- templates from board ---------------- +T_R = by_ref('R20'); T_C = None; T_C0805 = None +for f in fp_blocks: + if 'C_0603' in f['lib'] and T_C is None: T_C = f + if 'C_0805' in f['lib'] and T_C0805 is None: T_C0805 = f +assert T_C, 'no 0603 C template' +T_SMA = by_ref('D2'); T_TP = by_ref('TP1'); T_SW = by_ref('SW1'); T_MH = by_ref('MH2') +T_B2B = by_ref('P12'); T_USB = by_ref('J9'); T_LQFP = by_ref('U11'); T_HC49 = by_ref('Y1') +P6old = by_ref('P6') + +def path_of(blk): + m = re.search(r'\(path "([^"]+)"\)', blk) + return m.group(1) if m else None + +def retarget(tmpl_f, ref, value, libname, x, y, rot, padnets, fpname=None): + """clone a board template block: new ref/value/lib/at/uuids/nets/path""" + t = tmpl_f['blk'] + t = re.sub(r'\(footprint\s+"[^"]+"', f'(footprint "{libname}"', t, count=1) + t = re.sub(r'\(at [\-0-9. ]+\)', f'(at {x:g} {y:g}{(" %g"%rot) if rot else ""})', t, count=1) + t = re.sub(r'\(property "Reference"\s+"[^"]+"', f'(property "Reference" "{ref}"', t, count=1) + t = re.sub(r'\(property "Value"\s+"[^"]*"', f'(property "Value" "{value}"', t, count=1) + t = re.sub(r'\(property "Footprint"\s+"[^"]*"', f'(property "Footprint" "{libname}"', t, count=1) + t = re.sub(r'\(uuid "[^"]*"\)', lambda m: f'(uuid "{NU()}")', t) + su = sch_uuid.get(ref) + if su: t = re.sub(r'\(path "[^"]*"\)', f'(path "/{su}")', t, count=1) + # pad rotation update: template rot -> new rot on every pad angle token + nets + dr = rot - tmpl_f['rot'] + def fixpad(m): + a = m.start(); e = endof(t, a); p = t[a:e] + num = re.match(r'\(pad\s+"([^"]*)"', p).group(1) + if dr: + def bump(mm): + ang = (float(mm.group(3) or 0) + dr) % 360 + return f'(at {mm.group(1)} {mm.group(2)}{(" %g"%ang) if ang else ""})' + p2 = re.sub(r'\(at ([\-0-9.]+) ([\-0-9.]+)(?: ([\-0-9.]+))?\)', bump, p, count=1) + else: p2 = p + if num in padnets: + if '(net ' in p2: p2 = re.sub(r'\(net "(?:[^"\\]|\\.)*"\)', N(padnets[num]), p2) + else: p2 = p2[:-1] + '\n\t\t' + N(padnets[num]) + '\n\t)' + else: + p2 = re.sub(r'\s*\(net "(?:[^"\\]|\\.)*"\)', '', p2) + return p2 + out = []; i = 0 + for m in list(re.finditer(r'\(pad\s+"[^"]*"', t)): + a = m.start() + if a < i: continue + e = endof(t, a) + out.append(t[i:a]); + # rebuild pad via fixpad logic inline + p = t[a:e] + num = re.match(r'\(pad\s+"([^"]*)"', p).group(1) + if dr: + def bump(mm): + ang = (float(mm.group(3) or 0) + dr) % 360 + return f'(at {mm.group(1)} {mm.group(2)}{(" %g"%ang) if ang else ""})' + p = re.sub(r'\(at ([\-0-9.]+) ([\-0-9.]+)(?: ([\-0-9.]+))?\)', bump, p, count=1) + if num in padnets: + if '(net ' in p: p = re.sub(r'\(net "(?:[^"\\]|\\.)*"\)', N(padnets[num]), p) + else: p = p[:-1] + '\n\t\t\t' + N(padnets[num]) + '\n\t\t)' + else: + p = re.sub(r'\s*\(net "(?:[^"\\]|\\.)*"\)', '', p) + out.append(p); i = e + out.append(t[i:]) + return ''.join(out) + +def build_generic(ref, value, libname, x, y, rot, dims, padnets, attr='smd', tmpl=None): + """fabricate a footprint from v7 dims using a same-class board template for syntax""" + tmpl = tmpl or (T_C if attr == 'smd' else T_B2B) + t = tmpl['blk'] + head = re.match(r'(\(footprint\s+"[^"]+"\s*(?:\(version[^)]*\))?\s*(?:\(generator[^)]*\))?\s*(?:\(generator_version[^)]*\))?\s*\(layer "F\.Cu"\))', t) + # properties section: reuse template's property blocks (Reference/Value/Footprint/Datasheet/Description) + attr + path + props = [] + for pm in re.finditer(r'\(property "([^"]+)"\s+"[^"]*"', t): + a = pm.start(); e = endof(t, a); props.append((pm.group(1), t[a:e])) + prop_txt = [] + for name, ptxt in props: + if name == 'Reference': ptxt = re.sub(r'"Reference"\s+"[^"]+"', f'"Reference" "{ref}"', ptxt, count=1) + elif name == 'Value': ptxt = re.sub(r'"Value"\s+"[^"]*"', f'"Value" "{value}"', ptxt, count=1) + elif name == 'Footprint': ptxt = re.sub(r'"Footprint"\s+"[^"]*"', f'"Footprint" "{libname}"', ptxt, count=1) + ptxt = re.sub(r'\(uuid "[^"]*"\)', lambda m: f'(uuid "{NU()}")', ptxt) + prop_txt.append(ptxt) + attrm = re.search(r'\(attr [^)]*\)', t) + attr_txt = attrm.group(0) if attrm else f'(attr {attr})' + if attr == 'smd' and 'smd' not in attr_txt: attr_txt = '(attr smd)' + su = sch_uuid.get(ref) + path_txt = f'(path "/{su}")' if su else '' + sheet = re.search(r'\(sheetfile "[^"]*"\)', t) + sheet_txt = (re.search(r'\(sheetname "[^"]*"\)', t).group(0) + '\n\t\t' + sheet.group(0)) if sheet else '' + pads = [] + for p in dims['pads']: + ang = (p['rot'] + rot) % 360 + angtxt = f' {ang:g}' if ang else '' + drill = f'\n\t\t\t(drill {p["drill"]:g})' if p['drill'] else '' + rr = f'\n\t\t\t(roundrect_rratio {p["rratio"]})' if p['rratio'] else '' + nettxt = f'\n\t\t\t{N(padnets[p["num"]])}' if p['num'] in padnets else '' + layers = p['layers'].replace('*.Cu *.Mask', '"*.Cu" "*.Mask"') if '"' not in p['layers'] else p['layers'] + pads.append(f'''\t\t(pad "{p['num']}" {p['kind']} {p['shape']} +\t\t\t(at {p['x']:g} {p['y']:g}{angtxt}) +\t\t\t(size {p['sx']:g} {p['sy']:g}){drill} +\t\t\t(layers {layers}){rr}{nettxt} +\t\t\t(uuid "{NU()}") +\t\t)''') + crt = dims['crt'] + crt_txt = '' + if crt: + crt_txt = f'''\t\t(fp_rect +\t\t\t(start {crt[0]:g} {crt[1]:g}) +\t\t\t(end {crt[2]:g} {crt[3]:g}) +\t\t\t(stroke +\t\t\t\t(width 0.05) +\t\t\t\t(type default) +\t\t\t) +\t\t\t(fill no) +\t\t\t(layer "F.CrtYd") +\t\t\t(uuid "{NU()}") +\t\t)''' + nl = '\n\t' + return f'''(footprint "{libname}" +\t\t(layer "F.Cu") +\t\t(uuid "{NU()}") +\t\t(at {x:g} {y:g}{(" %g"%rot) if rot else ""}) +\t\t{nl.join(prop_txt)} +\t\t{path_txt} +\t\t{sheet_txt} +\t\t{attr_txt} +{crt_txt} +{chr(10).join(pads)} +\t)''' + +INS = [] +report = collections.defaultdict(list) + +# ---------------- deletions ---------------- +del_spans = [by_ref(r)['span'] for r in ('J1', 'J2', 'Rts1', 'Rtp1', 'P6')] +report['removed'] = ['J1', 'J2', 'Rts1', 'Rtp1', 'P6(1x04)'] + +# ---------------- P6 swap (B2B clone at old position) ---------------- +p6nets = {p['num']: p['net'] for p in pads_of(P6old['blk']) if p['net']} +INS.append(retarget(T_B2B, 'P6', 'FAN 2-pin', 'Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical', + P6old['x'], P6old['y'], P6old['rot'], + {'1': p6nets.get('1', '5V_FAN'), '2': p6nets.get('2', 'FAN_RET')})) +b = fp_bbox(dict(blk=INS[-1], x=P6old['x'], y=P6old['y'], rot=P6old['rot'])) +occ.append(('P6new', b)) +report['placed'].append(('P6', P6old['x'], P6old['y'], 'B2B swap in place')) + +# ---------------- relocate W5500-era passives out of the U16 zone ---------------- +RELOC = ['C102', 'C90', 'C91', 'C96', 'R96', 'R97'] +occ[:] = [(r, bb) for r, bb in occ if r not in RELOC] +# ---------------- U16 ---------------- +w = LQFP64['crt'][2]-LQFP64['crt'][0]; h = LQFP64['crt'][3]-LQFP64['crt'][1] +ux, uy = place(w+0.4, h+0.4, 94.0, 71.0, fixed=True, label='U16') +for rref in RELOC: + rf = by_ref(rref) + rbb = fp_bbox(rf); rw, rh = rbb[2]-rbb[0], rbb[3]-rbb[1] + nx, ny = place(rw+0.2, rh+0.2, 96.0, 57.0, label=rref) + del_spans.append(rf['span']) + INS.append(re.sub(r'\(at [\-0-9. ]+\)', f'(at {nx:g} {ny:g}{(" %g"%rf["rot"]) if rf["rot"] else ""})', rf['blk'], count=1)) + report['placed'].append((rref, nx, ny, 'relocated (was in U16 zone)')) +MCU_NETS = {'1':'3V3','2':'LED_C13','3':'LSE_IN','4':'LSE_OUT','5':'HSE_IN','6':'HSE_OUT', + '7':'NRST','8':'ETH_INT','12':'GND','13':'VDDA','14':'BAT_SENSE','15':'PWR_CTRL','16':'GNSS_TX', + '17':'GNSS_RX','18':'GND','19':'3V3','20':'5V_SENSE','21':'IGN_SENSE','22':'FAN_PWM','26':'EXT_LED', + '27':'NTC_TEMP','28':'BOOT1_STRAP','30':'VCAP1','31':'GND','32':'3V3','33':'ETH_CS','34':'ETH_SCK', + '35':'ETH_MISO','36':'ETH_MOSI','41':'CHRG_EN','42':'USART1_TX','43':'USART1_RX','44':'DFU_DM', + '45':'DFU_DP','46':'SWDIO','47':'GND','48':'3V3','49':'SWCLK','50':'ETH_RST','55':'CHRG_STAT', + '56':'CHRG_FAULT','57':'BYP_CTRL','58':'I2C_SCL','59':'I2C_SDA','60':'BOOT0','61':'SER_IRQ', + '63':'GND','64':'3V3'} +for extra in ['BAT_SENSE','PWR_CTRL','GNSS_TX','GNSS_RX','5V_SENSE','IGN_SENSE','FAN_PWM','EXT_LED', + 'NTC_TEMP','ETH_CS','ETH_SCK','ETH_MISO','ETH_MOSI','CHRG_EN','USART1_TX','USART1_RX', + 'SER_IRQ','CHRG_STAT','CHRG_FAULT','BYP_CTRL','I2C_SCL','I2C_SDA','ETH_RST']: + assert resolve(extra), f'net {extra} not in pcb' +INS.append(build_generic('U16', 'STM32F411RET6', 'Package_QFP:LQFP-64_10x10mm_P0.5mm', + ux, uy, 180, LQFP64, MCU_NETS, tmpl=T_LQFP)) +report['placed'].append(('U16', ux, uy, 'rot180')) + +def small(ref, value, lib, dims, n1, n2, ax, ay, tmpl=None, rot=0): + if dims and dims['crt']: + ww = dims['crt'][2]-dims['crt'][0]; hh = dims['crt'][3]-dims['crt'][1] + elif tmpl is not None: + tb = fp_bbox(dict(blk=tmpl['blk'], x=0, y=0, rot=tmpl['rot'])) + ww, hh = tb[2]-tb[0]+0.4, tb[3]-tb[1]+0.4 + else: + ww, hh = 2.4, 1.4 + if rot in (90, 270): ww, hh = hh, ww + cx, cy = place(ww+0.2, hh+0.2, ax, ay, label=ref) + padnets = {'1': n1, '2': n2} + if dims: INS.append(build_generic(ref, value, lib, cx, cy, rot, dims, padnets, tmpl=tmpl)) + else: INS.append(retarget(tmpl, ref, value, lib, cx, cy, rot, padnets)) + report['placed'].append((ref, cx, cy, value)) + return cx, cy + +R_LIB = 'Resistor_SMD:R_0603_1608Metric'; C_LIB = 'Capacitor_SMD:C_0603_1608Metric' +# clone 0603 R/C via retarget (same lib) — dims=None path +def r0603(ref, val, n1, n2, ax, ay): return small(ref, val, R_LIB, None, n1, n2, ax, ay, tmpl=T_R) +def c0603(ref, val, n1, n2, ax, ay): return small(ref, val, C_LIB, None, n1, n2, ax, ay, tmpl=T_C) + +# decoupling ring around U16 +c0603('C105', '100nF', '3V3', 'GND', ux-7.5, uy-7.5) +c0603('C106', '100nF', '3V3', 'GND', ux+7.5, uy-7.5) +c0603('C107', '100nF', '3V3', 'GND', ux-7.5, uy+7.5) +c0603('C108', '100nF', '3V3', 'GND', ux+7.5, uy+7.5) +c0603('C110', '4.7uF', '3V3', 'GND', ux, uy-8.2) +c0603('C111', '4.7uF', 'VCAP1', 'GND', ux, uy+8.2) +c0603('C104', '100nF', 'NRST', 'GND', ux-8.2, uy-5) +r0603('R99', '10k', 'BOOT1_STRAP', 'GND', ux-8.2, uy+3) +# VDDA filter south +r0603('R104', '10R', '3V3', 'VDDA', ux-3, uy+8.9) +c0603('C109', '100nF', 'VDDA', 'GND', ux+3, uy+8.9) +c0603('C112', '1uF', 'VDDA', 'GND', ux+5.8, uy+8.9) +# crystals east of U16 +small('Y3', '25MHz', T_HC49['lib'], None, 'HSE_IN', 'HSE_OUT', ux+11, uy+3, tmpl=T_HC49) +c0603('C113', '15pF', 'HSE_IN', 'GND', ux+11, uy+6.5) +c0603('C114', '15pF', 'HSE_OUT', 'GND', ux+14, uy+6.5) +small('Y4', '32.768kHz', 'Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm', X3215, 'LSE_IN', 'LSE_OUT', ux+11, uy-3) +c0603('C115', '12pF', 'LSE_IN', 'GND', ux+14, uy-3) +c0603('C116', '12pF', 'LSE_OUT', 'GND', ux+14, uy-0.5) +# BOOT0 pulldown near MCU +r0603('R98', '10k', 'BOOT0', 'GND', ux+8.2, uy+3) + +# J11 USB-C at left edge (fixed) — clone J9, rot per convention: mouth (-x) +for rref in ['C83']: + rf = by_ref(rref) + occ[:] = [(r, bb) for r, bb in occ if r != rref] + rbb = fp_bbox(rf); rw, rh = rbb[2]-rbb[0], rbb[3]-rbb[1] + nx, ny = place(rw+0.2, rh+0.2, 79.0, 86.0, label=rref) + del_spans.append(rf['span']) + INS.append(re.sub(r'\(at [\-0-9. ]+\)', f'(at {nx:g} {ny:g}{(" %g"%rf["rot"]) if rf["rot"] else ""})', rf['blk'], count=1)) + report['placed'].append((rref, nx, ny, 'relocated (was in J11 zone)')) +mouth_rot = 90 if ROTSGN == 1 else 270 +jx, jy = 71.11, 92.0 +jblk = retarget(T_USB, 'J11', 'USB-C DFU', T_USB['lib'], jx, jy, mouth_rot, + {'A1':'GND','B1':'GND','A12':'GND','B12':'GND', + 'A4':'DFU_VBUS','A9':'DFU_VBUS','B4':'DFU_VBUS','B9':'DFU_VBUS', + 'A5':'DFU_CC1','B5':'DFU_CC2','A6':'DFU_DP','B6':'DFU_DP', + 'A7':'DFU_DM','B7':'DFU_DM','A8':'','B8':'','SH':'GND'}) +bb = fp_bbox(dict(blk=jblk, x=jx, y=jy, rot=mouth_rot)) +assert clear(bb, 0.25), f'J11 blocked at {bb} by {colliders(bb, 0.25)}' +occ.append(('J11', bb)); INS.append(jblk) +report['placed'].append(('J11', jx, jy, f'rot{mouth_rot} mouth-west')) +# CC + TVS east of J11 +r0603('R100', '5.1k', 'DFU_CC1', 'GND', 79.5, 89) +r0603('R101', '5.1k', 'DFU_CC2', 'GND', 79.5, 91.5) +small('D14', 'PESD5V0S1BA', 'Diode_SMD:D_SOD-323', SOD323, 'DFU_DP', 'GND', 79.5, 94) +small('D15', 'PESD5V0S1BA', 'Diode_SMD:D_SOD-323', SOD323, 'DFU_DM', 'GND', 79.5, 96.5) +small('D16', 'PESD5V0S1BA', 'Diode_SMD:D_SOD-323', SOD323, 'DFU_VBUS', 'GND', 79.5, 99) +# LDO cluster (under shield, SMD) +small('D12', 'SS34', T_SMA['lib'], None, 'LDO_IN', 'SYS5V', 84, 101, tmpl=T_SMA) +small('D13', 'SS34', T_SMA['lib'], None, 'LDO_IN', 'DFU_VBUS', 84, 104.5, tmpl=T_SMA) +sx_, sy_ = place((SOT223['crt'][2]-SOT223['crt'][0])+0.2, (SOT223['crt'][3]-SOT223['crt'][1])+0.2, 91, 102.5, label='U17') +INS.append(build_generic('U17', 'AMS1117-3.3', 'Package_TO_SOT_SMD:SOT-223-3_TabPin2', sx_, sy_, 0, + SOT223, {'1':'GND','2':'3V3','3':'LDO_IN','4':'3V3'})) +report['placed'].append(('U17', sx_, sy_, 'AMS1117')) +ctmpl = T_C0805 or T_C +small('C117', '10uF', 'Capacitor_SMD:C_0805_2012Metric' if T_C0805 else C_LIB, None, 'LDO_IN', 'GND', 96.5, 100, tmpl=ctmpl) +small('C118', '22uF/16V', 'Capacitor_SMD:C_0805_2012Metric' if T_C0805 else C_LIB, None, '3V3', 'GND', 96.5, 103, tmpl=ctmpl) +# LEDs + resistors near USB (visible, not under shield) +small('D17', 'LED C13 (blue)', 'LED_SMD:LED_0603_1608Metric', LED063, 'LED_C13', 'LED_C13_A', 64.5, 84) +small('D18', 'LED PWR (green)', 'LED_SMD:LED_0603_1608Metric', LED063, 'GND', 'LED_PWR_A', 64.5, 86.6) +r0603('R102', '1k', '3V3', 'LED_C13_A', 67.3, 84) +r0603('R103', '1k', '3V3', 'LED_PWR_A', 67.3, 86.6) +# SW2 BOOT0 next to SW1 +swp = pads_of(T_SW['blk']); swnets = {p['num'] for p in swp} +sw_nets = {} +for p in swp: + sw_nets[p['num']] = 'BOOT0' if p['net'] and 'RESET' not in (p['net'] or '') else None +# simple: SW_Push pads 1/2 -> 3V3/BOOT0 (both pads of each side share) +padmap = {} +for p in swp: + padmap[p['num']] = '3V3' if p['num'] in ('1', '3') else 'BOOT0' +sxw, syw = 191.0, 133.3 +blk = retarget(T_SW, 'SW2', 'BOOT0', T_SW['lib'], sxw, syw, T_SW['rot'], padmap) +bb = fp_bbox(dict(blk=blk, x=sxw, y=syw, rot=T_SW['rot'])) +if not clear(bb, 0.25): + placed = False + for ax, ay in [(66, 81), (203, 127.5), (155.5, 133), (189, 126), (127, 60)]: + try: + sxw, syw = place(bb[2]-bb[0]+0.4, bb[3]-bb[1]+0.4, ax, ay, label='SW2') + placed = True; break + except RuntimeError: + continue + assert placed, 'SW2: no home found' + blk = retarget(T_SW, 'SW2', 'BOOT0', T_SW['lib'], sxw, syw, T_SW['rot'], padmap) +else: + occ.append(('SW2', bb)) +INS.append(blk); report['placed'].append(('SW2', sxw, syw, 'BOOT0 button')) +# SWD test points row (north strip) +for i, (ref, net) in enumerate([('TP3','SWDIO'),('TP4','SWCLK'),('TP5','NRST'),('TP6','GND'),('TP7','3V3')]): + txp, typ = place(2.2, 2.2, 116+i*2.8, 57.5, label=ref) + INS.append(retarget(T_TP, ref, net, T_TP['lib'], txp, typ, 0, {'1': net})) + report['placed'].append((ref, txp, typ, net)) +# Y1 / Y2 moves: rewrite (at) in their blocks +Y1f = by_ref('Y1'); Y2f = by_ref('Y2') +y1x, y1y = place(12.4, 6.0, 104.5, 56.5, label='Y1') +y2x, y2y = place(12.4, 6.0, 80.0, 106.5, label='Y2') +def move_block(f, nx, ny): + nb = re.sub(r'\(at [\-0-9. ]+\)', f'(at {nx:g} {ny:g}{(" %g"%f["rot"]) if f["rot"] else ""})', f['blk'], count=1) + return nb +del_spans.append(Y1f['span']); INS.append(move_block(Y1f, y1x, y1y)) +del_spans.append(Y2f['span']); INS.append(move_block(Y2f, y2x, y2y)) +report['placed'].append(('Y1', y1x, y1y, 'moved east')); report['placed'].append(('Y2', y2x, y2y, 'moved to U10')) +# Block Q holes: 4 shield (fixed) + 2 XBee +mh_tmpl = T_MH['blk'] +def add_hole(ref, x, y, drill): + t = mh_tmpl + t = re.sub(r'\(property "Reference"\s+"[^"]+"', f'(property "Reference" "{ref}"', t, count=1) + t = re.sub(r'\(property "Value"\s+"[^"]*"', f'(property "Value" "MountingHole_M2.5"', t, count=1) + t = re.sub(r'\(at [\-0-9. ]+\)', f'(at {x:g} {y:g})', t, count=1) + t = re.sub(r'\(drill [0-9.]+\)', f'(drill {drill:g})', t) + t = re.sub(r'\(size [0-9.]+ [0-9.]+\)', f'(size {drill:g} {drill:g})', t) + t = re.sub(r'\(uuid "[^"]*"\)', lambda m: f'(uuid "{NU()}")', t) + bb2 = (x-drill/2-0.5, y-drill/2-0.5, x+drill/2+0.5, y+drill/2+0.5) + ok = clear(bb2, 0.25) + occ.append((ref, bb2)); INS.append(t) + report['holes'].append((ref, x, y, drill, 'CLEAR' if ok else '⚠ TIGHT — review')) +for i, (hx, hy) in enumerate(shield_holes): + add_hole(f'MH{7+i}', hx, hy, 2.75) +add_hole('MH11', 178.0, 60.5, 2.75) +add_hole('MH12', 185.35, 91.5, 2.75) + +# ---------------- title date ---------------- +text_patches = [] +m = re.search(r'\(title_block.*?\(date "([^"]*)"\)', src, re.S) +if m: + a = m.start(1) - 7; b = m.end(1) + 2 + text_patches.append((m.start(1), m.end(1), '2026-08-12')) + +# ---------------- splice ---------------- +new = src +ops = [(a, b, '') for a, b in del_spans] + [(a, b, t) for a, b, t in text_patches] +ops.sort(key=lambda o: -o[0]) +spansorted = sorted([(a, b) for a, b, _ in ops]) +for (a1, b1), (a2, b2) in zip(spansorted, spansorted[1:]): + assert b1 <= a2, 'overlap' +for a, b, t in ops: + if t == '': + a0 = a + while a0 > 0 and new[a0-1] in ' \t\n': a0 -= 1 + new = new[:a0] + '\n\t' + new[b:] + else: + new = new[:a] + t + new[b:] +# KiCad 10: no numbered net table — nets exist via pad references only +# insert footprints before final paren +end = new.rfind(')') +new = new[:end] + '\t' + '\n\t'.join(INS) + '\n' + new[end:] +open(PCB, 'w', encoding='utf-8').write(new) + +print(f'WROTE {PCB}: {len(src)} -> {len(new)} bytes; balance={new.count("(")==new.count(")")}') +print(f'new nets: {addnets}') +for k in ('removed', 'placed', 'holes'): + print(f'-- {k}:') + for item in report[k]: print(' ', item)