From 4f6e1bb3470ab199e094a5f83ae6776207749f36 Mon Sep 17 00:00:00 2001 From: "Claude (Cowork)" Date: Tue, 25 Aug 2026 22:20:39 +0000 Subject: [PATCH] v6 T4: Blocks O+P+Q+R - A7670SA LTE island complete in the schematic (33/33 net checks pass) Block O (modem): U19 A7670SA-LASC (C18548276, LGA-124) - 19 signal nets + 39 GND + 66 NC, all 124 pads accounted for. UART via 1.8V-side nets (_M suffix); USB joins J9 directly (VBUS A4/A9/B4/B9 + DP/DM); USB_BOOT -> TP8; VDD_EXT -> 1V8_MODEM (shifter reference only); NETLIGHT (1.8V) -> R109 4.7k -> Q22 MMBT3904 low-side, reusing the existing Rmled1+D4G1 LED string re-driven: MODEM_LED label -> 3V3, D4G1 cathode GND label -> MODEM_LED_K. Block P (3.8V rail): 24V -> D20 SS34 || MAIN5V -> D21 PMEG3050EP (C50603) -> VIN_MODEM -> U20 AP64350SP-13 (C2071691, 40V/3.5A) -> L20 4.7uH -> VBAT_MODEM. Values from datasheet DS41976: FB 0.8V (R110 75k / R111 20k = 3.8V), RT R117 200k = 500kHz (pin must not float), COMP R116 14k + C141 3.3nF + C142 47pF, BST C129 100nF, EP -> GND. EN = MODEM_PWR_EN (PC10) with R113 100k pull-down: rail DEFAULTS OFF (invariant #1); EN low >= 2s = HARD_CYCLE (invariant #3). Bulk: 2x 220uF/10V (C2827940) + 22uF/1uF/100nF/33pF/10pF + R112 1k bleed + D22 SMAJ5.0A TVS (C113952). VERIFY at layout: D22 pad-1-is-cathode against the fp marker. Block Q (SIM): U22 MFF2_SIM symbol (new in Drogheda-sym; FOOTPRINT TBD "Drogheda:MFF2_5x6_TBD" - build from the chosen carrier chip datasheet; PCB sync will flag it, expected). SIM_VDD 100nF + PESD5V0S1BA on DATA/CLK/RST (D23-25, C2827694, orientation cloned from D14). Block R (level shift): 2x 74LVC2T45DC (C730237, direction-fixed). U23 DIR=GND: 3V3 DIN_4G -> 1.8V DIN_4G_M. U24 DIR=1V8: DOUT_4G_M -> DOUT_4G (also feeds U18 RXD2) and MODEM_STATUS_M -> MODEM_STATUS (PC9). R106 100R taps DOUT_4G -> USART6_RX (PC7). DNP 0R bypasses R107/R108 across the RTCM path. Q20/Q21 2N7002 open-drain on PWRKEY/RESET with 100k pull-downs - MCU absent leaves the modem free (invariant #1). PWRKEY timing: SIMCom >=50ms on / >=2.5s off. CORRECTIONS this pass: (1) the schematic has 382 WIRE SEGMENTS - the earlier "zero wires" finding was a regex artifact (multi-line xy); label-on-pin work was unaffected (all verified against the PCB), but the LED relabel needed a wire-graph trace, now in the script. (2) 9 stale no_connect markers removed from MCU pins that now carry labels (PC1-PC3, PA7, PC8-PC12). (3) A7670SA is a 124-pad LGA, not the 88 claimed in the modem survey. NEXT: Leo runs ERC + Update PCB from Schematic (U22 will complain - footprint TBD, skip it), then T5 = LTC4040 input-limit errata fix + U7/L7 disposition, T6 = RF Block S + netclasses. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt --- .../kicad/Drogheda-sym.kicad_sym | 118 + .../LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.step | 66460 ++++++++++++++++ .../LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.wrl | 394 + .../SMA_L4.4-W2.6-LS5.0-RD.step | 25291 ++++++ .../SMA_L4.4-W2.6-LS5.0-RD.wrl | 164 + .../SO-8_L4.9-W3.9-H1.5-LS5.9-P1.27.step | 31850 ++++++++ .../SO-8_L4.9-W3.9-H1.5-LS5.9-P1.27.wrl | 279 + .../SOD-128_L3.7-W2.5-LS4.7-RD-1.step | 15453 ++++ .../SOD-128_L3.7-W2.5-LS4.7-RD-1.wrl | 210 + .../VSSOP-8_L2.0-W2.3-H0.9-LS3.1-P0.50.step | 44399 +++++++++++ .../VSSOP-8_L2.0-W2.3-H0.9-LS3.1-P0.50.wrl | 187 + .../kicad/Drogheda-v6.kicad_sym | 1249 + ...124_L24.0-W24.0-P1.0-A7670C-LASS.kicad_mod | 162 + .../SMA_L4.4-W2.6-LS5.0-RD.kicad_mod | 32 + ...SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP.kicad_mod | 40 + .../SOD-128_L3.7-W2.5-LS4.7-RD.kicad_mod | 32 + ...VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL.kicad_mod | 38 + .../kicad/hbox-watchdog-v6.kicad_sch | 7904 +- scripts/2026-08-25_v6_T4_lte_island.py | 407 + 19 files changed, 194631 insertions(+), 38 deletions(-) create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.step create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.wrl create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SMA_L4.4-W2.6-LS5.0-RD.step create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SMA_L4.4-W2.6-LS5.0-RD.wrl create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SO-8_L4.9-W3.9-H1.5-LS5.9-P1.27.step create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SO-8_L4.9-W3.9-H1.5-LS5.9-P1.27.wrl create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SOD-128_L3.7-W2.5-LS4.7-RD-1.step create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/SOD-128_L3.7-W2.5-LS4.7-RD-1.wrl create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/VSSOP-8_L2.0-W2.3-H0.9-LS3.1-P0.50.step create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/VSSOP-8_L2.0-W2.3-H0.9-LS3.1-P0.50.wrl create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.pretty/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.kicad_mod create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SMA_L4.4-W2.6-LS5.0-RD.kicad_mod create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP.kicad_mod create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SOD-128_L3.7-W2.5-LS4.7-RD.kicad_mod create mode 100644 03-Architecture-Hardware/kicad/Drogheda-v6.pretty/VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL.kicad_mod create mode 100644 scripts/2026-08-25_v6_T4_lte_island.py diff --git a/03-Architecture-Hardware/kicad/Drogheda-sym.kicad_sym b/03-Architecture-Hardware/kicad/Drogheda-sym.kicad_sym index b048aac..c948273 100644 --- a/03-Architecture-Hardware/kicad/Drogheda-sym.kicad_sym +++ b/03-Architecture-Hardware/kicad/Drogheda-sym.kicad_sym @@ -2113,4 +2113,122 @@ ) ) ) + (symbol "MFF2_SIM" + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "U" + (at 0 12.7 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "MFF2_SIM" + (at 0 10.16 0) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "Drogheda:MFF2_5x6_TBD" + (at 0 -5.08 0) + (effects (font (size 1.27 1.27))) + (hide yes) + ) + (property "Datasheet" "~" + (at 0 -7.62 0) + (effects (font (size 1.27 1.27))) + (hide yes) + ) + (property "Description" "MFF2 / DFN-8 5x6 mm soldered M2M SIM (ETSI TS 102 671). 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-1.52) + ) + (stroke (width 0) (type default)) + (fill (type background)) + ) + (polyline + (pts + (xy -2.29 2.29) (xy -1.27 1.27) (xy -1.27 -1.27) (xy -0.25 -2.29) + ) + (stroke (width 0) (type default)) + (fill (type none)) + ) + (pin unspecified line + (at 5.08 -0.00 180) + (length 3.81) + (name "2" (effects (font (size 1.27 1.27)))) + (number "2" (effects (font (size 1.27 1.27)))) + ) + (pin unspecified line + (at -5.08 -0.00 0) + (length 3.81) + (name "1" (effects (font (size 1.27 1.27)))) + (number "1" (effects (font (size 1.27 1.27)))) + ) + ) + ) ) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.kicad_mod b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.kicad_mod new file mode 100644 index 0000000..e513174 --- /dev/null +++ b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.kicad_mod @@ -0,0 +1,162 @@ +(module easyeda2kicad:LGA-124_L24.0-W24.0-P1.0-A7670C-LASS (layer F.Cu) (tedit 5DC5F6A4) + (attr through_hole) + (fp_text reference REF** (at 0.000 -16.000) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LGA-124_L24.0-W24.0-P1.0-A7670C-LASS (at 0.000 16.000) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (property "LCSC Part" "C18548276") + (fp_line (start -11.55 -12.40) (end -12.40 -12.40) (layer F.SilkS) (width 0.25)) + (fp_line (start -12.40 -12.40) (end -12.40 -8.55) (layer F.SilkS) (width 0.25)) + (fp_line (start -9.85 -8.85) (end -9.85 -7.40) (layer F.SilkS) (width 0.25)) + (fp_line (start -9.85 -7.40) (end -10.60 -8.10) (layer F.SilkS) (width 0.25)) + (fp_line (start -10.60 -8.10) (end -10.05 -8.65) (layer F.SilkS) (width 0.25)) + (fp_line (start -10.05 -8.65) (end -9.85 -8.85) (layer F.SilkS) (width 0.25)) + (fp_line (start 11.53 -12.00) (end 12.00 -12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start -12.00 -8.53) (end -12.00 -12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start -12.00 -12.00) (end -11.53 -12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start -11.53 12.00) (end -12.00 12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start -12.00 12.00) (end -12.00 8.53) (layer F.SilkS) (width 0.25)) + (fp_line (start 12.00 8.53) (end 12.00 12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start 12.00 12.00) (end 11.53 12.00) (layer F.SilkS) (width 0.25)) + (fp_line (start 12.00 -12.00) (end 12.00 -8.53) (layer F.SilkS) (width 0.25)) + (pad 109 smd rect (at -0.70 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 110 smd rect (at 0.70 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 108 smd rect (at -2.10 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 107 smd rect (at -3.50 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 112 smd rect (at 3.50 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 111 smd rect (at 2.10 9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 121 smd rect (at 0.70 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 122 smd rect (at -0.70 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 120 smd rect (at 2.10 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 119 smd rect (at 3.50 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 124 smd rect (at -3.50 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 123 smd rect (at -2.10 -9.80 0.00) (size 0.900 1.100) (layers F.Cu F.Paste F.Mask)) + (pad 115 smd rect (at 9.80 0.70 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 116 smd rect (at 9.80 -0.70 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 114 smd rect (at 9.80 2.10 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 113 smd rect (at 9.80 3.50 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 118 smd rect (at 9.80 -3.50 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 117 smd rect (at 9.80 -2.10 0.00) (size 1.100 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 105 smd rect (at -9.80 2.10 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 106 smd rect (at -9.80 3.50 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 101 smd rect (at -9.80 -3.50 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 102 smd rect (at -9.80 -2.10 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 104 smd rect (at -9.80 0.70 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 103 smd rect (at -9.80 -0.70 0.00) (size 1.120 0.900) (layers F.Cu F.Paste F.Mask)) + (pad 98 smd oval (at -9.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 99 smd oval (at -10.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 100 smd oval (at -11.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 97 smd oval (at 9.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 95 smd oval (at 11.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 96 smd oval (at 10.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 92 smd oval (at 9.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 93 smd oval (at 10.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 94 smd oval (at 11.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 89 smd oval (at -11.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 90 smd oval (at -10.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 91 smd oval (at -9.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 77 smd rect (at 7.60 7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 78 smd rect (at 7.60 3.81 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 79 smd rect (at 7.60 0.00 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 80 smd rect (at 7.60 -3.80 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 81 smd rect (at 7.60 -7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 76 smd rect (at 3.80 7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 87 smd rect (at 3.80 0.00 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 82 smd rect (at 3.80 -7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 75 smd rect (at 0.00 7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 86 smd rect (at 0.00 3.80 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 88 smd rect (at 0.00 -3.80 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 83 smd rect (at 0.00 -7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 74 smd rect (at -3.80 7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 85 smd rect (at -3.80 0.00 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 84 smd rect (at -3.80 -7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 73 smd rect (at -7.60 7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 72 smd rect (at -7.60 3.80 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 71 smd rect (at -7.60 0.00 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 70 smd rect (at -7.60 -3.80 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 69 smd rect (at -7.60 -7.60 0.00) (size 2.100 2.100) (layers F.Cu F.Paste F.Mask)) + (pad 53 smd oval (at 7.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 52 smd oval (at 8.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 68 smd oval (at -8.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 67 smd oval (at -7.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 66 smd oval (at -6.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 65 smd oval (at -5.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 64 smd oval (at -4.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 63 smd oval (at -3.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 62 smd oval (at -2.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 61 smd oval (at -1.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 60 smd oval (at 0.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 59 smd oval (at 1.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 58 smd oval (at 2.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 57 smd oval (at 3.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 56 smd oval (at 4.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 55 smd oval (at 5.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 54 smd oval (at 6.00 -12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 51 smd oval (at 12.00 -8.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 50 smd oval (at 12.00 -7.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 49 smd oval (at 12.00 -6.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 48 smd oval (at 12.00 -5.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 47 smd oval (at 12.00 -4.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 46 smd oval (at 12.00 -3.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 45 smd oval (at 12.00 -2.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 44 smd oval (at 12.00 -1.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 43 smd oval (at 12.00 0.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 42 smd oval (at 12.00 1.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 41 smd oval (at 12.00 2.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 40 smd oval (at 12.00 3.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 39 smd oval (at 12.00 4.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 38 smd oval (at 12.00 5.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 37 smd oval (at 12.00 6.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 36 smd oval (at 12.00 7.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 35 smd oval (at 12.00 8.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 34 smd oval (at 8.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 33 smd oval (at 7.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 32 smd oval (at 6.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 31 smd oval (at 5.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 30 smd oval (at 4.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 29 smd oval (at 3.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 28 smd oval (at 2.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 27 smd oval (at 1.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 26 smd oval (at 0.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 25 smd oval (at -1.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 24 smd oval (at -2.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 23 smd oval (at -3.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 22 smd oval (at -4.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 21 smd oval (at -5.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 20 smd oval (at -6.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 19 smd oval (at -7.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 18 smd oval (at -8.00 12.00 0.00) (size 0.600 2.000) (layers F.Cu F.Paste F.Mask)) + (pad 17 smd oval (at -12.00 8.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 16 smd oval (at -12.00 7.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 15 smd oval (at -12.00 6.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 14 smd oval (at -12.00 5.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 13 smd oval (at -12.00 4.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 12 smd oval (at -12.00 3.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 11 smd oval (at -12.00 2.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 10 smd oval (at -12.00 1.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 9 smd oval (at -12.00 0.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 8 smd oval (at -12.00 -1.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd oval (at -12.00 -2.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd oval (at -12.00 -3.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd oval (at -12.00 -4.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd oval (at -12.00 -5.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd oval (at -12.00 -6.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd oval (at -12.00 -7.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd oval (at -12.00 -8.00 0.00) (size 2.000 0.600) (layers F.Cu F.Paste F.Mask)) + (fp_circle (center -12.00 -12.00) (end -11.97 -12.00) (layer F.SilkS) (width 0.06)) + (fp_line (start -12.00 12.00) (end -12.00 -12.00) (layer F.CrtYd) (width 0.05)) + (fp_line (start -12.00 -12.00) (end 12.00 -12.00) (layer F.CrtYd) (width 0.05)) + (fp_line (start 12.00 -12.00) (end 12.00 12.00) (layer F.CrtYd) (width 0.05)) + (fp_line (start 12.00 12.00) (end -12.00 12.00) (layer F.CrtYd) (width 0.05)) + (fp_poly (pts (xy -9.849968 -8.849970) (xy -9.849968 -7.549972) (xy -10.049332 -7.549972) (xy -10.599420 -8.100060) (xy -9.849968 -8.849970)) (stroke (width 0) (type solid)) (fill solid) (layer "F.SilkS")) + (model "/Users/leo/Documents/Claude/Projects/Drogheda/03-Architecture-Hardware/kicad/Drogheda-v6.3dshapes/LGA-124_L24.0-W24.0-P1.0-A7670C-LASS.wrl" + (offset (xyz 0.000 0.000 0.000)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SMA_L4.4-W2.6-LS5.0-RD.kicad_mod b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SMA_L4.4-W2.6-LS5.0-RD.kicad_mod new file mode 100644 index 0000000..bc26518 --- /dev/null +++ b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SMA_L4.4-W2.6-LS5.0-RD.kicad_mod @@ -0,0 +1,32 @@ +(module easyeda2kicad:SMA_L4.4-W2.6-LS5.0-RD (layer F.Cu) (tedit 5DC5F6A4) + (attr smd) + (fp_text reference REF** (at 0.000 -4.000) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value SMA_L4.4-W2.6-LS5.0-RD (at 0.000 4.000) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (property "LCSC Part" "C113952") + (fp_line (start -1.20 -1.40) (end -1.20 1.40) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.73 -1.40) (end 2.73 -1.40) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.73 1.40) (end 2.73 1.40) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.73 -1.40) (end 2.73 -1.00) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.73 1.40) (end 2.73 1.00) (layer F.SilkS) (width 0.15)) + (pad 2 smd rect (at 2.19 0.00 0.00) (size 1.800 1.700) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd rect (at -2.19 0.00 0.00) (size 1.800 1.700) (layers F.Cu F.Paste F.Mask)) + (fp_circle (center -2.55 1.25) (end -2.52 1.25) (layer F.SilkS) (width 0.06)) + (fp_line (start -2.15 1.25) (end -2.15 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.15 -1.25) (end 2.15 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.15 -1.25) (end 2.15 1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.15 1.25) (end -2.15 1.25) (layer F.CrtYd) (width 0.05)) + (fp_poly (pts (xy -2.650007 -1.477391) (xy -2.650007 -0.948893) (xy -3.107207 -0.948893) (xy -3.107207 -1.477391) (xy -2.650007 -1.477391)) (stroke (width 0) (type solid)) (fill solid) (layer "F.SilkS")) + (fp_poly (pts (xy -2.650007 1.477391) (xy -2.650007 0.948893) (xy -3.107207 0.948893) (xy -3.107207 1.477391) (xy -2.650007 1.477391)) (stroke (width 0) (type solid)) (fill solid) (layer "F.SilkS")) + (model "Drogheda-v6.3dshapes/SMA_L4.4-W2.6-LS5.0-RD.wrl" + (offset (xyz 0.000 0.000 0.000)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP.kicad_mod b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP.kicad_mod new file mode 100644 index 0000000..3401327 --- /dev/null +++ b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP.kicad_mod @@ -0,0 +1,40 @@ +(module easyeda2kicad:SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP (layer F.Cu) (tedit 5DC5F6A4) + (attr smd) + (fp_text reference REF** (at 0.000 -7.000) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP (at 0.000 7.000) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (property "LCSC Part" "C2071691") + (fp_line (start -2.50 -2.00) (end -2.50 -0.45) (layer F.SilkS) (width 0.13)) + (fp_line (start 2.50 -2.00) (end 2.50 2.00) (layer F.SilkS) (width 0.13)) + (fp_line (start -2.50 -2.00) (end 2.50 -2.00) (layer F.SilkS) (width 0.13)) + (fp_line (start -2.50 2.00) (end 2.50 2.00) (layer F.SilkS) (width 0.13)) + (fp_line (start -2.50 2.00) (end -2.50 0.38) (layer F.SilkS) (width 0.13)) + (pad 8 smd oval (at -1.90 -3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd oval (at -1.90 3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd oval (at -0.63 -3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd oval (at 0.64 -3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd oval (at 1.91 -3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd oval (at -0.63 3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd oval (at 0.64 3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd oval (at 1.91 3.00 0.00) (size 0.600 1.600) (layers F.Cu F.Paste F.Mask)) + (pad 9 smd rect (at 0.00 -0.00 0.00) (size 3.200 2.500) (layers F.Cu F.Paste F.Mask)) + (fp_circle (center -2.51 2.98) (end -2.48 2.98) (layer F.SilkS) (width 0.06)) + (fp_circle (center -2.12 1.48) (end -1.95 1.48) (layer F.SilkS) (width 0.25)) + (fp_circle (center -1.90 3.24) (end -1.80 3.24) (layer Cmts.User) (width 0.20)) + (fp_arc (start -2.50 -0.04) (end -2.50 0.38) (angle -180.00) (layer F.SilkS) (width 0.13)) + (fp_line (start 2.50 -2.03) (end 2.50 1.97) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.50 1.97) (end -2.50 1.97) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.50 1.97) (end -2.50 -2.03) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.50 -2.03) (end 2.50 -2.03) (layer F.CrtYd) (width 0.05)) + (model "Drogheda-v6.3dshapes/SO-8_L4.9-W3.9-H1.5-LS5.9-P1.27.wrl" + (offset (xyz 0.000 0.000 0.000)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) +) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SOD-128_L3.7-W2.5-LS4.7-RD.kicad_mod b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SOD-128_L3.7-W2.5-LS4.7-RD.kicad_mod new file mode 100644 index 0000000..65ff9b2 --- /dev/null +++ b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/SOD-128_L3.7-W2.5-LS4.7-RD.kicad_mod @@ -0,0 +1,32 @@ +(module easyeda2kicad:SOD-128_L3.7-W2.5-LS4.7-RD (layer F.Cu) (tedit 5DC5F6A4) + (attr smd) + (fp_text reference REF** (at 0.000 -4.000) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value SOD-128_L3.7-W2.5-LS4.7-RD (at 0.000 4.000) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (property "LCSC Part" "C50603") + (fp_line (start -1.98 -1.30) (end 1.98 -1.30) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.98 -1.30) (end 1.98 -1.11) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.98 1.30) (end 1.98 1.30) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.98 1.30) (end 1.98 1.11) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.47 -1.30) (end -1.47 1.30) (layer F.SilkS) (width 0.15)) + (pad 2 smd rect (at 2.20 0.00 180.00) (size 1.250 1.700) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd rect (at -2.20 0.00 180.00) (size 1.250 1.700) (layers F.Cu F.Paste F.Mask)) + (fp_circle (center -2.35 1.23) (end -2.32 1.23) (layer F.SilkS) (width 0.06)) + (fp_line (start -1.90 1.22) (end -1.90 -1.22) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.90 -1.22) (end 1.90 -1.22) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.90 -1.22) (end 1.90 1.22) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.90 1.22) (end -1.90 1.22) (layer F.CrtYd) (width 0.05)) + (fp_poly (pts (xy -1.899996 -1.377391) (xy -1.899996 -0.999998) (xy -2.204796 -0.999998) (xy -2.204796 -1.377391) (xy -1.899996 -1.377391)) (stroke (width 0) (type solid)) (fill solid) (layer "F.SilkS")) + (fp_poly (pts (xy -1.899996 1.377391) (xy -1.899996 0.999998) (xy -2.204796 0.999998) (xy -2.204796 1.377391) (xy -1.899996 1.377391)) (stroke (width 0) (type solid)) (fill solid) (layer "F.SilkS")) + (model "Drogheda-v6.3dshapes/SOD-128_L3.7-W2.5-LS4.7-RD-1.wrl" + (offset (xyz 0.000 0.000 0.000)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL.kicad_mod b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL.kicad_mod new file mode 100644 index 0000000..92a4b67 --- /dev/null +++ b/03-Architecture-Hardware/kicad/Drogheda-v6.pretty/VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL.kicad_mod @@ -0,0 +1,38 @@ +(module easyeda2kicad:VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL (layer F.Cu) (tedit 5DC5F6A4) + (attr smd) + (fp_text reference REF** (at 0.000 -5.550) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL (at 0.000 5.550) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (property "LCSC Part" "C730237") + (fp_line (start -1.00 0.90) (end 1.00 0.90) (layer F.SilkS) (width 0.20)) + (fp_line (start 1.00 0.90) (end 1.00 -0.90) (layer F.SilkS) (width 0.20)) + (fp_line (start 1.00 -0.90) (end -1.00 -0.90) (layer F.SilkS) (width 0.20)) + (fp_line (start -1.02 -0.25) (end -1.02 -0.90) (layer F.SilkS) (width 0.20)) + (fp_line (start -1.02 0.25) (end -1.02 0.90) (layer F.SilkS) (width 0.20)) + (pad 8 smd oval (at -0.75 -1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd oval (at -0.25 -1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd oval (at 0.25 -1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd oval (at 0.75 -1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd oval (at 0.75 1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd oval (at 0.25 1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd oval (at -0.25 1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd oval (at -0.75 1.55 -90.00) (size 0.800 0.280) (layers F.Cu F.Paste F.Mask)) + (fp_circle (center -0.87 1.87) (end -0.77 1.87) (layer Cmts.User) (width 0.20)) + (fp_circle (center -1.00 1.55) (end -0.95 1.55) (layer F.SilkS) (width 0.10)) + (fp_arc (start -1.02 0.00) (end -1.02 -0.25) (angle 180.00) (layer F.SilkS) (width 0.20)) + (fp_line (start -1.00 -1.15) (end 1.00 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.00 -1.15) (end 1.00 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.00 1.15) (end -1.00 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.00 1.15) (end -1.00 -1.15) (layer F.CrtYd) (width 0.05)) + (model "Drogheda-v6.3dshapes/VSSOP-8_L2.0-W2.3-H0.9-LS3.1-P0.50.wrl" + (offset (xyz 0.000 0.000 0.000)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 270)) + ) +) \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch b/03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch index f2fc303..39d9855 100644 --- a/03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch +++ b/03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch @@ -18356,6 +18356,1369 @@ ) (embedded_fonts no) ) + + (symbol "Drogheda-v6:A7670SA-LASC" + (in_bom yes) + (on_board yes) + (property + "Reference" + "U" + (id 0) + (at 0 82.55 0) + (effects (font (size 1.27 1.27) ) ) + ) + (property + "Value" + "A7670SA-LASC" + (id 1) + (at 0 -82.55 0) + (effects (font (size 1.27 1.27) ) ) + ) + (property + "Footprint" + "Drogheda-v6:LGA-124_L24.0-W24.0-P1.0-A7670C-LASS" + (id 2) + (at 0 -85.09 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (property + "Datasheet" + "https://www.lcsc.com/datasheet/C18548276.pdf" + (id 3) + (at 0 -87.63 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (property + "Manufacturer" + "SIMCOM(芯讯通无线科技)" + (id 4) + (at 0 -90.17 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (property + "MPN" + "A7670SA-LASC" + (id 5) + (at 0 -92.71 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (property + "LCSC Part" + "C18548276" + (id 6) + (at 0 -95.25 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (property + "ki_keywords" + "2G/3G/4G/5G Modules" + (id 8) + (at 0 -97.79 0) + (effects (font (size 1.27 1.27) ) hide) + ) + (symbol "A7670SA-LASC_0_1" + (rectangle + (start -21.59 80.01) + (end 19.05 -80.01) + (stroke (width 0) (type default)) + (fill (type background)) + ) + (circle + (center -20.32 78.74) + (radius 0.38) + (stroke (width 0) (type default)) + (fill (type none)) + ) + (pin unspecified line + (at -24.13 77.47 0) + (length 2.54) + (name "PWRKEY" (effects (font (size 1.27 1.27)))) + (number "1" (effects (font (size 1.27 1.27)))) + ) + (pin unspecified line + (at -24.13 74.93 0) + (length 2.54) + (name "GND" (effects (font (size 1.27 1.27)))) + (number "2" (effects (font (size 1.27 1.27)))) + ) + (pin unspecified line + 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(length 5.08) + (name "GND" + (effects (font (size 1.27 1.27))) + ) + (number "5" + (effects (font (size 1.27 1.27))) + ) + ) + (pin passive line + (at 12.7 -2.54 180) + (length 5.08) + (name "VPP" + (effects (font (size 1.27 1.27))) + ) + (number "6" + (effects (font (size 1.27 1.27))) + ) + ) + (pin bidirectional line + (at 12.7 2.54 180) + (length 5.08) + (name "IO" + (effects (font (size 1.27 1.27))) + ) + (number "7" + (effects (font (size 1.27 1.27))) + ) + ) + (pin passive line + (at 12.7 0 180) + (length 5.08) + (name "NC8" + (effects (font (size 1.27 1.27))) + ) + (number "8" + (effects (font (size 1.27 1.27))) + ) + ) + ) + ) ) (rectangle (start 383.54 32.512) @@ -18566,10 +19929,6 @@ (at 820.42 90.17) (uuid "2ea958dc-e2b3-4d18-8091-dd6c41e1aa08") ) - (no_connect - (at 482.6 424.18) - (uuid "3090056b-e8fd-42a1-b7ab-afb2d5cf7554") - ) (no_connect (at 732.79 97.79) (uuid "32ea0dce-e871-4ea1-b002-dbcde14480f6") @@ -18586,10 +19945,6 @@ (at 459.84 150.48) (uuid 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(at 387 287 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MMBT3904" + (at 393 287 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "Package_TO_SOT_SMD:SOT-23" + (at 390 290 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 390 290 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 390 290 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "f3bdb57e-a96a-4022-8079-df78430a17a3") + ) + (pin "2" + (uuid "5c70c35c-9059-47f9-9031-9571e48c1361") + ) + (pin "3" + (uuid "ce25bdca-abe4-4dce-94bb-fc9882633cd9") + ) + (instances + (project "hbox-watchdog-v6" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "Q22") + (unit 1) + ) + ) + ) + ) + (label "Q22_BASE" + (at 384.92 290 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "c02214bd-5dfe-44aa-ab10-fc16218f5593") + ) + (label "GND" + (at 392.54 295.08 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "40cc7567-5421-4044-9347-d8b6aa73d45a") + ) + (label "MODEM_LED_K" + (at 392.54 284.92 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "b14d48e0-5720-4f2f-ab69-73d3727d4073") + ) + (symbol + (lib_id "Connector:TestPoint") + (at 420 300 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "b662925f-2cbf-42a6-959c-0c326d7b07a9") + (property "Reference" "TP8" + (at 417 297 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "USB_BOOT" + (at 423 297 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "TestPoint:TestPoint_Pad_D1.5mm" + (at 420 300 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 420 300 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 420 300 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "b8dd7f68-2d08-4d18-b37c-0f010cb643d8") + ) + (instances + (project "hbox-watchdog-v6" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "TP8") + (unit 1) + ) + ) + ) + ) + (label "MODEM_BOOT" + (at 420 300 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "c65b86a3-e7c6-4a3e-9745-905e8ff41956") + ) + (symbol + (lib_id "power:PWR_FLAG") + (at 300 255 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "397ab2f2-7215-45d7-92a5-837591642fb2") + (property "Reference" "PF15" + (at 297 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "PWR_FLAG" + (at 303 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 300 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 300 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 300 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "42578f89-4111-4256-9979-6f9d9f50f486") + ) + (instances + (project "hbox-watchdog-v6" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "PF15") + (unit 1) + ) + ) + ) + ) + (label "VIN_MODEM" + (at 300 255 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "b582c4fd-a440-496f-8fdf-938e46085427") + ) + (symbol + (lib_id "power:PWR_FLAG") + (at 310 255 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "bd09ffe9-6b67-4fe9-8664-81265eb6972e") + (property "Reference" "PF16" + (at 307 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "PWR_FLAG" + (at 313 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 310 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 310 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 310 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "6fa1fa29-bad1-49b9-8696-ca046c903eb6") + ) + (instances + (project "hbox-watchdog-v6" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "PF16") + (unit 1) + ) + ) + ) + ) + (label "VBAT_MODEM" + (at 310 255 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "9deb4685-0ed5-49d0-8075-06937cf7fcfe") + ) + (symbol + (lib_id "power:PWR_FLAG") + (at 320 255 0) + (unit 1) + (body_style 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (in_pos_files yes) + (dnp no) + (uuid "c35df5fc-a591-494e-b98b-c29456807f0c") + (property "Reference" "PF17" + (at 317 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "PWR_FLAG" + (at 323 252 0) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 320 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Datasheet" "~" + (at 320 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Description" "" + (at 320 255 0) + (hide yes) + (show_name no) + (do_not_autoplace no) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (pin "1" + (uuid "88ada770-a6ef-4954-bd64-78cbb38953b6") + ) + (instances + (project "hbox-watchdog-v6" + (path "/561403b3-895e-4153-a7be-3876ae930d43" + (reference "PF17") + (unit 1) + ) + ) + ) + ) + (label "1V8_MODEM" + (at 320 255 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "a1b2e997-2e8f-4263-997e-e4597720c52a") + ) + (label "MODEM_PWRKEY" + (at 482.6 436.88 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "b6b86238-84d4-4a9d-9dbe-85fff60c3fdf") + ) + (label "MODEM_STATUS" + (at 482.6 439.42 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "c42d8914-b7d7-4c02-86a5-be0084d6d976") + ) + (label "MODEM_PWR_EN" + (at 482.6 441.96 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "b6aa580d-4e3a-4e8e-9356-ac773ae62614") + ) + (label "MODEM_RST" + (at 482.6 444.5 180) + (effects + (font + (size 1.27 1.27) + ) + (justify right bottom) + ) + (uuid "9bc5abb8-259c-46b7-a649-edf9cd3beb3c") + ) ) diff --git a/scripts/2026-08-25_v6_T4_lte_island.py b/scripts/2026-08-25_v6_T4_lte_island.py new file mode 100644 index 0000000..7bbe265 --- /dev/null +++ b/scripts/2026-08-25_v6_T4_lte_island.py @@ -0,0 +1,407 @@ +#!/usr/bin/env python3 +"""v6 T4 - Blocks O+P+Q+R: A7670SA modem, 3.8V OR-input rail, MFF2 SIM, level shifters. + +Sources of record: A7670SA pin map = EasyEDA/LCSC C18548276 symbol (VBAT 55/56/57, RF_ANT 60 +match the SIMCom HW design guide). AP64350 values = datasheet DS41976: Vref 0.8V, RT 200k += 500kHz (must not float), COMP 14k+3.3nF(+47pF), BST 100nF, L 4.7uH, EP->GND. + +Usage: python3 2026-08-25_v6_T4_lte_island.py [--apply] +""" +import os, sys, shutil, uuid, re + +KI = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', '03-Architecture-Hardware', 'kicad') +SCH = os.path.join(KI, 'hbox-watchdog-v6.kicad_sch') +DSYM= os.path.join(KI, 'Drogheda-sym.kicad_sym') +VSYM= os.path.join(KI, 'Drogheda-v6.kicad_sym') +PCB = os.path.join(KI, 'hbox-watchdog-v6.kicad_pcb') +APPLY = '--apply' in sys.argv +ROOT = '/561403b3-895e-4153-a7be-3876ae930d43' +NC = '' + +def f(v): + v = 0.0 if abs(v) < 1e-9 else v + return '%.10g' % v + +def bal(t): + d=0; instr=False; esc=False + for ch in t: + if esc: esc=False; continue + if ch=='\\': esc=True; continue + if ch=='"': instr = not instr; continue + if instr: continue + if ch=='(': d+=1 + elif ch==')': d-=1 + return d + +def span_from(text, i): + d=0; instr=False; esc=False; j=i + while j < len(text): + ch=text[j] + if esc: esc=False + elif ch=='\\': esc=True + elif ch=='"': instr = not instr + elif not instr: + if ch=='(': d+=1 + elif ch==')': + d-=1 + if d==0: return j+1 + j+=1 + raise ValueError('unbalanced') + +PIN_RE = re.compile(r'\(pin \w+ \w+\s*\(?at ([-\d.]+) ([-\d.]+) (\d+)\)(?:(?!\(pin ).)*?\(number "([^"]+)"', re.S) +PIN_RE2= re.compile(r'\(pin \w+ \w+\s*\n\s*\(at ([-\d.]+) ([-\d.]+) (\d+)\)(?:(?!\(pin ).)*?\(number "([^"]+)"', re.S) + +def libpins(libsrc, name): + i = libsrc.find('(symbol "%s"' % name) + if i < 0: return None + j = libsrc.find('\n (symbol "', i+10) + if j < 0: j = libsrc.find('\n\t\t(symbol "', i+10) + body = libsrc[i: j if j>0 else len(libsrc)] + pins = PIN_RE2.findall(body) or PIN_RE.findall(body) + return [(num, float(x), float(y)) for x,y,rot,num in pins] + +sch = open(SCH, encoding='utf-8').read() +dsym = open(DSYM, encoding='utf-8').read() +vsym = open(VSYM, encoding='utf-8').read() + +# ---------- 0. MFF2 symbol into Drogheda-sym (if absent) ---------- +MFF2 = ''' (symbol "MFF2_SIM" + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "U" + (at 0 12.7 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "MFF2_SIM" + (at 0 10.16 0) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "Drogheda:MFF2_5x6_TBD" + (at 0 -5.08 0) + (effects (font (size 1.27 1.27))) + (hide yes) + ) + (property "Datasheet" "~" + (at 0 -7.62 0) + (effects (font (size 1.27 1.27))) + (hide yes) + ) + (property "Description" "MFF2 / DFN-8 5x6 mm soldered M2M SIM (ETSI TS 102 671). Pads: 1=C1 VCC, 2=C2 RST, 3=C3 CLK, 4=C4 NC, 5=C5 GND, 6=C6 VPP (NC), 7=C7 I/O, 8=C8 NC. FOOTPRINT TBD - build from the chosen carrier chip datasheet before layout. Carrier-supplied part, not on LCSC." + (at 0 -10.16 0) + (effects (font (size 1.27 1.27))) + (hide yes) + ) + (symbol "MFF2_SIM_0_1" + (rectangle + (start -7.62 8.89) + (end 7.62 -8.89) + (stroke (width 0.254) (type default)) + (fill (type background)) + ) + ) + (symbol "MFF2_SIM_1_1" +''' +MFF2_PINS=[('1','VCC','power_in',-12.7,5.08,0),('2','RST','input',-12.7,2.54,0),('3','CLK','input',-12.7,0,0), + ('4','NC4','passive',-12.7,-2.54,0),('5','GND','power_in',0,-13.97,90),('6','VPP','passive',12.7,-2.54,180), + ('7','IO','bidirectional',12.7,2.54,180),('8','NC8','passive',12.7,0,180)] +for num,nm,tp,px,py,rot in MFF2_PINS: + MFF2 += (' (pin %s line\n (at %s %s %d)\n (length 5.08)\n' + ' (name "%s"\n (effects (font (size 1.27 1.27)))\n )\n' + ' (number "%s"\n (effects (font (size 1.27 1.27)))\n )\n )\n') % (tp,f(px),f(py),rot,nm,num) +MFF2 += ' )\n )\n' +mff2_added = False +if '(symbol "MFF2_SIM"' not in dsym: + end = dsym.rstrip(); assert end.endswith(')') + dsym = end[:-1].rstrip('\n') + '\n' + MFF2 + ')\n' + mff2_added = True + +# ---------- 1. locate donors / relabel targets ---------- +lib_cached = sch.split('(lib_symbols',1)[1] +def cachedpins(name): return libpins(lib_cached, name) + +inst = {} +for b in re.finditer(r'\n\t\(symbol\n(?:(?!\n\t\(symbol\n).)*', sch, re.S): + blk=b.group(0) + r=re.search(r'\(property "Reference" "([^"]+)"',blk); l=re.search(r'\(lib_id "([^"]+)"',blk); a=re.search(r'\(at ([-\d.]+) ([-\d.]+) (\d+)\)',blk) + if r and l and a: inst[r.group(1)]=(l.group(1),float(a.group(1)),float(a.group(2))) + +def find_labels(text): + d={} + for m in re.finditer(r'\n\t\((label|global_label) "([^"]+)"\s*\n\s*\(at ([-\d.]+) ([-\d.]+) (\d+)\)', text): + d[(round(float(m.group(3)),3), round(float(m.group(4)),3))] = (m.group(2), m.start()+1) + return d +labs = find_labels(sch) + +# D4G1 cathode relabel target: the GND label at (74.93, 265.43), PROVEN wire-connected to +# D4G1 pin1 by graph trace on 2026-08-25 (the sch has 382 wire segments - the earlier +# "zero wires" note was a regex artifact; labels here sit on WIRES, not on pins). +kx,ky = 74.93, 265.43 +if (kx,ky) not in labs or labs[(kx,ky)][0] != 'GND': + sys.exit('expected the D4G1-cathode GND label at %s,%s; found %s' % (kx,ky,labs.get((kx,ky)))) +if (55.88,260.35) not in labs or labs[(55.88,260.35)][0] != 'MODEM_LED': + sys.exit('orphan MODEM_LED label not found at (55.88,260.35)') + +# wire vertices + all existing pin coords, for the collision guard +wire_vts = set() +for m in re.finditer(r'\(wire\s*\n\s*\(pts\s*\n((?:\s*\(xy [-\d.]+ [-\d.]+\)\s*\n?)+)', sch): + for a,b in re.findall(r'\(xy ([-\d.]+) ([-\d.]+)\)', m.group(1)): + wire_vts.add((round(float(a),3), round(float(b),3))) +pin_coords = set() +for ref,(lb_,X_,Y_) in inst.items(): + pp = cachedpins(lb_) or [] + for num,px,py in pp: + pin_coords.add((round(X_+px,3), round(Y_-py,3))) + +# D14 orientation donor (PESD): read its pad nets from the PCB +pcb = open(PCB, encoding='utf-8').read() +d14 = re.search(r'\n\t\(footprint (?:(?!\n\t\(footprint ).)*?\(property "Reference" "D14"(?:(?!\n\t\(footprint ).)*', pcb, re.S).group(0) +d14pads = dict(re.findall(r'\(pad "(\d)"(?:(?!\(pad ").)*?\(net "([^"]*)"\)', d14, re.S)) +sig_pin = '1' if d14pads.get('2')=='GND' else '2' +d14lib = inst['D14'][0] + +# ---------- 2. cache the vendor symbols + MFF2 into the schematic ---------- +def grab(libsrc, name, prefix): + i = libsrc.find(' (symbol "%s"\n' % name) + if i < 0: sys.exit('symbol %s not found in source lib' % name) + j = libsrc.index('(', i) + k = span_from(libsrc, j) + return libsrc[j:k].replace('(symbol "%s"' % name, '(symbol "%s:%s"' % (prefix,name), 1) + +cache_add = '' +for nm in ('A7670SA-LASC','AP64350SP-13','74LVC2T45DC,125','PMEG3050EP,115','SMAJ5.0A_C113952'): + if '(symbol "Drogheda-v6:%s"' % nm not in sch: + cache_add += '\n\t\t' + grab(vsym, nm, 'Drogheda-v6') +if '(symbol "Drogheda-sym:MFF2_SIM"' not in sch: + cache_add += '\n\t\t' + grab(dsym, 'MFF2_SIM', 'Drogheda-sym') + +m = re.search(r'\n\t\(lib_symbols\n', sch) +k = span_from(sch, sch.index('(', m.start())) +sch = sch[:k-1] + cache_add + '\n\t' + sch[k-1:] + +def newpins(name, src): + pp = libpins(src, name) + if not pp: sys.exit('no pins found for %s' % name) + return pp + +# ---------- 3. build additions ---------- +add = '' +nlab = nnc = 0 +newlabels = [] +def add_lab(net,x,y,rot,just): + global add,nlab + add += ('\n\t(label "%s"\n\t\t(at %s %s %d)\n\t\t(effects\n\t\t\t(font\n\t\t\t\t(size 1.27 1.27)\n' + '\t\t\t)\n\t\t\t(justify %s)\n\t\t)\n\t\t(uuid "%s")\n\t)') % (net,f(x),f(y),rot,just,uuid.uuid4()) + nlab += 1; newlabels.append((net,round(x,3),round(y,3))) +def add_nc(x,y): + global add,nnc + add += '\n\t(no_connect\n\t\t(at %s %s)\n\t\t(uuid "%s")\n\t)' % (f(x),f(y),uuid.uuid4()) + nnc += 1 +def put(net,x,y,rot,just): + if net == NC: add_nc(x,y) + else: add_lab(net,x,y,rot,just) + +def mksym(lib_id, ref, val, x, y, fp, npins, lcsc='', dnp=False): + props=[('Reference',ref,x-3,y-3,''),('Value',val,x+3,y-3,''),('Footprint',fp,x,y,'\n\t\t\t(hide yes)'), + ('Datasheet','~',x,y,'\n\t\t\t(hide yes)'),('Description','',x,y,'\n\t\t\t(hide yes)')] + if lcsc: props.append(('LCSC',lcsc,x,y,'\n\t\t\t(hide yes)')) + p='' + for nm,v,px,py,hide in props: + p += ('\t\t(property "%s" "%s"\n\t\t\t(at %s %s 0)%s\n\t\t\t(show_name no)\n\t\t\t(do_not_autoplace no)\n' + '\t\t\t(effects\n\t\t\t\t(font\n\t\t\t\t\t(size 1.27 1.27)\n\t\t\t\t)\n\t\t\t)\n\t\t)\n') % (nm,v,f(px),f(py),hide) + pn=''.join('\t\t(pin "%s"\n\t\t\t(uuid "%s")\n\t\t)\n' % (n,uuid.uuid4()) for n in npins) + return ('\n\t(symbol\n\t\t(lib_id "%s")\n\t\t(at %s %s 0)\n\t\t(unit 1)\n\t\t(body_style 1)\n' + '\t\t(exclude_from_sim no)\n\t\t(in_bom yes)\n\t\t(on_board yes)\n\t\t(in_pos_files yes)\n' + '\t\t(dnp %s)\n\t\t(uuid "%s")\n%s%s\t\t(instances\n\t\t\t(project "hbox-watchdog-v6"\n' + '\t\t\t\t(path "%s"\n\t\t\t\t\t(reference "%s")\n\t\t\t\t\t(unit 1)\n\t\t\t\t)\n\t\t\t)\n\t\t)\n\t)' + ) % (lib_id,f(x),f(y),'yes' if dnp else 'no',uuid.uuid4(),p,pn,ROOT,ref) + +def orient(px,py): + if abs(px) < 0.01: return 90,'left bottom' + return (0,'left bottom') if px>0 else (180,'right bottom') + +# ----- Block O: U19 A7670SA ----- +U19X,U19Y = 330.0, 330.0 +NET19 = {55:'VBAT_MODEM',56:'VBAT_MODEM',57:'VBAT_MODEM', + 9:'DOUT_4G_M',10:'DIN_4G_M',1:'MODEM_PWRKEY_M',16:'MODEM_RST_M',66:'MODEM_STATUS_M', + 52:'NETLIGHT_1V8',24:'USB_VBUS',27:'USB_DP',28:'USB_DM',6:'MODEM_BOOT',15:'1V8_MODEM', + 30:'SIM_VDD',31:'SIM_DATA',32:'SIM_CLK',33:'SIM_RST',60:'RF_LTE'} +GND19 = {2,17,18,29,39,45,46,54,58,59,61,62,63,64,65,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,91,92,94} +a7pins = newpins('A7670SA-LASC', vsym) +if len(a7pins) != 124: sys.exit('A7670SA pin extract failed: %d' % len(a7pins)) +add += mksym('Drogheda-v6:A7670SA-LASC','U19','A7670SA-LASC',U19X,U19Y, + 'Drogheda-v6:LGA-124_L24.0-W24.0-P1.0-A7670C-LASS',[num for num,_,_ in a7pins],'C18548276') +u19 = {'lab':0,'gnd':0,'nc':0} +for num,px,py in a7pins: + n=int(num); x,y = U19X+px, U19Y-py + rot,just = orient(px,py) + if n in NET19: add_lab(NET19[n],x,y,rot,just); u19['lab']+=1 + elif n in GND19: add_lab('GND',x,y,rot,just); u19['gnd']+=1 + else: add_nc(x,y); u19['nc']+=1 + +# ----- Block P ----- +U20X,U20Y = 262.0, 300.0 +bpins = newpins('AP64350SP-13', vsym) +add += mksym('Drogheda-v6:AP64350SP-13','U20','AP64350SP-13',U20X,U20Y, + 'Drogheda-v6:SO-8_L4.9-W3.9-P1.27-LS6.0-BL-EP',[num for num,_,_ in bpins],'C2071691') +NET20 = {'1':'BST_MODEM','2':'VIN_MODEM','3':'MODEM_PWR_EN','4':'RT_MODEM','5':'FB_MODEM', + '6':'COMP_MODEM','7':'GND','8':'SW_MODEM','9':'GND'} +for num,px,py in bpins: + rot,just = orient(px,py) + add_lab(NET20[num],U20X+px,U20Y-py,rot,just) + +# diodes: D_Schottky and PMEG symbol both 1=K 2=A; SMAJ pad1 assumed K (VERIFY at layout) +DIODES=[('D20','SS34','Device:D_Schottky','Diode_SMD:D_SMA','',240.0,286.0,'VIN_MODEM','24V'), + ('D21','PMEG3050EP','Drogheda-v6:PMEG3050EP,115','Drogheda-v6:SOD-128_L3.7-W2.5-LS4.7-RD','C50603',240.0,293.0,'VIN_MODEM','MAIN5V'), + ('D22','SMAJ5.0A','Drogheda-v6:SMAJ5.0A_C113952','Drogheda-v6:SMA_L4.4-W2.6-LS5.0-RD','C113952',300.0,370.0,'VBAT_MODEM','GND')] +for ref,val,lib,fp,lcsc,x,y,knet,anet in DIODES: + nm = lib.split(':')[1] + pp = newpins(nm, vsym) if lib.startswith('Drogheda-v6') else cachedpins(lib) + add += mksym(lib,ref,val,x,y,fp,[num for num,_,_ in pp],lcsc) + for num,px,py in pp: + rot,just = orient(px,py) + add_lab(knet if num=='1' else anet, x+px,y-py,rot,just) + +L20X,L20Y=300.0,300.0 +lp={num:(px,py) for num,px,py in cachedpins('Device:L')} +add += mksym('Device:L','L20','4.7uH/5A',L20X,L20Y,'Inductor_SMD:L_Bourns-SRU8028_8.0x8.0mm',['1','2']) +add_lab('SW_MODEM', L20X+lp['1'][0],L20Y-lp['1'][1],90,'left bottom') +add_lab('VBAT_MODEM',L20X+lp['2'][0],L20Y-lp['2'][1],90,'left bottom') + +PASS=[('C127','10uF','Device:C','Capacitor_SMD:C_0805_2012Metric','',252.0,286.0,'VIN_MODEM','GND',False), + ('C128','1uF','Device:C','Capacitor_SMD:C_0603_1608Metric','',258.0,286.0,'VIN_MODEM','GND',False), + ('C129','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',276.0,286.0,'BST_MODEM','SW_MODEM',False), + ('R117','200k/1%','Device:R','Resistor_SMD:R_0603_1608Metric','',246.0,310.0,'RT_MODEM','GND',False), + ('R116','14k','Device:R','Resistor_SMD:R_0603_1608Metric','',252.0,310.0,'COMP_MODEM','COMP_RC',False), + ('C141','3.3nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',258.0,310.0,'COMP_RC','GND',False), + ('C142','47pF','Device:C','Capacitor_SMD:C_0402_1005Metric','',264.0,310.0,'COMP_MODEM','GND',False), + ('R110','75k/1%','Device:R','Resistor_SMD:R_0603_1608Metric','',282.0,310.0,'VBAT_MODEM','FB_MODEM',False), + ('R111','20k/1%','Device:R','Resistor_SMD:R_0603_1608Metric','',288.0,310.0,'FB_MODEM','GND',False), + ('R113','100k','Device:R','Resistor_SMD:R_0603_1608Metric','',270.0,310.0,'MODEM_PWR_EN','GND',False), + ('C130','220uF/10V','Device:C_Polarized','Capacitor_SMD:CP_Elec_6.3x7.7','C2827940',310.0,370.0,'VBAT_MODEM','GND',False), + ('C131','220uF/10V','Device:C_Polarized','Capacitor_SMD:CP_Elec_6.3x7.7','C2827940',318.0,370.0,'VBAT_MODEM','GND',False), + ('C132','22uF','Device:C','Capacitor_SMD:C_0805_2012Metric','C86817',326.0,370.0,'VBAT_MODEM','GND',False), + ('C133','1uF','Device:C','Capacitor_SMD:C_0603_1608Metric','',332.0,370.0,'VBAT_MODEM','GND',False), + ('C134','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',338.0,370.0,'VBAT_MODEM','GND',False), + ('C135','33pF','Device:C','Capacitor_SMD:C_0402_1005Metric','',344.0,370.0,'VBAT_MODEM','GND',False), + ('C136','10pF','Device:C','Capacitor_SMD:C_0402_1005Metric','',350.0,370.0,'VBAT_MODEM','GND',False), + ('R112','1k','Device:R','Resistor_SMD:R_0603_1608Metric','',356.0,370.0,'VBAT_MODEM','GND',False), + ('C125','2.2uF','Device:C','Capacitor_SMD:C_0603_1608Metric','',380.0,300.0,'1V8_MODEM','GND',False), + ('C126','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',400.0,352.0,'SIM_VDD','GND',False), + ('R106','100R','Device:R','Resistor_SMD:R_0603_1608Metric','',390.0,255.0,'DOUT_4G','USART6_RX',False), + ('R109','4.7k','Device:R','Resistor_SMD:R_0603_1608Metric','',380.0,286.0,'NETLIGHT_1V8','Q22_BASE',False), + ('R114','100k','Device:R','Resistor_SMD:R_0603_1608Metric','',252.0,340.0,'MODEM_PWRKEY','GND',False), + ('R115','100k','Device:R','Resistor_SMD:R_0603_1608Metric','',276.0,340.0,'MODEM_RST','GND',False), + ('R107','0R-DNP','Device:R','Resistor_SMD:R_0603_1608Metric','',264.0,255.0,'DOUT_4G_M','DOUT_4G',True), + ('R108','0R-DNP','Device:R','Resistor_SMD:R_0603_1608Metric','',270.0,255.0,'DIN_4G','DIN_4G_M',True), + ('C137','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',248.0,395.0,'1V8_MODEM','GND',False), + ('C138','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',288.0,395.0,'3V3','GND',False), + ('C139','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',248.0,418.0,'1V8_MODEM','GND',False), + ('C140','100nF','Device:C','Capacitor_SMD:C_0402_1005Metric','',288.0,418.0,'3V3','GND',False)] +for ref,val,lib,fp,lcsc,x,y,n1,n2,dnp in PASS: + pp={num:(px,py) for num,px,py in cachedpins(lib)} + add += mksym(lib,ref,val,x,y,fp,['1','2'],lcsc,dnp=dnp) + add_lab(n1,x+pp['1'][0],y-pp['1'][1],90,'left bottom') + add_lab(n2,x+pp['2'][0],y-pp['2'][1],90,'left bottom') + +# ----- Block Q: MFF2 + SIM ESD ----- +U22X,U22Y=400.0,340.0 +mp = newpins('MFF2_SIM', dsym) +add += mksym('Drogheda-sym:MFF2_SIM','U22','MFF2-SIM-carrier',U22X,U22Y,'Drogheda:MFF2_5x6_TBD',[num for num,_,_ in mp]) +MQ={'1':'SIM_VDD','2':'SIM_RST','3':'SIM_CLK','4':NC,'5':'GND','6':NC,'7':'SIM_DATA','8':NC} +for num,px,py in mp: + rot,just = orient(px,py) + put(MQ[num],U22X+px,U22Y-py,rot,just) +dp={num:(px,py) for num,px,py in cachedpins(d14lib)} +for ref,sig,x,y in [('D23','SIM_DATA',420.0,352.0),('D24','SIM_CLK',426.0,352.0),('D25','SIM_RST',432.0,352.0)]: + add += mksym(d14lib,ref,'PESD5V0S1BA',x,y,'Diode_SMD:D_SOD-323',['1','2'],'C2827694') + add_lab(sig if sig_pin=='1' else 'GND', x+dp['1'][0], y-dp['1'][1],90,'left bottom') + add_lab('GND' if sig_pin=='1' else sig, x+dp['2'][0], y-dp['2'][1],90,'left bottom') + +# ----- Block R ----- +spins = newpins('74LVC2T45DC,125', vsym) +for ref,x,y,nets in [('U23',255.0,385.0,{'1':'1V8_MODEM','2':'DIN_4G_M','3':NC,'4':'GND','5':'GND','6':'GND','7':'DIN_4G','8':'3V3'}), + ('U24',255.0,408.0,{'1':'1V8_MODEM','2':'DOUT_4G_M','3':'MODEM_STATUS_M','4':'GND','5':'1V8_MODEM','6':'MODEM_STATUS','7':'DOUT_4G','8':'3V3'})]: + add += mksym('Drogheda-v6:74LVC2T45DC,125',ref,'74LVC2T45',x,y,'Drogheda-v6:VSSOP-8_L2.1-W2.4-P0.50-LS3.2-BL',[num for num,_,_ in spins],'C730237') + for num,px,py in spins: + rot,just = orient(px,py) + put(nets[num],x+px,y-py,rot,just) + +qn = cachedpins('Device:Q_NMOS_GSD') +for ref,gate,drain,x,y in [('Q20','MODEM_PWRKEY','MODEM_PWRKEY_M',246.0,330.0),('Q21','MODEM_RST','MODEM_RST_M',270.0,330.0)]: + add += mksym('Device:Q_NMOS_GSD',ref,'2N7002',x,y,'Package_TO_SOT_SMD:SOT-23',[num for num,_,_ in qn]) + NQ={'1':gate,'2':'GND','3':drain} + for num,px,py in qn: + rot,just = orient(px,py) + add_lab(NQ[num],x+px,y-py,rot,just) +qb = cachedpins('Transistor_BJT:Q_NPN_BEC') +add += mksym('Transistor_BJT:Q_NPN_BEC','Q22','MMBT3904',390.0,290.0,'Package_TO_SOT_SMD:SOT-23',[num for num,_,_ in qb]) +NB={'1':'Q22_BASE','2':'GND','3':'MODEM_LED_K'} +for num,px,py in qb: + rot,just = orient(px,py) + add_lab(NB[num],390.0+px,290.0-py,rot,just) +tp = cachedpins('Connector:TestPoint') +add += mksym('Connector:TestPoint','TP8','USB_BOOT',420.0,300.0,'TestPoint:TestPoint_Pad_D1.5mm',[num for num,_,_ in tp]) +add_lab('MODEM_BOOT',420.0+tp[0][1],300.0-tp[0][2],90,'left bottom') + +pf = cachedpins('power:PWR_FLAG') +for ref,net,x in [('PF15','VIN_MODEM',300.0),('PF16','VBAT_MODEM',310.0),('PF17','1V8_MODEM',320.0)]: + add += mksym('power:PWR_FLAG',ref,'PWR_FLAG',x,255.0,'',[num for num,_,_ in pf]) + add_lab(net,x+pf[0][1],255.0-pf[0][2],90,'left bottom') + +MCU_LBL=[('MODEM_PWRKEY',482.6,436.88),('MODEM_STATUS',482.6,439.42),('MODEM_PWR_EN',482.6,441.96),('MODEM_RST',482.6,444.5)] +for net,x,y in MCU_LBL: + add_lab(net,x,y,180,'right bottom') +INTENTIONAL = {(round(x,3),round(y,3)) for _,x,y in MCU_LBL} + +# remove stale no_connect markers on MCU pins that now carry labels (PC8-PC11 from this +# run, and PC1/PC2/PC3/PA7/PC12 which got labels in T3b while their NCs remained) +STALE_NC = INTENTIONAL | {(482.6,419.1),(482.6,421.64),(482.6,424.18),(518.16,411.48),(482.6,447.04)} +removed_nc = 0 +def rm_stale_nc(text): + global removed_nc + out=[]; last=0 + for m in re.finditer(r'\n\t\(no_connect\s*\n\s*\(at ([-\d.]+) ([-\d.]+)\)(?:(?!\n\t\().)*?\n\t\)', text, re.S): + c=(round(float(m.group(1)),3),round(float(m.group(2)),3)) + if c in STALE_NC: + out.append(text[last:m.start()]); last=m.end(); removed_nc+=1 + out.append(text[last:]) + return ''.join(out) +sch = rm_stale_nc(sch) + +# ---------- 4. relabels (positions re-found on the current sch) ---------- +labs = find_labels(sch) +def relabel(coord, old, new): + global sch + name,start = labs[coord] + assert name==old, (coord,name,old) + end = span_from(sch, sch.index('(', start)) + seg = sch[start:end].replace('"%s"'%old, '"%s"'%new, 1) + sch = sch[:start] + seg + sch[end:] +todo = [((55.88,260.35),'MODEM_LED','3V3'),((kx,ky),'GND','MODEM_LED_K')] +for coord,old,new in sorted(todo, key=lambda t:-labs[t[0]][1]): + relabel(coord,old,new) + +# ---------- 5. collision check + write ---------- +existing = (set(find_labels(sch).keys()) | wire_vts | pin_coords) - INTENTIONAL +coll = [(n,x,y) for n,x,y in newlabels if (x,y) in existing] +if coll: sys.exit('LABEL COLLISION with existing labels/wires/pins: %s' % coll[:5]) + +end = sch.rstrip(); assert end.endswith(')') +sch = end[:-1].rstrip('\n') + add + '\n)\n' + +print('U19: %d net labels + %d GND + %d NC (sum %d, expect 124)' % (u19['lab'],u19['gnd'],u19['nc'],sum(u19.values()))) +print('symbols: U19 U20 U22 U23 U24 D20-D25 Q20-Q22 L20 TP8 PF15-17 + %d passives (2 DNP)' % len(PASS)) +print('labels added: %d no_connects added: %d' % (nlab,nnc)) +print('relabels: MODEM_LED@(55.88,260.35)->3V3 ; GND@D4G1.K(%s,%s)->MODEM_LED_K' % (kx,ky)) +print('PESD orientation cloned from D14: signal pin = %s' % sig_pin) +print('stale no_connects removed from labeled MCU pins: %d (expect 9)' % removed_nc) +print('MFF2 symbol added to Drogheda-sym: %s' % mff2_added) +print('paren: sch=%d dsym=%d' % (bal(sch),bal(dsym))) +if not APPLY: + print('\nDRY RUN - nothing written. Re-run with --apply.'); sys.exit(0) +if bal(sch)!=0 or bal(dsym)!=0: sys.exit('REFUSING: paren imbalance') +shutil.copy2(SCH,SCH+'.T4bak'); shutil.copy2(DSYM,DSYM+'.T4bak') +open(SCH,'w',encoding='utf-8').write(sch) +open(DSYM,'w',encoding='utf-8').write(dsym) +print('\nAPPLIED. Backups: *.T4bak')