Phase A ERC fixes: regenerate blocks on-grid, own-column stub geometry (kills all 23 errors incl. the C85-C89 net fusion / GND-3V3 short), PWR_FLAGs SYS5V+3V3_ETH, direct LED nets, R61 preserved, netclass patterns re-applied after KiCad session clobber
Root cause of 23 ERC errors: vertically-stacked 2-pin parts closer than 15.24mm shared stub columns -> KiCad merged collinear overlapping stubs -> orphaned pins + fused nets (C85-C89 chain shorted C1N/C2P/VP/VN/GND/3V3; RGB chain fused). Regenerated from pre-Phase-A base with grid-snapped origins, one x-column per part, geometry auditor (collinear overlap + T-touch + label-anchor collision checks) now part of the generator. P13 depop made surgical (R61 FB wire preserved). PF10/PF11 added. rjmap LED/TCT nets direct (no alias bridges). Netclass patterns re-applied onto KiCad-canonical pro; note: pro file is vulnerable to open-KiCad resave clobber. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01GSKKes8GsS4YHAMWJ44tCm
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