C12: clear all 3 KiCad 10 DRC errors + dangling-via warning (EinarBoard 2.0)

E1  clearance 0.1433 < 0.15  (/LED_A via vs /I2C_SCL via, 4 raw reports)
    Relocated the /LED_A via 202c8cb4 from (147.15,85.85) to (147.25,86.22),
    dead centre of the U13.1/U13.2 gap. uuid preserved; both attached segment
    endpoints carried (In1.Cu 375e8fa7, B.Cu dee4fa4e). Worst gap now +0.2405.

E2  unconnected_items x2 + starved_thermal x1 -- ONE root cause.
    The F.Cu GND pour pocket around U11 pad 29 was an island: it touched the
    pad with a single thermal spoke but was fenced in by the LQFP-48 lead ring
    and the escape routing, so it reached nothing else. Gave pad 29 a real
    copper escape west to a new GND via that punches through to the In2 GND
    plane, and set the pad to solid zone connection so the 2-spoke thermal
    rule stops applying to a pad the pour can only reach from one side.
      seg F.Cu w0.3 GND (99.4525,55.26)->(98.65,55.26)   margin +0.2000
      seg F.Cu w0.3 GND (98.65,55.26)->(97.55,54.45)     margin +0.2000
      via 0.6/0.3 F.Cu-B.Cu GND @(97.55,54.45)           copper +0.2718
      U11 pad 29 -> (zone_connect 2)
    +0.2000 is the structural ceiling for a 0.5mm-pitch lead escape with a
    0.3 track, and matches the neighbouring /3V3_ETH and /ETH_XI escapes.

E3  via_dangling  /3V3_ETH via 3b0bb378 @(87.18,55.23) connected on F.Cu only.
    Deleted. Touch test: 4 touching F.Cu segments, zero on In1/In2/B.Cu. The
    F.Cu run at x=87.18 is collinear and continuous without it.

Verified: static DRC 0 hard violations (49 pre-existing marginals inside
KiCad's 0.0005 epsilon, unchanged). Per-net islands unchanged at 1 for
/LED_A /3V3_ETH /I2C_SCL /ETH_XI /ETH_RSET. New via lands inside
GND_PLANE_IN2 + GND_POUR_BCU, outside MAGJACK_NO_POUR. U11 is a plain
LQFP-48 with no exposed pad, so the under-body via is clear. Leo's 24V-class
copper (24V /24V_IN IGN_IN, 45 segments) byte-identical.

Backup: .mcp-backups/hbox-watchdog-v4.kicad_pcb.pre-C12 (md5 7c2202cb)
New:    md5 042efd5dd0cf99fdcfd27974b7bcb3c1  3502425 bytes

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GSKKes8GsS4YHAMWJ44tCm

03-Architecture-Hardware/kicad/hbox-watchdog-v4.kicad_pcb

@@ -3410,6 +3410,7 @@
 			(layers "F.Cu" "F.Mask" "F.Paste")
 			(roundrect_rratio 0.25)
 			(net "GND")
+			(zone_connect 2)
 			(uuid "66806a02-d013-429d-82b1-dbcab3620ac3")
 		)
 		(pad "30" smd roundrect
@@ -52508,14 +52509,6 @@
 		(net "/3V3_ETH")
 		(uuid "0612e384-8bb2-4feb-87f1-a99068e06c47")
 	)
-	(via
-		(at 87.18 55.23)
-		(size 0.6)
-		(drill 0.3)
-		(layers "F.Cu" "B.Cu")
-		(net "/3V3_ETH")
-		(uuid "3b0bb378-8037-4e39-907c-aa9615d30c02")
-	)
 	(via
 		(at 118.3725 64.9688)
 		(size 0.8)
@@ -64958,7 +64951,7 @@
 	)
 	(segment
 		(start 147.3442 85.85)
-		(end 147.15 85.85)
+		(end 147.25 86.22)
 		(width 0.2)
 		(layer "In1.Cu")
 		(net "/LED_A")
@@ -64974,14 +64967,14 @@
 	)
 	(segment
 		(start 147.3442 85.5543)
-		(end 147.15 85.85)
+		(end 147.25 86.22)
 		(width 0.2)
 		(layer "B.Cu")
 		(net "/LED_A")
 		(uuid "dee4fa4e-7764-415b-b734-93b4c39c2bcb")
 	)
 	(via
-		(at 147.15 85.85)
+		(at 147.25 86.22)
 		(size 0.6)
 		(drill 0.3)
 		(layers "F.Cu" "B.Cu")
@@ -65143,6 +65136,30 @@
 		(net "/ETH_PMODE")
 		(uuid "44682b01-50ce-4ab8-85cd-4c87d6e96eca")
 	)
+	(segment
+		(start 99.4525 55.26)
+		(end 98.65 55.26)
+		(width 0.3)
+		(layer "F.Cu")
+		(net "GND")
+		(uuid "2830a839-0ef7-4d8c-9fbf-597c7cd0585b")
+	)
+	(segment
+		(start 98.65 55.26)
+		(end 97.55 54.45)
+		(width 0.3)
+		(layer "F.Cu")
+		(net "GND")
+		(uuid "3ce39c88-0d2f-4d9d-a5e7-e8a4fcf00736")
+	)
+	(via
+		(at 97.55 54.45)
+		(size 0.6)
+		(drill 0.3)
+		(layers "F.Cu" "B.Cu")
+		(net "GND")
+		(uuid "229b366b-306f-414e-8504-39c778995bcf")
+	)
 	(zone
 		(net "GND")
 		(layer "F.Cu")