diff --git a/03-Architecture-Hardware/Drogheda_Guia-Conexion-Protoboard_ES_v3.1.pdf b/03-Architecture-Hardware/Drogheda_Guia-Conexion-Protoboard_ES_v3.1.pdf new file mode 100644 index 0000000..c1d8ab8 Binary files /dev/null and b/03-Architecture-Hardware/Drogheda_Guia-Conexion-Protoboard_ES_v3.1.pdf differ diff --git a/03-Architecture-Hardware/Guia-Conexion-Protoboard/cuerpo.tex b/03-Architecture-Hardware/Guia-Conexion-Protoboard/cuerpo.tex index 83b8abb..a4c8fe0 100644 --- a/03-Architecture-Hardware/Guia-Conexion-Protoboard/cuerpo.tex +++ b/03-Architecture-Hardware/Guia-Conexion-Protoboard/cuerpo.tex @@ -258,6 +258,31 @@ R 10\,k y 100\,$\Omega$ (§\ref{sec:resistencias})} \bottomrule \end{tabularx}} +\subsubsection*{5b · Protección de polaridad de la fuente 24 V (Q10 $+$ Zener) — ármalo ANTES que el buck} + +Entre la fuente de 24\,V y \textbf{todo} lo que cuelga de ella (LM2596 «FAN» y, en banco, el +DFR1015) va un MOSFET-P que \textbf{corta si la fuente se conecta al revés}. En la tarjeta es +Q10; en el protoboard úsalo en TO-220 (IRF9540N). Aquí es donde vive el \textbf{Zener de +15\,V (DzG, 1N4744A)}: protege la compuerta del FET (V$_{GS}$ máx $=$ 20\,V) porque la fuente +es de 24\,V. + +\hwtab{% +\begin{tabularx}{\textwidth}{@{}l X L{4.4cm}@{}} +\toprule +\theadconex +\midrule +\redI & Fuente 24\,V ($+$) $\rightarrow$ \textbf{drain (D)} de Q10 (IRF9540N) & La tab metálica $=$ D\\ +\redI & \textbf{source (S)} de Q10 $\rightarrow$ nodo «24\,V protegido» $\rightarrow$ LM2596 «FAN» IN$+$ (y DFR1015 IN$+$ si usas la misma fuente para ignición) & Aguas abajo ya nadie ve polaridad inversa\\ +\redS & \textbf{gate (G)} de Q10 $\rightarrow$ R 100\,k$\Omega$ $\rightarrow$ GND & Enciende el FET con la polaridad correcta\\ +\redS & \textbf{Zener 15\,V 1N4744A entre G y S} (banda/cátodo $\rightarrow$ S) & \textbf{DzG}: limita V$_{GS}$ a 15\,V\\ +\redG & Fuente 24\,V ($-$) $\rightarrow$ GND común & \\ +\bottomrule +\end{tabularx}} + +\textbf{Prueba:} con la fuente al derecho, mide 24\,V en «24\,V protegido»; inviértela a +propósito (sin nada más conectado) y debe medir $\approx$0. Ponle \textbf{disipador} a Q10 +(TO-220, clip chico) — barato y va atornillado de todos modos. + \diagramabloque{5}{\blkVent} \bloque{6}{Sensor de temperatura y humedad I\textsuperscript{2}C — AHT10} @@ -332,8 +357,8 @@ va \textbf{dentro del socket XBee del Pro}: aquí NO se necesita el breakout ni \bloque{9}{Modo B — Diagnóstico por NTRIP (relevo, opcional)} \queprueba{inyecta \texttt{\$PHLG} al servidor por 4G. Requiere el puente XBee de abajo.} \compbloque{4G NTRIP Master en breakout XBee (§\ref{sec:stackfisico}) · segunda LM2596 o -MP1584 «MODEM 3.3\,V» (§\ref{sec:lm2596}) · R 22\,k (§\ref{sec:resistencias}) · -C 100\,$\mu$F$+$100\,nF (§\ref{sec:diodos})} +MP1584 «MODEM 3.3\,V» (§\ref{sec:lm2596}) · R 22\,k y 1\,k (§\ref{sec:resistencias}) · +C 100\,$\mu$F$+$100\,nF (§\ref{sec:diodos}) · breakout USB-C (config) · botón $+$ LED del módem} \subsubsection*{9a · El problema del paso (pitch): el 4G NO entra en la protoboard} @@ -410,6 +435,14 @@ C 100\,$\mu$F$+$100\,nF junto al pin\\ \redS & PA9 (USART1 TX) $\rightarrow$ XBee \textbf{pin 3 (DIN)} & El MCU releva + inyecta \texttt{\$PHLG}\\ \redS & XBee \textbf{pin 2 (DOUT)} $\rightarrow$ Pro · \texttt{RX2} & RTCM3 \textbf{DIRECTO} (no pasa por el MCU) $\rightarrow$ correcciones intactas\\ \redT & PA10 $\rightarrow$ R 22\,k$\Omega$ $\rightarrow$ 3V3 & DFU-safe (idle high)\\ +\redT & XBee \textbf{pin 14 (VREF)} $\rightarrow$ VCC del módem (3.3\,V) & \textbf{OBLIGATORIO} — referencia lógica; sin él los datos no valen\\ +\redG & XBee \textbf{pin 20 (ON/OFF)} $\rightarrow$ GND & \textbf{OBLIGATORIO} — a GND $=$ siempre encendido; al aire puede NO encender\\ +\redG & XBee \textbf{pines 4, 11 y 15 (GND)} $\rightarrow$ GND & Con el pin 10 quedan los \textbf{4 GND} conectados\\ +\redS & XBee \textbf{pin 5 (RESET)} $\rightarrow$ botón $\rightarrow$ GND & Opcional (config); \textbf{al aire $=$ encendido}\\ +\redS & XBee \textbf{pin 13 (LED)} $\rightarrow$ R 1\,k $\rightarrow$ LED $\rightarrow$ GND & Opcional; tenue — el pin entrega 1.8\,V\\ +\redV & Breakout USB-C \textbf{VBUS} $\rightarrow$ XBee \textbf{pin 6 (V\_USB)} & El 5\,V del cable USB habilita el puerto USB del módem\\ +\redS & Breakout USB-C \textbf{D$+$ / D$-$} $\rightarrow$ XBee \textbf{pines 7 / 8} & Configurar el módem desde la PC; par corto y parejo\\ +\redG & Breakout USB-C \textbf{GND} $\rightarrow$ GND común & \\ \redN & 2$\times$ antenas LTE (u.FL) $\rightarrow$ 4G & \textbf{Antes} de energizar — sin antena el transmisor sufre\\ \redN & 4G NTRIP Master $\rightarrow$ servidor (4G/NTRIP) & \texttt{\$PHLG} llega \textit{en banda} al backend\\ \bottomrule @@ -540,13 +573,14 @@ Capacitor electrolítico & \textbf{CON polaridad}: la franja/pata corta = negati 2 & LED de estado & Bloque 2. Verás parpadeos.\\ 3 & Interruptor de carga & Bloque 3. Confirma: \textbf{APAGADO al reset}, ON cuando PA1 activa.\\ 4 & Sensado & Bloque 4. Divisores PA0/PA4; ignición por DFR1015 (12/24\,V) o el apagador a 3V3.\\ -5 & Ventilador & Bloque 5. \textbf{Primero} ajusta el LM2596 a 5.0\,V, luego conecta el ventilador.\\ +5 & Ventilador & Bloque 5. \textbf{Primero} arma \textbf{5b} (Q10 $+$ Zener 15\,V en la línea de 24\,V), ajusta el LM2596 a 5.0\,V, y al final conecta el ventilador.\\ 6 & Temperatura / humedad & Bloques 6 y 11: AHT10 (0x38, \textbf{solo} en el bus) + LM35 $\rightarrow$ PA7 + NTC $\rightarrow$ PB1. Verifica las tres lecturas en el log.\\ 7 & Respaldo de batería & Bloque 10. TP4056 + MT3608 (ajusta el MT3608 apenas $<$ 5\,V del vehículo) + corte de carga PA8 (CHRG\_RUN) + \textbf{apagador} SYS $\rightarrow$ MAIN5V. Prueba: PA8 en bajo = el LED CHRG del TP4056 se apaga; el apagador mata todo.\\ 8 & Stack RTK & Bloque 8. Solo 4 cables (SAL, GND, PA2, PA3); el 4G va en el socket XBee del Pro.\\ 9 & (Opcional) Modo B & Bloque 9. Relevo por breakout XBee — solo si vas a probar el diagnóstico por NTRIP. \textbf{Prepara antes el puente 2.0$\rightarrow$2.54\,mm} (compra y -soldadura de la sección 9a/9b) y la buck «MODEM 3.3\,V».\\ +soldadura de la sección 9a/9b), la buck «MODEM 3.3\,V», y \textbf{no olvides los pines +obligatorios} VREF(14)$\rightarrow$VCC · ON/OFF(20)$\rightarrow$GND · GND$\times$4 $+$ el USB de config (9c).\\ \bottomrule \end{tabularx}} @@ -555,7 +589,7 @@ soldadura de la sección 9a/9b) y la buck «MODEM 3.3\,V».\\ \begin{itemize} \item El IRLZ44N debe ser «lógico» (\textbf{no} IRF540/IRFZ44). Si usaron TIP120, avísale a Leo. \item \textbf{Nunca 5\,V directo a PA0/PA4/PA5.} PA0/PA4 por divisor $\div$2; PA5 lógico - $\le$ 3.3\,V (\texttt{INPUT\_PULLDOWN}, clamp BAT54, \textbf{sin divisor}). + $\le$ 3.3\,V (\texttt{INPUT\_PULLDOWN}, clamp Schottky \textbf{1N5819} del kit — en el PCB es BAT54 —, \textbf{sin divisor}). \item LM2596: ajústalo a \textbf{5.0\,V con el multímetro ANTES de conectar} (vienen aleatorios). \item El ventilador va en el 5\,V del LM2596 (\textbf{separado}), no en la salida «stack» ni en el 5\,V principal. \item MT3608: ajústalo \textbf{apenas} $<$ 5\,V del vehículo (para que el vehículo tenga prioridad). @@ -579,6 +613,15 @@ soldadura de la sección 9a/9b) y la buck «MODEM 3.3\,V».\\ \textbf{PA8 (CHRG\_RUN)} sobre el IN+ (Bloque~10). \textbf{Polaridad inversa al PCB}: proto ALTO = carga; PCB (CHRG\_EN) ALTO = corta — flag en firmware. El NTC del kit queda sin usar en proto (en el PCB va al LTC4040). + \item \textbf{Disipadores TO-220:} obligatorio en \textbf{Q10} y recomendado en el + \textbf{IRF9540N del interruptor de carga}; opcional en el IRLZ44N y el IRF9540N de + CHRG\_RUN. \textbf{La tab metálica $=$ DRAIN}: dos transistores \textbf{nunca} + comparten disipador sin mica/aislante. + \item \textbf{Placa perforada 10$\times$10\,cm — plano sugerido} (igual que el Diagrama + Único): \textbf{potencia a la izquierda} (Q10, bucks, TP4056/MT3608, pila), + \textbf{Blackpill al centro} sobre headers hembra, \textbf{stack RTK a la derecha} + (Pro, XBee/breakout, USB-C al borde). Módulos SIEMPRE sobre headers hembra — nunca + soldados directo. Deja pasillo de GND alrededor y cablea con 22\,AWG sólido. \item Capacitores electrolíticos (10\,$\mu$F / 100\,$\mu$F) \textbf{con polaridad}: negativo a GND. Los 100\,nF cerámicos no tienen polaridad. \item 18650: respeta la polaridad; pack 1S4P $\sim$\textbf{12\,Ah} (nunca 40\,Ah). @@ -603,6 +646,13 @@ convertidores». Nuevo: tabla «Estado y cambios», aviso del \textbf{bypass UAR cerrado} del PCB (Bloque 9), aclaración \textbf{NTC del cargador vs TMP102 vs NTC$\rightarrow$PB1}, pack 1S4P $\sim$12\,Ah (nunca 40\,Ah), leyenda con colores de los diagramas CircuiTikZ, figura del Bloque 3 y referencias cruzadas.\\ +v3.1 & 2026-07-20 & \textbf{Bloque 5b}: protección de polaridad 24\,V (Q10 $+$ DzG 15\,V +1N4744A) — por fin dibujada y explicada. \textbf{Bloque 9c}: pines \textbf{obligatorios} del +XBee según datasheet — VREF(14)$\rightarrow$VCC, ON/OFF(20)$\rightarrow$GND, GND 4·10·11·15 — +$+$ USB de configuración (V\_USB/D$\pm$ $\rightarrow$ breakout USB-C), botón RESET y LED. +Clamp de PA5 $=$ 1N5819 del kit (PCB: BAT54). Avisos: disipadores TO-220 (tab $=$ drain) y +plano sugerido para placa perforada 10$\times$10. Lista de compras reconstruida \textbf{desde +cero} (1 tarjeta, con disipadores y consumibles).\\ v3.0 & 2026-07-08 & \textbf{Catálogo visual de piezas} (sección~\ref{sec:identifica}): vista física con patitas rotuladas de los módulos con CI (LM2596, MT3608, TP4056, AHT10, DFR1015), pinout completo del Blackpill de frente (40 pines, usados en color), simpleRTK2B Pro con sus @@ -628,6 +678,6 @@ AHT10 y electrolíticos; capacitores en mano (100\,nF / 10\,$\mu$F / 100\,$\mu$F \vspace{6pt} \noindent{\footnotesize Helgen Technologies · Proyecto Drogheda · Guía de conexión en -protoboard v3.0 (bloques 1--11) · Firmware v2.3 · Documento para el técnico de armado. +protoboard v3.1 (bloques 1--11) · Firmware v2.3 · Documento para el técnico de armado. Datos de conexión: \texttt{Drogheda\_Conexiones-por-Bloque\_Proto\_v1.xlsx} · Diagramas: \texttt{circuitikz-wiring/}.} diff --git a/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.pdf b/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.pdf index d63bf78..c1d8ab8 100644 Binary files a/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.pdf and b/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.pdf differ diff --git a/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.tex b/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.tex index 9365586..7693576 100644 --- a/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.tex +++ b/03-Architecture-Hardware/Guia-Conexion-Protoboard/main.tex @@ -1,5 +1,5 @@ % Helgen Drogheda — Guía de Conexión en Protoboard · DRG-PROTO-001 (es-MX) -% Watchdog HBOX v3 · tarjeta DEV STM32F411 Blackpill · bloques 1–11 · v3.0 +% Watchdog HBOX v3 · tarjeta DEV STM32F411 Blackpill · bloques 1–11 · v3.1 % v3.0 agrega modulos-pinout.tex (catálogo visual de piezas) + Bloque 9 con puente XBee. % % Compilar (preferido, con fuentes de marca): latexmk -xelatex main.tex @@ -65,7 +65,7 @@ bloque:}} {\small #1}}\par\smallskip} \helgenportada{Guía de Conexión en Protoboard}{HBOX Watchdog v3 — tarjeta DEV / protoboard · bloques 1--11}{% \begin{tabular}{@{}ll@{}} \textbf{Documento} & DRG-PROTO-001 — Guía de Conexión en Protoboard\\ - \textbf{Versión} & 3.0 (catálogo visual de piezas y pinouts; Bloque 9 con puente XBee 2.0$\rightarrow$2.54\,mm)\\ + \textbf{Versión} & 3.1 (pines obligatorios del XBee $+$ USB config; Bloque 5b Q10$+$Zener; disipadores y plano 10$\times$10)\\ \textbf{Fecha} & 8 de julio de 2026\\ \textbf{Firmware} & v2.3 · MCU STM32F411 «Blackpill»\\ \textbf{Dirigido a} & Técnico de armado — sigue el orden de la sección~\ref{sec:orden}\\ diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.pdf b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.pdf index 6bfeb10..55da57b 100644 Binary files a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.pdf and b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.pdf differ diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.png b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.png index 33b53d9..7cda75c 100644 Binary files a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.png and b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.png differ diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.tex b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.tex index 76c426b..e228b76 100644 --- a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.tex +++ b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto.tex @@ -19,6 +19,10 @@ \newcommand{\flagg}[4]{\node[circle,fill=#1,text=white,inner sep=1.6pt,font=\bfseries\tiny] (#2) at (#3) {#4};} \newcommand{\ant}[2]{\draw (#1,#2) -- ++(0,0.34) -- ++(-0.18,0.22); \draw (#1,#2) ++(0,0.34) -- ++(0.18,0.22);} \newcommand{\bnum}[2]{\node[circle,draw=Indigo,text=Indigo,inner sep=1.2pt,font=\bfseries\tiny] at (#1) {#2};} +% pinout strip helpers +\definecolor{cafe}{HTML}{8B4513} +\definecolor{dorado}{HTML}{DAA520} +\newcommand{\csq}[1]{\fcolorbox{black!45}{#1}{\phantom{\rule{0.12cm}{0.12cm}}}} \begin{document} \begin{tikzpicture}[every node/.append style={font=\footnotesize}] @@ -26,7 +30,7 @@ \node[anchor=north west,font=\bfseries\large,Indigo] at (-20.4,13.6) {HBOX Watchdog v3 — Diagrama ÚNICO de conexiones del protoboard (bloques 1–11)}; \node[anchor=north west,font=\scriptsize,gray] at (-20.4,12.9) - {Todo el sistema en una hoja, para verificación rápida · Modo B dibujado (Modo A: ver Avisos) · Proyecto Drogheda / Helgen · v1.0 · 2026-07-09}; + {Todo el sistema en una hoja, para verificación rápida · Modo B dibujado (Modo A: ver Avisos) · pinouts de componentes abajo · Proyecto Drogheda / Helgen · v1.2 · 2026-07-20}; \begin{scope}[shift={(-20.4,12.1)}] \foreach \i/\c/\t in {0/net5V/{5 V},1.6/net3V3/{3.3 V},3.2/netGND/GND,4.6/netSig/{Señal},6.2/netAna/{Analógico},8.6/netIgn/{Ign. / 24 V}}{ \draw[\c,line width=2pt] (\i,0)--(\i+0.45,0); \node[anchor=west,font=\scriptsize] at (\i+0.5,0){\t};} @@ -83,6 +87,9 @@ % --- compuerta de carga CHRG_RUN (PA8) --- \node[pmos,anchor=gate] (MC) at (-16.4,6.0){}; \node[font=\tiny,anchor=west,align=left] at (-15.5,6.0){IRF9540N (P)}; +\node[font=\tiny,gray,anchor=south west] at ($(MC.source)+(0.06,0.0)$){S}; +\node[font=\tiny,gray,anchor=north west] at ($(MC.drain)+(0.06,0.0)$){D}; +\node[font=\tiny,gray,anchor=south] at ($(MC.gate)+(0.18,0.08)$){G}; \draw[net5V,line width=0.9pt] (MC.source) -- (MC.source |- 0,8.6); \fill[net5V] (MC.source |- 0,8.6) circle(1.4pt); \draw[netSig] (MC.gate) -- (-17.6,6.0); \fill (-17.6,6.0) circle(1.3pt); @@ -90,6 +97,9 @@ \draw (-17.6,7.4) -- (MC.source |- 0,7.4); \fill (MC.source |- 0,7.4) circle(1.3pt); \node[npn,anchor=collector] (QC) at (-17.6,5.3){}; \node[font=\tiny,anchor=west] at (-17.25,4.75){2N3904}; +\node[font=\tiny,gray,anchor=south west] at ($(QC.collector)+(0.05,0.0)$){C}; +\node[font=\tiny,gray,anchor=north west] at ($(QC.emitter)+(0.05,0.0)$){E}; +\node[font=\tiny,gray,anchor=south] at ($(QC.base)+(0.14,0.08)$){B}; \draw[netSig] (QC.collector) -- (-17.6,6.0); \draw[netSig] (QC.base) to[R,l_=$1$k] (-20.2,4.75 |- QC.base); \draw[netGND] (QC.emitter) -- ++(0,-0.35) node[ground]{}; @@ -212,6 +222,9 @@ \draw (5.1,6.6) to[R,l=$1$k] (7.1,6.6); \node[npn,anchor=base] (Q1) at (7.6,6.6){}; \node[font=\tiny,anchor=west] at (8.5,6.3){2N3904}; +\node[font=\tiny,gray,anchor=south west] at ($(Q1.collector)+(0.05,0.0)$){C}; +\node[font=\tiny,gray,anchor=north west] at ($(Q1.emitter)+(0.05,0.0)$){E}; +\node[font=\tiny,gray,anchor=south] at ($(Q1.base)+(0.14,0.08)$){B}; \draw[netSig] (7.1,6.6) -- (Q1.base); \draw[netGND] (Q1.emitter) -- ++(0,-0.35) node[ground]{}; \draw[netSig] (Q1.collector) -- (Q1.collector |- 0,8.4); \fill (Q1.collector |- 0,8.4) circle(1.4pt); @@ -219,6 +232,9 @@ \fill[net5V] (Q1.collector |- 0,10.6) circle(1.4pt); \node[pmos,anchor=gate] (M1) at (9.9,8.4){}; \node[font=\tiny,anchor=south,align=center] at (10.6,9.35){IRF9540N (P)}; +\node[font=\tiny,gray,anchor=south west] at ($(M1.source)+(0.06,0.0)$){S}; +\node[font=\tiny,gray,anchor=north west] at ($(M1.drain)+(0.06,0.0)$){D}; +\node[font=\tiny,gray,anchor=south] at ($(M1.gate)+(0.18,0.08)$){G}; \draw[netSig] (Q1.collector |- 0,8.4) -- (M1.gate); \draw[net5V,line width=0.9pt] (M1.source) -- (M1.source |- 0,10.6); \fill[net5V] (M1.source |- 0,10.6) circle(1.4pt); @@ -271,32 +287,62 @@ % XBee 4G \node[draw,fill=black!8,rounded corners,inner sep=0] (G4) at (21.7,3.7) [minimum width=3.4cm,minimum height=3.8cm]{}; \node[font=\bfseries\scriptsize,align=center] at (21.7,4.6){4G NTRIP Master\\(XBee)}; -\node[font=\tiny,align=center] at (21.7,3.85){en breakout BOB-08276\\(paso 2.0 mm $\rightarrow$ 2.54)}; -\node[font=\bfseries\tiny,anchor=west] at (20.05,3.3){DIN}; -\node[font=\bfseries\tiny,anchor=west] at (20.05,2.5){DOUT}; -\node[font=\bfseries\tiny,anchor=east] at (23.35,4.9){VCC}; -\node[font=\bfseries\tiny,anchor=west] at (21.8,2.05){GND}; -\draw[netGND,line width=0.9pt] (21.7,1.8) -- (21.7,1.3) node[ground]{}; +\node[font=\tiny,align=center] at (21.4,3.85){en breakout BOB-08276\\(paso 2.0 mm $\rightarrow$ 2.54)}; +\node[font=\bfseries\tiny,anchor=west] at (20.05,3.3){3 RX (DIN)}; +\node[font=\bfseries\tiny,anchor=west] at (20.05,2.5){2 TX (DOUT)}; +\node[font=\bfseries\tiny,anchor=east] at (23.35,4.9){1 VCC}; +\node[font=\bfseries\tiny,anchor=east] at (23.35,4.2){14 VREF}; +\node[font=\bfseries\tiny,anchor=east] at (23.35,3.6){6 V\_USB}; +\node[font=\bfseries\tiny,anchor=east] at (23.35,3.0){7 USB$+$}; +\node[font=\bfseries\tiny,anchor=east] at (23.35,2.4){8 USB$-$}; +% pines obligatorios del borde inferior: RESET · LED · GND x4 · ON/OFF (leyenda abajo) +\node[font=\bfseries\tiny,anchor=south] at (20.4,1.9){5}; +\node[font=\bfseries\tiny,anchor=south] at (21.2,1.9){13}; +\node[font=\bfseries\tiny,anchor=south] at (22.0,1.9){G}; +\node[font=\bfseries\tiny,anchor=south] at (22.8,1.9){20}; +\draw[netSig,line width=0.8pt] (20.4,1.8) -- (20.4,1.35); +\draw (20.4,1.35) to[push button] (20.4,0.45); +\draw[netGND] (20.4,0.45) -- (20.4,0.25) node[ground]{}; +\draw[netSig,line width=0.8pt] (21.2,1.8) -- (21.2,1.45); +\draw (21.2,1.45) to[R] (21.2,0.55); +\draw (21.2,0.55) to[leD] (21.2,-0.35); +\draw[netGND] (21.2,-0.35) -- (21.2,-0.5) node[ground]{}; +\node[font=\tiny,anchor=west] at (21.4,1.0){1k}; +\draw[netGND,line width=0.9pt] (22.0,1.8) -- (22.0,1.3) node[ground]{}; +\draw[netGND,line width=0.9pt] (22.8,1.8) -- (22.8,1.3) node[ground]{}; +\node[font=\tiny,anchor=north west,align=left] at (19.9,-0.95){\textbf{5}$=$RESET (al aire $=$ ON) · \textbf{13}$=$LED (tenue, 1.8 V)\\\textbf{G}$=$GND, pines \textbf{4·10·11·15 (los cuatro)} · \textbf{20}$=$ON/OFF$\rightarrow$\textbf{GND $=$ siempre ON}}; +% USB (solo configuracion desde la PC) +\node[draw,rounded corners,fill=blue!6,inner sep=0] (USBB) at (26.0,3.1) [minimum width=2.6cm,minimum height=2.2cm]{}; +\node[font=\bfseries\tiny,align=center] at (26.0,3.8){Breakout USB-C\\(con 5.1k en CC)}; +\node[font=\tiny,align=center,Indigo] at (26.0,2.6){$\rightarrow$ PC\\SOLO configuración}; +\node[font=\bfseries\tiny,anchor=west] at (24.75,3.6){VBUS}; +\node[font=\bfseries\tiny,anchor=west] at (24.75,3.0){D$+$}; +\node[font=\bfseries\tiny,anchor=west] at (24.75,2.4){D$-$}; +\draw[net5V,line width=0.9pt] (23.4,3.6) -- (24.7,3.6); +\draw[netSig,line width=0.9pt] (23.4,3.0) -- (24.7,3.0); +\draw[netSig,line width=0.9pt] (23.4,2.4) -- (24.7,2.4); +\node[net5V,font=\tiny,anchor=south] at (24.05,3.65){5 V}; +\draw[netGND,line width=0.9pt] (26.0,2.0) -- (26.0,1.55) node[ground]{}; % DOUT -> RX2 directo (RTCM3) \draw[netSig,densely dashed,line width=1pt,-{Stealth}] (20.0,2.5) -- (19.2,2.5) -- (19.2,1.5) -- (16.4,1.5) -- (16.4,2.0); \node[netSig,font=\tiny,anchor=north] at (17.9,1.4){RTCM3 \textbf{DIRECTO} $\rightarrow$ F9P RX2 (no pasa por el MCU)}; % antenas LTE \draw (21.0,5.6) -- (21.0,5.9); \ant{21.0}{5.9} \draw (22.4,5.6) -- (22.4,5.9); \ant{22.4}{5.9} -\node[font=\tiny,anchor=south] at (21.7,6.8){2$\times$ ant. LTE (¡antes de energizar!)}; -% servidor -\draw[-{Stealth},Indigo,thick] (23.4,3.4) -- (24.4,3.4); -\node[Indigo,font=\tiny,anchor=west] at (24.45,3.4){$\rightarrow$ servidor NTRIP}; +\node[font=\tiny,anchor=south,align=center] at (21.4,6.8){2$\times$ ant. LTE (¡antes de energizar!)\\$\rightarrow$ servidor NTRIP}; % buck MODEM 3.3V \node[draw,rounded corners,fill=blue!6,minimum width=2.6cm,minimum height=1.2cm,font=\tiny,align=center] (BKM) at (21.8,8.6){LM2596/MP1584\\«MODEM 3.3 V» (aj.)}; \draw[net5V,line width=0.9pt] (20.0,7.6) -- (20.0,8.6) -- (20.5,8.6); \draw[netGND] (21.2,8.0) -- (21.2,7.5) node[ground]{}; -\draw[net3V3,line width=0.9pt] (23.1,8.6) -- (23.9,8.6) -- (23.9,4.9) -- (23.4,4.9); +\draw[net3V3,line width=0.9pt] (23.1,8.6) -- (23.9,8.6) -- (23.9,4.2) -- (23.4,4.2); +\fill[net3V3] (23.9,4.9) circle(1.3pt); +\draw[net3V3,line width=0.9pt] (23.9,4.9) -- (23.4,4.9); +\node[net3V3,font=\tiny,anchor=west,align=left] at (24.0,4.55){VREF(14) $\rightarrow$ VCC\\\textbf{obligatorio}}; \node[net3V3,font=\bfseries\tiny,anchor=west] at (24.0,8.6){3.3 V — NUNCA 5 V}; \fill[net3V3] (23.9,6.4) circle(1.4pt); \draw (23.9,6.4) -- (24.7,6.4); \draw (24.7,6.4) to[C,l=$100\,\mu$F$+$100 nF] (24.7,5.3); \draw[netGND] (24.7,5.3) -- (24.7,5.1) node[ground]{}; -\node[font=\tiny,gray,anchor=west,align=left] at (24.0,7.5){junto al pin VCC\\(picos LTE 1--1.5 A)}; +\node[font=\tiny,gray,anchor=west,align=left] at (24.0,7.5){junto al pin VCC\\(picos LTE hasta \textbf{2 A})}; % ================= BLOQUE 6 · AHT10 (I2C1) ================= \bnum{7.5,3.35}{6} @@ -330,6 +376,9 @@ \draw[netSig] (7.9,-2.6) -- (8.3,-2.6); \node[nmos,anchor=gate] (M2) at (8.9,-2.6){}; \node[font=\tiny,anchor=west] at (10.0,-3.3){IRLZ44N (N, lógico)}; +\node[font=\tiny,gray,anchor=south west] at ($(M2.drain)+(0.06,0.0)$){D}; +\node[font=\tiny,gray,anchor=north west] at ($(M2.source)+(0.06,0.0)$){S}; +\node[font=\tiny,gray,anchor=south] at ($(M2.gate)+(0.18,0.08)$){G}; \draw (8.3,-2.6) to[R,l_=$100$k] (8.3,-4.2); \draw[netGND] (8.3,-4.2) -- (8.3,-4.4) node[ground]{}; \draw[netGND] (M2.source) -- (M2.source |- 0,-3.7) node[ground]{}; @@ -345,9 +394,24 @@ \fill (10.4,-1.5) circle(1.3pt); \fill[net5V] (10.4,-0.3) circle(1.3pt); \fill[net5V] (12.2,-0.3) circle(1.3pt); \draw (10.4,-1.5) to[D,l={\tiny 1N5819}] (10.4,-0.3); \node[draw,rounded corners,fill=blue!6,minimum width=2.3cm,minimum height=1.2cm,font=\tiny,align=center] (BKV) at (15.0,-0.3){LM2596 «VENT»\\24 $\rightarrow$ \textbf{5.0 V} (aj.)}; -\draw[netIgn,line width=0.9pt] (16.2,-0.3) -- (17.0,-0.3); -\node[netIgn,font=\bfseries\tiny,anchor=west] at (17.05,-0.3){Fuente 24 V (banco)}; \draw[netGND] (15.0,-0.9) -- (15.0,-1.35) node[ground]{}; +% --- 5b · Protección de polaridad 24 V: Q10 (P-FET) + DzG 15 V + 100k --- +\node[font=\bfseries\tiny,Indigo,anchor=south] at (17.1,0.05){5b · protección 24 V}; +\draw[netIgn,line width=0.9pt] (16.15,-0.3) -- (19.0,-0.3); +\node[netIgn,font=\tiny,anchor=south] at (17.5,-0.28){24 V protegido}; +\node[pmos,anchor=source,rotate=0] (QX) at (19.0,-0.3){}; +\node[font=\tiny,anchor=west,align=left] at (19.5,-0.55){Q10\\IRF9540N (P)}; +\node[font=\tiny,gray,anchor=south east] at (19.0,-0.25){S}; +\node[font=\tiny,gray,anchor=north west] at ($(QX.drain)+(0.05,0.0)$){D}; +\node[font=\tiny,gray,anchor=east] at ($(QX.gate)+(-0.05,0.15)$){G}; +\draw[netIgn,line width=0.9pt] (QX.drain) -- (QX.drain |- 0,-1.7) -- (19.4,-1.7) -- (19.4,-2.1); +\node[netIgn,font=\bfseries\tiny,anchor=north] at (19.4,-2.2){Fuente 24 V (banco / gabinete)}; +\draw[netSig] (QX.gate) -- (17.3,-0.85 |- QX.gate); \fill (17.3,-0.85 |- QX.gate) circle(1.3pt); +\draw (17.3,-0.85 |- QX.gate) to[R,l_=$100$k] (17.3,-2.35); +\draw[netGND] (17.3,-2.35) -- (17.3,-2.5) node[ground]{}; +\draw (17.3,-0.85 |- QX.gate) to[zD,l={\tiny DzG 15 V}] (17.3,-0.3); +\fill[netIgn] (17.3,-0.3) circle(1.3pt); +\node[font=\tiny,gray,anchor=north west,align=left] at (16.2,-2.75){si conectas la fuente al revés, Q10 corta\\— protege buck y DFR · DzG $=$ 1N4744A 1 W}; % ================= AVISOS ================= \node[draw,rounded corners,fill=gray!6,anchor=north west,align=left,font=\scriptsize,text width=19.6cm,inner sep=7pt] at (-20.4,-5.9){% @@ -355,8 +419,88 @@ $\bullet$ \textbf{Modo A (por defecto):} el 4G va \textbf{dentro} del socket XBee del Pro (switch $\rightarrow$ UART2); PA9, PA10, la buck «MODEM 3.3 V» y el breakout \textbf{no se usan}; todo lo demás igual. El diagrama dibuja el \textbf{Modo B} (diagnóstico \$PHLG).\\ $\bullet$ \textbf{Apagado = estado seguro:} el stack arranca \textbf{OFF} (pull-up de 10 k en la compuerta del IRF9540N); PA1 en ALTO lo enciende.\\ $\bullet$ \textbf{Nunca 5 V} a PA0/PA4/PA7/PB1 sin divisor ni a \textbf{PA5} (digital, máx 3.3 V — clamp Schottky \textbf{1N5819} del kit a 3V3; en el PCB es BAT54). \textbf{IOREF $\rightarrow$ 3V3 es obligatorio} (sin él, los UART del Pro no responden).\\ -$\bullet$ \textbf{XBee VCC = 3.3 V, NUNCA 5 V} (buck dedicada desde SAL: reiniciar el stack reinicia el módem). \textbf{AHT10: solo él} en I\textsuperscript{2}C1 y solo a 3V3.\\ +$\bullet$ \textbf{4G en breakout — pines obligatorios:} \textbf{VREF(14)$\rightarrow$VCC} y \textbf{ON/OFF(20)$\rightarrow$GND} (sin ellos el módem puede no encender) $+$ \textbf{los 4 GND (4·10·11·15)}. \textbf{VCC $=$ 3.3 V, NUNCA 5 V} (buck dedicada desde SAL, picos \textbf{2 A}: reiniciar el stack reinicia el módem). USB (V\_USB$=$VBUS 5 V $+$ D$\pm$) \textbf{solo para configurar} desde la PC. En Modo A el socket del Pro resuelve todos estos pines.\\ +$\bullet$ \textbf{AHT10: solo él} en I\textsuperscript{2}C1 y solo a 3V3.\\ $\bullet$ Ventilador en \textbf{5 V separado} (LM2596 ajustado a 5.0 V con multímetro); IRLZ44N debe ser \textbf{lógico}. MT3608 ajustado \textbf{apenas por debajo} del 5 V del vehículo (prioridad al vehículo). Electrolíticos \textbf{con polaridad}.\\ -$\bullet$ Blackpill: \textbf{USB y riel 5 V nunca al mismo tiempo}. Bench: bloques 1+3 bastan para el arranque; agrega el resto en orden.}; +$\bullet$ Blackpill: \textbf{USB y riel 5 V nunca al mismo tiempo}. Bench: bloques 1+3 bastan para el arranque; agrega el resto en orden.\\ +$\bullet$ \textbf{Disipadores TO-220} (perfboard 10$\times$10): ponlos en \textbf{Q10} y el \textbf{IRF9540N del interruptor de carga}; opcional en IRLZ44N y el IRF9540N de carga de batería. \textbf{La tab metálica $=$ DRAIN} — si dos comparten disipador, usa mica/aislante. Plano sugerido 10$\times$10: \textbf{potencia a la izquierda · Blackpill al centro · stack RTK a la derecha} (igual que esta hoja); módulos sobre headers hembra, nunca soldados directo.}; + +% ================= FRANJA DE PINOUTS (para el técnico de soldadura) ================= +\begin{scope}[shift={(0,-0.75)}] +\node[anchor=north west,font=\bfseries\small,Indigo] at (-20.4,-9.8) + {Pinouts — identifica CADA pieza antes de soldar (vistas de frente / superior)}; + +% --- A) 4G NTRIP Master (XBee) 20 pines, vista superior --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] (PXB) at (-20.4,-10.4) [minimum width=6.6cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (-20.2,-10.55){4G NTRIP Master (XBee) — vista superior, antenas arriba}; +\node[draw,fill=black!12,rounded corners,inner sep=0] at (-17.05,-12.85) [minimum width=1.5cm,minimum height=3.3cm]{}; +\foreach \i/\txt/\st in {1/{\textbf{1 VCC 3.3--3.6 V (2 A pk)}}/b,2/{2 TX (DOUT)}/n,3/{3 RX (DIN)}/n,4/{\textbf{4 GND}}/b,5/{5 RESET (al aire $=$ ON)}/n,6/{6 V\_USB (5 V $=$ VBUS)}/n,7/{7 USB$+$}/n,8/{8 USB$-$}/n,9/{9 DTR — no conectar}/n,10/{\textbf{10 GND}}/b}{ + \draw ($(-17.8,-11.35)+(0,-0.31*\i+0.31)$) -- ++(-0.28,0); + \node[font=\tiny,anchor=east] at ($(-18.12,-11.35)+(0,-0.31*\i+0.31)$) {\txt};} +\foreach \i/\txt in {1/{\textbf{20 ON/OFF $\rightarrow$ GND $=$ ON}},2/{19 —},3/{18 —},4/{17 —},5/{16 RTS — no conectar},6/{\textbf{15 GND}},7/{\textbf{14 VREF $\rightarrow$ VCC}},8/{13 LED (1.8 V)},9/{12 CTS — no conectar},10/{\textbf{11 GND}}}{ + \draw ($(-16.3,-11.35)+(0,-0.31*\i+0.31)$) -- ++(0.28,0); + \node[font=\tiny,anchor=west] at ($(-15.98,-11.35)+(0,-0.31*\i+0.31)$) {\txt};} + +% --- B) TO-92 --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] at (-13.5,-10.4) [minimum width=3.6cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (-13.3,-10.55){TO-92 (parte plana AL FRENTE)}; +\node[draw,fill=black!12,rounded corners=2pt] at (-12.3,-11.6) [minimum width=1.1cm,minimum height=0.55cm]{}; +\foreach \x/\l in {-12.65/E,-12.3/B,-11.95/C}{ \draw (\x,-11.87) -- (\x,-12.15); \node[font=\bfseries\tiny,anchor=north] at (\x,-12.17){\l}; } +\node[font=\tiny,anchor=west] at (-11.6,-11.7){\textbf{2N3904}}; +\node[draw,fill=black!12,rounded corners=2pt] at (-12.3,-13.2) [minimum width=1.1cm,minimum height=0.55cm]{}; +\foreach \x/\l in {-12.8/{$+$V},-12.3/OUT,-11.8/G}{ \draw (\x,-13.47) -- (\x,-13.75); \node[font=\bfseries\tiny,anchor=north] at (\x,-13.77){\l}; } +\node[font=\tiny,anchor=west] at (-11.6,-13.3){\textbf{LM35}}; +\node[font=\tiny,gray,anchor=north west,align=left] at (-13.3,-14.15){si lo volteas, el orden se invierte}; + +% --- C) TO-220 --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] at (-9.6,-10.4) [minimum width=3.7cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (-9.4,-10.55){TO-220 (frente; tab metálica atrás)}; +\node[draw,fill=black!30] at (-8.1,-11.35) [minimum width=1.15cm,minimum height=0.3cm]{}; +\node[draw,fill=black!12] at (-8.1,-11.9) [minimum width=1.15cm,minimum height=0.8cm]{}; +\foreach \x/\l in {-8.45/G,-8.1/D,-7.75/S}{ \draw (\x,-12.3) -- (\x,-12.6); \node[font=\bfseries\tiny,anchor=north] at (\x,-12.62){\l}; } +\node[font=\tiny,anchor=north west,align=left] at (-9.4,-13.15){\textbf{IRF9540N} (P) y \textbf{IRLZ44N} (N):\\G--D--S · \textbf{la tab $=$ D (drain)}\\no atornilles tabs a un mismo\\disipador sin aislante}; + +% --- D) Diodos / LED / electrolítico --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] at (-5.6,-10.4) [minimum width=4.6cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (-5.4,-10.55){Polaridad}; +\draw (-5.3,-11.5) to[D] (-3.9,-11.5); +\node[font=\tiny,anchor=west] at (-3.75,-11.5){\textbf{1N5819/4744}: franja $=$ cátodo (K)}; +\draw (-5.3,-12.5) to[leD] (-3.9,-12.5); +\node[font=\tiny,anchor=west] at (-3.75,-12.5){\textbf{LED}: pata larga $=$ ánodo ($+$)}; +\draw (-5.3,-13.5) to[C] (-3.9,-13.5); +\node[font=\tiny,anchor=west] at (-3.75,-13.5){\textbf{Electrolítico}: franja $=$ negativo ($-$)}; +\node[font=\tiny,gray,anchor=north west] at (-5.4,-14.15){cerámicos (104) no tienen polaridad}; + +% --- E) Módulos (pads de conexión) --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] at (-0.6,-10.4) [minimum width=14.2cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (-0.4,-10.55){Módulos — pads (vista superior)}; +\node[draw,fill=blue!6,rounded corners] (mTP) at (0.9,-12.4) [minimum width=2.0cm,minimum height=1.6cm,font=\bfseries\tiny]{TP4056}; +\node[font=\tiny,anchor=east] at (-0.15,-11.9){IN$+$}; \node[font=\tiny,anchor=east] at (-0.15,-12.9){IN$-$}; +\node[font=\tiny,anchor=west] at (1.95,-11.9){B$+$}; \node[font=\tiny,anchor=west] at (1.95,-12.9){B$-$}; +\node[font=\tiny,gray,anchor=north] at (0.9,-13.35){OUT$\pm$: sin usar}; +\node[draw,fill=blue!6,rounded corners] (mMT) at (4.45,-12.4) [minimum width=1.9cm,minimum height=1.6cm,font=\bfseries\tiny,align=center]{MT3608\\{\tiny trimmer $=$ ajuste}}; +\node[font=\tiny,anchor=east] at (3.45,-11.9){IN$+$}; \node[font=\tiny,anchor=east] at (3.45,-12.9){IN$-$}; +\node[font=\tiny,anchor=west] at (5.45,-11.9){OUT$+$}; \node[font=\tiny,anchor=west] at (5.45,-12.9){OUT$-$}; +\node[draw,fill=blue!6,rounded corners] (mLM) at (8.1,-12.4) [minimum width=2.0cm,minimum height=1.6cm,font=\bfseries\tiny,align=center]{LM2596\\{\tiny $\times$2: VENT 5.0 V}\\{\tiny y MODEM 3.3 V}}; +\node[font=\tiny,anchor=east] at (7.05,-11.9){IN$+$}; \node[font=\tiny,anchor=east] at (7.05,-12.9){IN$-$}; +\node[font=\tiny,anchor=west] at (9.15,-11.9){OUT$+$}; \node[font=\tiny,anchor=west] at (9.15,-12.9){OUT$-$}; +\node[draw,fill=blue!6,rounded corners] (mDF) at (11.8,-12.4) [minimum width=1.8cm,minimum height=1.6cm,font=\bfseries\tiny]{DFR1015}; +\node[font=\tiny,anchor=east] at (10.85,-11.9){IN$+$}; \node[font=\tiny,anchor=east] at (10.85,-12.9){IN$-$}; +\node[font=\tiny,anchor=west] at (12.75,-11.9){OUT$+$}; \node[font=\tiny,anchor=west] at (12.75,-12.9){OUT$-$}; +\node[font=\tiny,gray,anchor=north,align=center] at (11.8,-13.4){IN$-$/OUT$-$ $=$ GND común}; +\node[font=\tiny,anchor=north west,align=left] at (-0.4,-14.35){\textbf{AHT10}: VIN$\rightarrow$3V3 · GND · SCL$\rightarrow$PB6 · SDA$\rightarrow$PB7 \quad · \quad \textbf{Breakout USB-C}: VBUS · D$+$ · D$-$ · GND \quad · \quad \textbf{BOB-08276}: hembras 2.0 mm arriba, pines 2.54 abajo (pin 1 marcado)}; + +% --- F) Resistencias usadas (código de 4 bandas) --- +\node[draw,rounded corners,fill=gray!5,inner sep=5pt,anchor=north west] at (14.0,-10.4) [minimum width=9.4cm,minimum height=4.6cm]{}; +\node[anchor=north west,font=\bfseries\tiny,Indigo] at (14.2,-10.55){Resistencias usadas — código de colores (4ª banda dorada $=$ $\pm$5\,\%)}; +\node[font=\tiny,anchor=north west,align=left,inner sep=0] at (14.2,-11.1){% +\begin{tabular}{@{}l l@{\hspace{2.2em}}l l@{}} +$100\,\Omega$ & \csq{cafe}\,\csq{black}\,\csq{cafe}\,\csq{dorado} & $4.7$ k & \csq{yellow}\,\csq{violet}\,\csq{red}\,\csq{dorado}\\[1pt] +$220\,\Omega$ & \csq{red}\,\csq{red}\,\csq{cafe}\,\csq{dorado} & $10$ k & \csq{cafe}\,\csq{black}\,\csq{orange}\,\csq{dorado}\\[1pt] +$330\,\Omega$ & \csq{orange}\,\csq{orange}\,\csq{cafe}\,\csq{dorado} & $22$ k & \csq{red}\,\csq{red}\,\csq{orange}\,\csq{dorado}\\[1pt] +$1$ k & \csq{cafe}\,\csq{black}\,\csq{red}\,\csq{dorado} & $100$ k & \csq{cafe}\,\csq{black}\,\csq{yellow}\,\csq{dorado}\\ +\end{tabular}}; +\node[font=\tiny,gray,anchor=north west,align=left] at (14.2,-13.6){en duda: mídela con el multímetro antes de soldar\\pines del \textbf{Blackpill}: etiquetados en el cuerpo del diagrama (centro)}; +\end{scope} \end{tikzpicture} \end{document} diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.jpg b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.jpg new file mode 100644 index 0000000..e421a0b Binary files /dev/null and b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.jpg differ diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.png b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.png index 2a3d878..1693b78 100644 Binary files a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.png and b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_HiRes-300dpi.png differ diff --git a/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_TV-4K.jpg b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_TV-4K.jpg new file mode 100644 index 0000000..7a505cd Binary files /dev/null and b/03-Architecture-Hardware/circuitikz-wiring/Drogheda_Diagrama-Unico-Proto_TV-4K.jpg differ diff --git a/03-Architecture-Hardware/watchdog-LISTA-DE-COMPRAS-ES.xlsx b/03-Architecture-Hardware/watchdog-LISTA-DE-COMPRAS-ES.xlsx index 141a5cd..70b2317 100644 Binary files a/03-Architecture-Hardware/watchdog-LISTA-DE-COMPRAS-ES.xlsx and b/03-Architecture-Hardware/watchdog-LISTA-DE-COMPRAS-ES.xlsx differ diff --git a/03-Architecture-Hardware/watchdog-protoboard-BOM-3boards.xlsx b/03-Architecture-Hardware/watchdog-protoboard-BOM-3boards.xlsx index d99c9b0..427d993 100644 Binary files a/03-Architecture-Hardware/watchdog-protoboard-BOM-3boards.xlsx and b/03-Architecture-Hardware/watchdog-protoboard-BOM-3boards.xlsx differ diff --git a/CLAUDE.md b/CLAUDE.md index 63d6c3a..ff2eb62 100644 --- a/CLAUDE.md +++ b/CLAUDE.md @@ -88,7 +88,7 @@ HBOX/cabinet mechanicals (+ verify D2/D8=RX2/TX2 on a physical Pro), then routin SW_5V ≥0.8 mm per kicad-guide). Fab gate unchanged: bench-validate the LTC4040 backup + hot-cell charge cutoff on the proto first. Latest proto assumptions ledger = `Drogheda_Conexiones-por-Bloque_Proto_v1.xlsx` (*Estado y cambios*) + -`Drogheda_Guia-Conexion-Protoboard_ES_v3.0.pdf` (LaTeX source in repo: +`Drogheda_Guia-Conexion-Protoboard_ES_v3.1.pdf` (LaTeX source in repo: `Guia-Conexion-Protoboard/`). Wiring diagrams v2.1 (blocks 1–11) in `circuitikz-wiring/`; client decks Avance + RCA refreshed to v1.1. @@ -218,7 +218,7 @@ these before presenting; if it breaks one, say so and propose the compliant fix. | `00-Project-Management` | plan, ethos, hackathon, **financials**, **handover**, client comms, Drive tooling | [[00-Project-Management/PLAN\|PLAN]] · [[00-Project-Management/Engineering-Handover\|Engineering-Handover]] · `ethos.md` · `hackathon-plan.md` · `Financials.md` · `Drive-Upload/` · `client-comms/` | | `01-Requirements` | what we build | `SRS.md` · `HBOX-product-spec.md` | | `02-Architecture-Software` | backend/software analysis, ADRs | `backend-review.md` | -| `03-Architecture-Hardware` | HBOX/cabinet, wiring, BOM, **watchdog PCB v3** | `hardware-respec-and-pcb-brief.md` · `cabinet-electrical-bom.md` · `watchdog-schematic.md` · `watchdog-health-telemetry.md` · `firmware-review.md` · `BOM-master.md` (+§5 Block B/E/H/I parts) · **`watchdog-pcb-v3-design.md`** (schematic spec) · `watchdog-pcb-v3-bom.xlsx` · `watchdog-pcb-v3-kicad-guide.md` (KiCad→JLCPCB) · `watchdog-pcb-v3-blockdiagram.svg` · `watchdog-protoboard-bringup.md` + `watchdog-proto-bench-bringup-v3.md` · `watchdog-connections.xlsx` (PCB pin/net list; H1 DNP; +B/H/I rows) · `watchdog-connections-rationale.md` (+§7 additions 2026-07-02) · **`watchdog-electrical-design-state.md`** (CANONICAL — read first) · **`watchdog-production-schematic-delta.md`** (PROD build spec; LTC4040 §4 values) · `kicad/` — `hbox-watchdog-v3.kicad_sch` (**DEV/proto**) · `hbox-watchdog-v3-PROD.kicad_sch/.kicad_pcb` (**PRODUCTION**: ERC 0, layout started, DRC baseline) · `Drogheda-sym.kicad_sym` (MP1584EN · LTC4040EUFD · AO4406A) · `Drogheda_Conexiones-por-Bloque_Proto_v1.xlsx` (**proto assumptions ledger**) · `Guia-Conexion-Protoboard/` (LaTeX source; `modulos-pinout.tex` = visual parts catalog) → `Drogheda_Guia-Conexion-Protoboard_ES_v3.0.pdf` · **`2026-07-08_Drogheda_4G-Modem-Alternatives_v1.0.md`** (XBee 2.0 mm bridge + cheap-4G survey) · `circuitikz-wiring/` (sheet + Beamer v2.1, blocks 1–11; XBee-socket 3V3 fix 07-08; **`Drogheda_Diagrama-Unico-Proto`** = todo-en-una-hoja para verificación rápida, Modo B, 07-09) · `watchdog-protoboard-BOM-3boards.xlsx` + `watchdog-LISTA-DE-COMPRAS-ES.xlsx` (proto BOMs) · **`2026-07-06_Drogheda_EinarBoard-1.0-PreFab-Audit_v1.0.md`** (CLOSED — Rev 1.1 fixes) · `Assembly-BOM-Split.md` + `LCSC-search-list.md` (verified LCSC) + `JLCPCB-Order-Guide.md` (ordering runbook) · `harness-connector-pinout.md` + `Socket-Pinout-Silkscreen.md` · **`EinarBoard-Manual/`** (Rev 1.1 order-prep pack: `einarboard-manual.tex` → branded PDF · `helgen_einarboard_1.0_production_bom.xlsx` · `tools/generate_production_bom.py` + `tools/sync_bom.py` Excel→LaTeX BOM sync) — plus repo-root `scripts/prep_order_release.sh` (safe cleanup + release commit) | +| `03-Architecture-Hardware` | HBOX/cabinet, wiring, BOM, **watchdog PCB v3** | `hardware-respec-and-pcb-brief.md` · `cabinet-electrical-bom.md` · `watchdog-schematic.md` · `watchdog-health-telemetry.md` · `firmware-review.md` · `BOM-master.md` (+§5 Block B/E/H/I parts) · **`watchdog-pcb-v3-design.md`** (schematic spec) · `watchdog-pcb-v3-bom.xlsx` · `watchdog-pcb-v3-kicad-guide.md` (KiCad→JLCPCB) · `watchdog-pcb-v3-blockdiagram.svg` · `watchdog-protoboard-bringup.md` + `watchdog-proto-bench-bringup-v3.md` · `watchdog-connections.xlsx` (PCB pin/net list; H1 DNP; +B/H/I rows) · `watchdog-connections-rationale.md` (+§7 additions 2026-07-02) · **`watchdog-electrical-design-state.md`** (CANONICAL — read first) · **`watchdog-production-schematic-delta.md`** (PROD build spec; LTC4040 §4 values) · `kicad/` — `hbox-watchdog-v3.kicad_sch` (**DEV/proto**) · `hbox-watchdog-v3-PROD.kicad_sch/.kicad_pcb` (**PRODUCTION**: ERC 0, layout started, DRC baseline) · `Drogheda-sym.kicad_sym` (MP1584EN · LTC4040EUFD · AO4406A) · `Drogheda_Conexiones-por-Bloque_Proto_v1.xlsx` (**proto assumptions ledger**) · `Guia-Conexion-Protoboard/` (LaTeX source; `modulos-pinout.tex` = visual parts catalog) → `Drogheda_Guia-Conexion-Protoboard_ES_v3.1.pdf` · **`2026-07-08_Drogheda_4G-Modem-Alternatives_v1.0.md`** (XBee 2.0 mm bridge + cheap-4G survey) · `circuitikz-wiring/` (sheet + Beamer v2.1, blocks 1–11; XBee-socket 3V3 fix 07-08; **`Drogheda_Diagrama-Unico-Proto`** = todo-en-una-hoja para verificación rápida, Modo B; v1.1 07-10 agrega XBee 20-pin obligatorios VREF(14)→VCC · ON/OFF(20)→GND · GND×4 + USB config + franja de pinouts para el técnico; HiRes-300dpi.png para TV; **v1.2 07-20**: letras G/D/S·B/C/E en todos los transistores + bloque 5b Q10+DzG 15V) · **Guía v3.1** (5b Q10+Zener · 9c pines obligatorios XBee + USB · disipadores · plano 10×10) · **lista de compras reconstruida DESDE CERO** (1 tarjeta ≈MX$2,087) · `watchdog-protoboard-BOM-3boards.xlsx` + `watchdog-LISTA-DE-COMPRAS-ES.xlsx` (proto BOMs; 07-10: +BOB-08276/PRT-08272, buck «MODEM 3.3V», breakout USB-C+cable, botón/LED módem, straps VREF/ON-OFF, surtido +220R/22k) · **`2026-07-06_Drogheda_EinarBoard-1.0-PreFab-Audit_v1.0.md`** (CLOSED — Rev 1.1 fixes) · `Assembly-BOM-Split.md` + `LCSC-search-list.md` (verified LCSC) + `JLCPCB-Order-Guide.md` (ordering runbook) · `harness-connector-pinout.md` + `Socket-Pinout-Silkscreen.md` · **`EinarBoard-Manual/`** (Rev 1.1 order-prep pack: `einarboard-manual.tex` → branded PDF · `helgen_einarboard_1.0_production_bom.xlsx` · `tools/generate_production_bom.py` + `tools/sync_bom.py` Excel→LaTeX BOM sync) — plus repo-root `scripts/prep_order_release.sh` (safe cleanup + release commit) | | `04-Source-Code` | firmware + backend repos | `firmware/` (**own git repo `hbox-firmware`**: `blackpillrtkcode_v2/` deploy · `legacy/` v1 · `docs/LOGGING-SPEC.md` v2.1) · `htracker/` · `notifications/` · `rtk-config/` | | `05-Analytics-Reports` | SQL views, dashboards (VERONICA/PowerBI), **observability** | `2026-06-22_Drogheda_Manual-Logs-Grafana_v1.0.pdf` (Grafana/Loki log-consultation manual) | | `06-Testing-Validation` | RCA, diagnostics, test evidence, **log analysis & tooling** | `RCA-2026-06-field-failures.md` · `remote-diagnostic-protocol.md` · `2026-06-20_Drogheda_Bench-Log-Analysis_v1.0.md` (rev-3) · `2026-06-20_Drogheda_GNSS-Findings-Summary.md` · `log-analysis/` (repo **`hbox-log-tools`**: `log-explorer.html` · `analyze_logs.py` · `build_dashboard.py` · `docs/manual.pdf`) |