From c3af7afd9c0c1d1ed13ddfdf66054ed8681f5676 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Leopoldo=20Rodr=C3=ADguez?= Date: Thu, 3 Sep 2026 16:50:09 +0000 Subject: [PATCH] v6 cluster placement (submodule c7d2552) + Copper Plan update Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt --- ...da_v6-Copper-Plan_Placement-EMC-Guide.html | 90 +++++++++---------- 03-Architecture-Hardware/kicad | 2 +- 2 files changed, 43 insertions(+), 49 deletions(-) diff --git a/03-Architecture-Hardware/2026-09-02_Drogheda_v6-Copper-Plan_Placement-EMC-Guide.html b/03-Architecture-Hardware/2026-09-02_Drogheda_v6-Copper-Plan_Placement-EMC-Guide.html index 359ba29..a1e937c 100644 --- a/03-Architecture-Hardware/2026-09-02_Drogheda_v6-Copper-Plan_Placement-EMC-Guide.html +++ b/03-Architecture-Hardware/2026-09-02_Drogheda_v6-Copper-Plan_Placement-EMC-Guide.html @@ -64,6 +64,7 @@ a{color:var(--plane)}

Placement companion for the 140 × 100 re-layout — every capacitor's owner, what clusters together, and the EMC order of work. Cap ownership below is computed from the board netlist, not from memory.

Before placing anything: run Update PCB from Schematic once more. The NTC2 label was sitting on PA7 (TIMEPULSE) and merged the nets — it is fixed in the schematic (commit ba70f62), and the sync re-nets P18/R126/C157 to a clean /NTC2. Tick “delete footprints with no symbol” in that dialog.
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Known leftovers from the auto-clustering: ~54 small courtyard overlaps, nearly all against the legacy V5 regulator families that kept their old spots — L2/D2 (under U19's new outline), L6/DB2/DB3/Q2/Dbk1 near U25, C40, R40/R41 at Y3. Drag those few aside first and the board is clean.

§0Three laws that decide EMC at placement time

@@ -72,54 +73,47 @@ a{color:var(--plane)}
Aggressors far from victims

Four switchers, one LTE transmitter, one −167 dBm GNSS receiver on one board. Distance and an unbroken In1 ground plane are the only broadband shields you get for free.

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§1Suggested floorplan

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§1Floorplan as clustered (NW ETH · NE LTE · SW GNSS · SE power)

- - - 140 × 100 mm · connectors on the top (harness) edge · antennas leave at opposite ends - - - HARNESS EDGE — P1 24V · P2 5V bench · P4 batt · P6 fan · P12/P18 NTC · P15/P16 serial · J10 ETH · J9/J11 USB - - - POWER ENTRY - F2 Q23 D32 → U25 buck - L22 · C149–C154 - then U6 LTC4040 + RS1 - C30/31/78 · C32/33/34 + + + 140 × 100 mm · as clustered on 03-Sep (commit c7d2552) · N = top of the KiCad screen + + + NW — ETHERNET + J10 RJ45 · U11/U12 · Y1 + C90–C103 · J11 USB-DFU + + + NE — LTE ISLAND + U20 buck+L20 · VBAT bank + U19 A7670SA · K1 · shifters + J13 U.FL → NE corner - - MCU U16 - C104–C116 · Y3/Y4 - sense RCs C5/7/9/24/157 - - - ETH U11/U12 - C90–C103 · Y1 - tight to J10 - - - GNSS ISLAND - U18 F9P · U21 LDO - C119–C124 · C143/144/145 - L21 bias tee · D27 · J12 ↓ - quiet corner — no switchers - - - LTE ISLAND - U20 buck · L20 · C127–129 - U19 A7670SA - VBAT bank C130–C136 - U22 SIM · U23/24 shift - J13 → edge - - - RF islands at opposite ends · antennas ≥ 20 cm at the enclosure - - - U26 accel ≤ 10 mm from a mounting hole + + MCU U16 + crystals · VCAP · VDDA + sense RCs · U10/Y2 below + + + SW — GNSS ISLAND + U21 LDO · C119–C124 + U18 F9P · L21 bias tee + C143/144/145 · D27 · J12 → W edge + U26 accel at MH6 (SW hole) + quiet corner — no switchers + + + SE — POWER ENTRY + P1 24V · F2 Q23 D32 · 24V parts + U25 + L22 + C149–C154 + U6 LTC4040 + RS1 · fan U2 above + J9 USB · RS232 U15 just west + + + GNSS ↔ LTE on the diagonal · antennas ≥ 20 cm at the enclosure -
A proposal, not a constraint — keep the two RF islands at opposite ends and the power entry beside P1/P2, and the rest is yours to optimize.
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The clustered state after commit
c7d2552 — your anchors kept (J10, P1, U18, U16, U6, U15, K1, connectors), 160 support parts packed by family. Fine-tune freely inside each region; keep the diagonal.

§2Vehicle power entry — U25 TPS54360B hot loop

@@ -168,7 +162,7 @@ a{color:var(--plane)} C143100 nF RFDC blockinline in the 50 Ω run between L21 tap and J12 D27ESD9L (≤0.5 pF)J12at the connector, stub-less tap on the RF line -

This corner is the victim: no switcher, no inductor, no fast digital within ~25 mm; nothing but solid In1 ground under the module and the RF run. TIMEPULSE to the MCU is the one digital line that leaves — route it away from the RF path.

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This corner is the victim: no switcher, no inductor, no fast digital within ~25 mm (U25 sits ~95 mm away in the SE, the fan buck ~130 mm NE — keep it that way); nothing but solid In1 ground under the module and the RF run. TIMEPULSE to the MCU is the one digital line that leaves — route it away from the RF path.

§6MCU core — U16 analog care

@@ -206,12 +200,12 @@ a{color:var(--plane)}

§9Order of work from here

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  1. Update PCB from Schematic (NTC2 re-net), then place by §1–§8. Field connectors on one edge — every cable is an antenna, and one entry edge keeps their common-mode currents off the board.
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  2. Update PCB from Schematic (NTC2 re-net), then fine-tune inside the §1 regions. Field wiring now enters mostly along the north edge + P1 at the SE corner — keep each connector beside its block, and its TVS/filter parts right at the jack, so cable common-mode currents stay off the board core.
  3. Say the word and I re-add the four zones — F.Cu GND pour, In1 GND (unbroken, especially under both RF runs and the crystals), In2 3V3, B.Cu GND — plus a stitching-via plan: 5 mm grid around RF, via fence along the board edge.
  4. Route in this order: ① both 50 Ω RF runs (CPWG on F.Cu over In1, JLC7628 ≈ 0.35/0.25 mm — confirm in the JLC calculator and order controlled impedance) · ② the two hot loops and VBAT ≥ 3 mm · ③ /SW_BAT ≥ 2 mm + /BAT_PLUS ≥ 1.5 mm with via farms · ④ USB and ETH pairs · ⑤ sense lines · ⑥ everything else.
  5. Refill zones, full DRC, then the G2 external review checkpoint before ordering.
  6. Bench items carried forward: measure U21's 3V3_GNSS rise (F9P ramp window), verify U25's EP against the TI DDA drawing, and the DzG1 jumper check on the fabbed v5.5 boards.
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EinarBoard HBOX v6 · Helgen · generated 02-Sep-2026 from the live netlist (commit ba70f62).

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EinarBoard HBOX v6 · Helgen · updated 03-Sep-2026 to the clustered layout (commits ba70f62 · c7d2552).

diff --git a/03-Architecture-Hardware/kicad b/03-Architecture-Hardware/kicad index ba70f62..c7d2552 160000 --- a/03-Architecture-Hardware/kicad +++ b/03-Architecture-Hardware/kicad @@ -1 +1 @@ -Subproject commit ba70f62b5e26577c1572912ffdbbb52b0f74093f +Subproject commit c7d25524a7f6ec2a579be615140f45c2ac064bc3