1.1 Phase C8: outer GND pours + silkscreen tidy

- GND_POUR_FCU / GND_POUR_BCU zones added (full board, params mirror In2 plane:
  clearance 0.3, min 0.25, thermals 0.5/0.5); unfilled — press B in pcbnew
- 164 reference designators re-placed at consistent spots (above-center preferred,
  below/left/right fallback), collision-checked vs pads/courtyards/vias/texts/edge;
  fonts normalized to 1.0mm/0.15
- 3 orphaned MOD1 pin labels (3V3/SW5V/GND) re-homed to the module's new position
- verified: copper untouched (census 0 opens, clearance clean), non-silk content
  byte-identical
This commit is contained in:
Leopoldo Rodríguez 2026-07-30 08:48:07 +00:00
parent c235016447
commit e3c566a663

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