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Project resources registered +[2026-06-23 21:09:02,118] [INFO] Registering board resources +[2026-06-23 21:09:02,118] [INFO] Board resources registered +[2026-06-23 21:09:02,118] [INFO] Registering component resources +[2026-06-23 21:09:02,118] [INFO] Component resources registered +[2026-06-23 21:09:02,119] [INFO] Registering library resources +[2026-06-23 21:09:02,119] [INFO] Library resources registered +[2026-06-23 21:09:02,119] [INFO] Registering component prompts +[2026-06-23 21:09:02,119] [INFO] Component prompts registered +[2026-06-23 21:09:02,119] [INFO] Registering routing prompts +[2026-06-23 21:09:02,119] [INFO] Routing prompts registered +[2026-06-23 21:09:02,119] [INFO] Registering design prompts +[2026-06-23 21:09:02,120] [INFO] Design prompts registered +[2026-06-23 21:09:02,120] [INFO] Registering footprint prompts +[2026-06-23 21:09:02,120] [INFO] All KiCAD tools, resources, and prompts registered +[2026-06-23 21:09:02,120] [INFO] Starting KiCAD MCP server... +[2026-06-23 21:09:02,120] [INFO] Starting Python process with script: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/python/kicad_interface.py +[2026-06-23 21:09:02,120] [INFO] Found virtual environment Python at: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/venv/bin/python +[2026-06-23 21:09:02,120] [INFO] Using Python executable: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/venv/bin/python +[2026-06-23 21:09:02,120] [INFO] Validating pcbnew module access... +[2026-06-23 21:09:02,948] [INFO] ✓ pcbnew module validated successfully +[2026-06-23 21:09:02,949] [INFO] Waiting for Python process to be ready... +[2026-06-23 21:09:06,709] [INFO] Python process READY — stdin loop is live +[2026-06-23 21:09:06,711] [INFO] Python process is ready. +[2026-06-23 21:09:06,711] [INFO] Connecting MCP server to STDIO transport... +[2026-06-23 21:09:06,711] [INFO] Successfully connected to STDIO transport +[2026-06-23 21:09:06,866] [INFO] Sending warm-up command (background)... +2026-06-24T03:09:06.881Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":0,"result":{"protocolVersion":"2025-11-25","capabilities":{"tools":{"listChanged":true},"resources":{"listChanged":true},"prompts":{"listChanged":true}},"serverInfo":{"name":"kicad-mcp-server","version":"1.0.0","description":"MCP server for KiCAD PCB design operations"}}} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"notifications/initialized","jsonrpc":"2.0"} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"tools/list","params":{},"jsonrpc":"2.0","id":1} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"prompts/list","params":{},"jsonrpc":"2.0","id":2} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"resources/list","params":{},"jsonrpc":"2.0","id":3} { metadata: undefined } +2026-06-24T03:09:06.913Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":1,"result":{"tools":[{"name":"list_tool_categories","description":"List all available KiCAD tool categories with their descriptions and tool counts. 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metadata: undefined } +2026-06-24T03:09:06.913Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":3,"result":{"resources":[{"uri":"kicad://project/info","name":"project_info"},{"uri":"kicad://project/properties","name":"project_properties"},{"uri":"kicad://project/files","name":"project_files"},{"uri":"kicad://project/status","name":"project_status"},{"uri":"kicad://project/summary","name":"project_summary"},{"uri":"kicad://board/info","name":"board_info"},{"uri":"kicad://board/layers","name":"layer_list"},{"uri":"kicad://board/statistics","name":"board_statistics"},{"uri":"kicad://components","name":"component_list"},{"uri":"kicad://components/placement","name":"component_placement"},{"uri":"kicad://components/groups","name":"component_groups"},{"uri":"kicad://libraries","name":"library_list"},{"uri":"kicad://board/extents/mm","name":"Millimeters"},{"uri":"kicad://board/extents/inch","name":"Inches"},{"uri":"kicad://board/2d-view/png","name":"PNG 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{"method":"tools/call","params":{"name":"check_kicad_ui","arguments":{}},"jsonrpc":"2.0","id":4} { metadata: undefined } +[2026-06-23 21:09:31,979] [INFO] Checking KiCAD UI status +2026-06-24T03:09:32.118Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":4,"result":{"content":[{"type":"text","text":"{\n \"success\": true,\n \"running\": true,\n \"processes\": [\n {\n \"pid\": \"98622\",\n \"name\": \"/Applications/KiCad/KiCad.app/Contents/MacOS/kicad\",\n \"command\": \"/Applications/KiCad/KiCad.app/Contents/MacOS/kicad\"\n }\n ],\n \"message\": \"KiCAD is running\",\n \"backend\": \"swig\",\n \"realtime_sync\": false,\n \"ipc_connected\": false,\n \"_backend\": \"swig\",\n \"_realtime\": false\n}"}]}} { metadata: undefined } diff --git a/03-Architecture-Hardware/kicad/snapshots/kicad_snapshot_step1_schematic_erc_clean_after_J1_fix_20260623_234213/.history b/03-Architecture-Hardware/kicad/snapshots/kicad_snapshot_step1_schematic_erc_clean_after_J1_fix_20260623_234213/.history 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(layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting + (front yes) + (back yes) + ) + (covering + (front no) + (back no) + ) + (plugging + (front no) + (back no) + ) + (capping no) + (filling no) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + 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'/var/run/com.apple.security.cryptexd/codex.system/bootstrap/usr/bin', + '/var/run/com.apple.security.cryptexd/codex.system/bootstrap/usr/appleinternal/bin', + '/Users/leo/.pub-cache/bin', + '/Users/leo/.local/bin', + [length]: 17 + ] + } +} %o +2026-06-24T03:08:57.859Z [kicad] [info] Server started and connected successfully { metadata: undefined } +2026-06-24T03:08:59.453Z [kicad] [info] Message from client: {"method":"initialize","params":{"protocolVersion":"2025-11-25","capabilities":{"extensions":{"io.modelcontextprotocol/ui":{"mimeTypes":["text/html;profile=mcp-app"]}}},"clientInfo":{"name":"claude-ai","version":"0.1.0"}},"jsonrpc":"2.0","id":0} { metadata: undefined } +[2026-06-23 21:09:02,095] [INFO] Using STDIO transport for local communication +[2026-06-23 21:09:02,104] [INFO] Registering KiCAD tools, resources, and prompts... +[2026-06-23 21:09:02,104] [INFO] Registering router tools +[2026-06-23 21:09:02,105] [INFO] Router tools registered successfully +[2026-06-23 21:09:02,105] [INFO] Registering board management tools +[2026-06-23 21:09:02,106] [INFO] Board management tools registered +[2026-06-23 21:09:02,106] [INFO] Registering component management tools +[2026-06-23 21:09:02,107] [INFO] Component management tools registered +[2026-06-23 21:09:02,109] [INFO] Registering design rule tools +[2026-06-23 21:09:02,110] [INFO] Design rule tools registered +[2026-06-23 21:09:02,110] [INFO] Registering export tools +[2026-06-23 21:09:02,112] [INFO] Export tools registered +[2026-06-23 21:09:02,117] [INFO] UI management tools registered +[2026-06-23 21:09:02,118] [INFO] Registering project resources +[2026-06-23 21:09:02,118] [INFO] Project resources registered +[2026-06-23 21:09:02,118] [INFO] Registering board resources +[2026-06-23 21:09:02,118] [INFO] Board resources registered +[2026-06-23 21:09:02,118] [INFO] Registering component resources +[2026-06-23 21:09:02,118] [INFO] Component resources registered +[2026-06-23 21:09:02,119] [INFO] Registering library resources +[2026-06-23 21:09:02,119] [INFO] Library resources registered +[2026-06-23 21:09:02,119] [INFO] Registering component prompts +[2026-06-23 21:09:02,119] [INFO] Component prompts registered +[2026-06-23 21:09:02,119] [INFO] Registering routing prompts +[2026-06-23 21:09:02,119] [INFO] Routing prompts registered +[2026-06-23 21:09:02,119] [INFO] Registering design prompts +[2026-06-23 21:09:02,120] [INFO] Design prompts registered +[2026-06-23 21:09:02,120] [INFO] Registering footprint prompts +[2026-06-23 21:09:02,120] [INFO] All KiCAD tools, resources, and prompts registered +[2026-06-23 21:09:02,120] [INFO] Starting KiCAD MCP server... +[2026-06-23 21:09:02,120] [INFO] Starting Python process with script: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/python/kicad_interface.py +[2026-06-23 21:09:02,120] [INFO] Found virtual environment Python at: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/venv/bin/python +[2026-06-23 21:09:02,120] [INFO] Using Python executable: /Users/leo/Documents/Claude/Projects/KiCAD-MCP-Server/venv/bin/python +[2026-06-23 21:09:02,120] [INFO] Validating pcbnew module access... +[2026-06-23 21:09:02,948] [INFO] ✓ pcbnew module validated successfully +[2026-06-23 21:09:02,949] [INFO] Waiting for Python process to be ready... +[2026-06-23 21:09:06,709] [INFO] Python process READY — stdin loop is live +[2026-06-23 21:09:06,711] [INFO] Python process is ready. +[2026-06-23 21:09:06,711] [INFO] Connecting MCP server to STDIO transport... +[2026-06-23 21:09:06,711] [INFO] Successfully connected to STDIO transport +[2026-06-23 21:09:06,866] [INFO] Sending warm-up command (background)... +2026-06-24T03:09:06.881Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":0,"result":{"protocolVersion":"2025-11-25","capabilities":{"tools":{"listChanged":true},"resources":{"listChanged":true},"prompts":{"listChanged":true}},"serverInfo":{"name":"kicad-mcp-server","version":"1.0.0","description":"MCP server for KiCAD PCB design operations"}}} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"notifications/initialized","jsonrpc":"2.0"} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"tools/list","params":{},"jsonrpc":"2.0","id":1} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"prompts/list","params":{},"jsonrpc":"2.0","id":2} { metadata: undefined } +2026-06-24T03:09:06.885Z [kicad] [info] Message from client: {"method":"resources/list","params":{},"jsonrpc":"2.0","id":3} { metadata: undefined } +2026-06-24T03:09:06.913Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":1,"result":{"tools":[{"name":"list_tool_categories","description":"List all available KiCAD tool categories with their descriptions and tool counts. Use this to discover which tools are available via the router.","inputSchema":{"$sche...[170002 chars truncated]...,"inputSchema":{"type":"object","properties":{"freeroutingJar":{"type":"string","description":"Path to freerouting.jar to check"}},"additionalProperties":false,"$schema":"http://json-schema.org/draft-07/schema#"},"execution":{"taskSupport":"forbidden"}}]}} { metadata: undefined } +2026-06-24T03:09:06.913Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":2,"result":{"prompts":[{"name":"component_selection","arguments":[{"name":"requirements","description":"Description of the circuit requirements and constraints","required":true}]},{"name":"component_placement_strategy","arguments":[{"...[3571 chars truncated]...uired":true},{"name":"libraryPath","description":"Target .pretty library path (optional)","required":false}]},{"name":"footprint_ipc_checklist","arguments":[{"name":"footprintPath","description":"Path to the .kicad_mod file to review","required":true}]}]}} { metadata: undefined } +2026-06-24T03:09:06.913Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":3,"result":{"resources":[{"uri":"kicad://project/info","name":"project_info"},{"uri":"kicad://project/properties","name":"project_properties"},{"uri":"kicad://project/files","name":"project_files"},{"uri":"kicad://project/status","name":"project_status"},{"uri":"kicad://project/summary","name":"project_summary"},{"uri":"kicad://board/info","name":"board_info"},{"uri":"kicad://board/layers","name":"layer_list"},{"uri":"kicad://board/statistics","name":"board_statistics"},{"uri":"kicad://components","name":"component_list"},{"uri":"kicad://components/placement","name":"component_placement"},{"uri":"kicad://components/groups","name":"component_groups"},{"uri":"kicad://libraries","name":"library_list"},{"uri":"kicad://board/extents/mm","name":"Millimeters"},{"uri":"kicad://board/extents/inch","name":"Inches"},{"uri":"kicad://board/2d-view/png","name":"PNG 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{"method":"tools/call","params":{"name":"check_kicad_ui","arguments":{}},"jsonrpc":"2.0","id":4} { metadata: undefined } +[2026-06-23 21:09:31,979] [INFO] Checking KiCAD UI status +2026-06-24T03:09:32.118Z [kicad] [info] Message from server: {"jsonrpc":"2.0","id":4,"result":{"content":[{"type":"text","text":"{\n \"success\": true,\n \"running\": true,\n \"processes\": [\n {\n \"pid\": \"98622\",\n \"name\": \"/Applications/KiCad/KiCad.app/Contents/MacOS/kicad\",\n \"command\": \"/Applications/KiCad/KiCad.app/Contents/MacOS/kicad\"\n }\n ],\n \"message\": \"KiCAD is running\",\n \"backend\": \"swig\",\n \"realtime_sync\": false,\n \"ipc_connected\": false,\n \"_backend\": \"swig\",\n \"_realtime\": false\n}"}]}} { metadata: undefined } diff --git a/03-Architecture-Hardware/kicad/snapshots/kicad_snapshot_step1_schematic_erc_clean_after_J1_fix_20260623_234213/~hbox-watchdog-v3.kicad_pro.lck b/03-Architecture-Hardware/kicad/snapshots/kicad_snapshot_step1_schematic_erc_clean_after_J1_fix_20260623_234213/~hbox-watchdog-v3.kicad_pro.lck new file mode 100644 index 0000000..41087b6 --- /dev/null +++ b/03-Architecture-Hardware/kicad/snapshots/kicad_snapshot_step1_schematic_erc_clean_after_J1_fix_20260623_234213/~hbox-watchdog-v3.kicad_pro.lck @@ -0,0 +1 @@ +{"hostname":"Leopoldos-MacBook-Pro","username":"leo"} \ No newline at end of file diff --git a/03-Architecture-Hardware/kicad/~hbox-watchdog-v3.kicad_pro.lck b/03-Architecture-Hardware/kicad/~hbox-watchdog-v3.kicad_pro.lck new file mode 100644 index 0000000..41087b6 --- /dev/null +++ b/03-Architecture-Hardware/kicad/~hbox-watchdog-v3.kicad_pro.lck @@ -0,0 +1 @@ +{"hostname":"Leopoldos-MacBook-Pro","username":"leo"} \ No newline at end of file diff --git a/03-Architecture-Hardware/watchdog-connections-rationale.md b/03-Architecture-Hardware/watchdog-connections-rationale.md new file mode 100644 index 0000000..8f15db9 --- /dev/null +++ b/03-Architecture-Hardware/watchdog-connections-rationale.md @@ -0,0 +1,228 @@ +--- +tags: [project-drogheda, hardware, watchdog, connections, review, firmware, verification] +project: Project Drogheda +author: Helgen CTO +date: 2026-06-22 +status: Review — read before populating the protoboard or releasing Gerbers +reviews: watchdog-connections.xlsx (128-row from→to list) +against: blackpillrtkcode_v2.ino v2.2 · watchdog-pcb-v3-design.md +--- + +# Watchdog Connection List — Justification & Firmware Cross‑Check + +> Every connection in [[03-Architecture-Hardware/watchdog-connections|`watchdog-connections.xlsx`]] +> justified — **where it goes, how it's wired, why** — and checked **against the actual +> firmware** (`blackpillrtkcode_v2.ino` v2.2). This pass found **3 issues to fix before fab** +> (one is a part‑rating error) and confirms the rest match the code. Read §5 first if you're +> short on time. + +--- + +## 1. Method + +Three sources had to agree: the **connection list** (the wires), the **firmware** (what each +pin actually does), and the **design doc** (the intent + values). I walked every Blackpill +pin in the firmware, found its net in the connection list, and confirmed the sub‑circuit on +the other end does what the code assumes. Discrepancies are called out as **findings (§5)**. + +Legend: ✅ wired *and* used by firmware today · 🟡 wired, **firmware pending** (v3 thermal, +spec'd in design §7 but not yet coded) · ⚪ system/spare · 🔴 issue to fix. + +--- + +## 2. Firmware ↔ connection cross‑check (the core table) + +| Blackpill pin | Firmware v2.2 (`#define` / use) | Connects to (list) | Status | Match | +|---|---|---|---|---| +| PA0 | `PIN_BAT_SENSE` → `analogRead`×`DIVIDER_RATIO 2.0` | R5(10k)→BAT+, R6(10k)→GND, C5 | ✅ | ÷2 matches the ×2 in code | +| PA4 | `PIN_5V_SENSE` → `analogRead`×2.0; `V5V_ON 4.2/OFF 3.8` | R7(10k)→MAIN5V, R8(10k)→GND, C7 | ✅ | ÷2 correct; **see Finding 3 (tap point)** | +| PA5 | `PIN_IGN_SENSE` → `digitalRead`, `INPUT_PULLDOWN` | R9/R10(÷2) from DFR1015, D5 clamp, C9 | ✅ | digital — **see Finding 2 (level)** | +| PA1 | `PIN_PWR_CTRL` → `OUTPUT`, HIGH=stack ON | R1(1k)→Q5 base → Q1 P‑FET | ✅ | HIGH→NPN→gate low→P‑FET on ✓ | +| PA2 | `GNSS` TX (USART2); floated on power‑off | P3.3 → simpleRTK2B UART1 RX | ✅ | TX→RX ✓ | +| PA3 | `GNSS` RX (USART2); floated on power‑off | P3.4 ← simpleRTK2B UART1 TX | ✅ | RX←TX ✓ | +| PB0 | `PIN_EXT_LED` → `OUTPUT` (HIGH=on) | Q4 gate; Rled(10k)→GND; D1+R3 | ✅ | active‑high via N‑MOS ✓ | +| PC13 | `PIN_LED` → `OUTPUT`, active‑LOW (`!ext`) | onboard (internal) | ✅ | mirrors PB0 inverted ✓ | +| PA6 | — (not in firmware) | Rg→Q2 fan gate (PWM) | 🟡 | wired per design §7; **code pending** | +| PB10 | — | fan tach → EXTI | 🟡 | code pending | +| PB6 | — | I²C1 SCL → SHT40+TMP102 | 🟡 | code pending | +| PB7 | — | I²C1 SDA → SHT40+TMP102 | 🟡 | code pending | +| PA7 | — | NC (TIM3_CH2 spare) | ⚪ | reserved 2nd fan | +| PB12 | — | NC (EXTI spare) | ⚪ | reserved 2nd tach | +| PA9 | `RELAY` TX *iff* `ENABLE_PHLG_RELAY` (default **0**) | H3.1 (DNP) → modem DIN | ⚪ | off in v3 ✓ | +| PA10 | `RELAY` RX *iff* relay flag | H3.2 (DNP) ← F9P UART2 TX; Rdfu 22k→3V3 | ⚪ | off in v3; 22k = DFU‑safe ✓ | +| PA13/PA14 | SWD (core) | H1.2 / H1.3 | ⚪ | debug | +| PA11/PA12 | USB CDC (`Serial` = STREAM log) | micro‑USB | ✅ | log + flash | +| PC14/PC15, PB2, BOOT0, NRST | boot/clock/reset | PB2→GND, BOOT0 button→3V3 | ⚪ | **Finding 2b** (BOOT pins) | + +**No pin is double‑assigned**, and no ADC/timer/UART peripheral collides: PA0/PA4 = ADC1, +PA2/PA3 = USART2, PA6 = TIM3_CH1 (PB0 is TIM3_CH3 but used as plain GPIO so no PWM clash), +PB6/PB7 = I²C1, PB10/PB12 = EXTI, PA9/PA10 = USART1. ✅ + +--- + +## 3. Sub‑circuit justifications (where it goes, how, why) + +### 3.1 Power input — 24 V → rev‑pol → TVS → fan buck +- **P1 (GX16‑5)** brings the cabinet's **clean, regulated 24 V** + GND + isolated ignition. + Keyed/locking because the #1 field failure was vibration on Dupont. The cabinet already has + the SPD + breaker, so the board only needs **reverse‑polarity + a modest TVS** — not a full + protection front‑end. +- **Q10** sits in the 24 V high side as a reverse‑polarity gate: source to the load (24 V + rail), drain to the input, **gate to GND** so a correctly‑polarised input turns it fully on + (low drop) and a reversed input leaves it off. **🔴 This is where Finding 1 lives — the part + rating is wrong for 24 V.** +- **D10 (TVS)** clamps residual transients 24 V→GND; **C10 (100 µF)** is the input reservoir. +- **U2 (MP1584)** bucks the protected 24 V to **5V_FAN** — a *dedicated* rail so the fan's + inrush never sags the 5 V the modem bursts on (design §0a). **R20/R21** set 5.0 V. + **JP1** can bridge 5V_FAN↔MAIN5V but stays **open** by default. + +### 3.2 The 5 V rails + RTK‑stack load switch +- **MAIN 5 V** enters at **P2** from the external Mean Well **SD‑15B‑05**. It powers the + Blackpill's 5 V pin (→ onboard LDO → 3V3) and the load switch. +- **Load switch (PA1‑driven):** `setPower(true)` drives **PA1 HIGH** → **R1(1k)** into the + **Q5 (NPN)** base → Q5 conducts → pulls the **Q1 (P‑MOSFET)** gate toward GND → Vgs negative + → Q1 **on** → **SW_5V** feeds the simpleRTK2B + 4G stack via **P3**. PA1 LOW → **R2(10k)** + holds the gate at MAIN5V → Q1 **off**. This gives the firmware‑critical property: **stack + OFF at boot/reset** (the gate pull‑up defines the off state before the MCU asserts) — the + whole fail‑safe doctrine depends on it. **F1 (PPTC)** adds self‑resetting overcurrent (never + black‑holes a healthy unit); **C3 (47 µF)** rides out LTE bursts on SW_5V. +- **Why PA2/PA3 float on power‑off:** `setPower(false)` sets them to `INPUT` so the MCU can't + back‑power the switched rail through a GPIO while the stack is down — the connection (PA2/3 + → P3 UART) is correct precisely because the firmware manages this. + +### 3.3 Sense dividers — PA0, PA4, PA5 +- **PA0 battery (✅):** `vBat = analogRead/4095 · 3.3 · 2.0`. The **10k/10k ÷2** is exactly the + `DIVIDER_RATIO 2.0` the code multiplies back, so 3.4–4.2 V → 1.7–2.1 V at the pin (no + clipping). Drives `BAT_CRITICAL 3.40 / BAT_RECOVERY 3.70` (sleep/wake). +- **PA4 5 V / vehicle‑present (✅, but Finding 3):** same ÷2; `v5v` compared to `V5V_ON 4.2 / + V5V_OFF 3.8`. The catch is **what node it taps** — it must be the *vehicle‑side* 5 V (the + SD‑15B‑05 output, which disappears when the machine is off), not a battery‑backed rail. +- **PA5 ignition (✅, but Finding 2):** firmware does `digitalRead(PA5)==HIGH` with + `INPUT_PULLDOWN`. So the chain only has to land a clean **logic HIGH** when ignition is on — + and the ÷2 may pull it too low (Finding 2). D5 clamps PA5 ≤3V3; C9 debounces with the + firmware's 750 ms. + +### 3.4 Fan driver + tach (🟡 firmware pending) +- **PA6 → Rg(100R) → Q2 gate**, **Q2 (logic‑level N‑MOS)** low‑side: drain = Fan(−) at **P6.2**, + source = GND. **Rgs(100k)** gate→GND = **fan OFF until the MCU drives PWM** (fail‑safe, and + it means an un‑programmed board can't spin the fan). **D2** flyback across the fan (K→5V_FAN, + A→Fan(−)) catches the inductive kick at PWM turn‑off. +- **Tach:** open‑collector fan tach → **Rtp(10k) pull‑up to 3V3** + **Rts(1k)** series → **PB10** + (EXTI). Because PWM is on the **ground leg**, the tach is only valid while PWM is high — the + (pending) firmware must read RPM in a brief 100 % window (design §7.4). +- **Status today:** the v2.2 firmware does **not** drive PA6 or read PB10. So a freshly‑flashed + board is electrically correct but **the fan won't move and tach won't read until the fan/temp + code lands** (design §7). That's intended sequencing, not a wiring error — see Finding 4. + +### 3.5 Temperature / humidity (🟡 firmware pending) +- **PB6/PB7 = I²C1** to **U3 SHT40 (0x44)** and **U4 TMP102 (0x48, ADD0→GND)**, **R30/R31 + (4.7k)** pull‑ups to 3V3. Two different addresses → one bus, no clash. U4 rides a **P5 + pigtail** to the battery/modem hot spot (the actual heat casualty). Same status as §3.4: + wired, code pending. + +### 3.6 Status LED — PB0 / PC13 +- Firmware drives **PB0 HIGH = LED on** through **Q4** (N‑MOS low‑side; LED + R3 from 3V3 to + Q4 drain), with **Rled(10k)** holding the gate off at boot. **PC13** (onboard) mirrors it + **inverted** (`digitalWrite(PIN_LED, !ext)`) because it's active‑LOW. The proto simplification + (PB0 →330Ω→ LED →GND) keeps the **same HIGH=on polarity** — consistent with the code. + +### 3.7 Reserved relay + debug/boot +- **PA9/PA10 (H3, DNP):** only touched if `ENABLE_PHLG_RELAY=1`; default 0, so the default + build ignores them. **Rdfu 22k on PA10→3V3** keeps DFU flashing reliable (PA10 is a + bootloader‑sensitive pin) and is harmless on USART1 RX (idle‑high). **H1** = SWD. **BOOT0** + button→3V3 = DFU; **PB2 (BOOT1)→GND** = boot‑from‑flash — see Finding 2b. + +--- + +## 4. What I checked against the code, line‑for‑line + +- `analogRead(PIN_BAT_SENSE/PIN_5V_SENSE) … · DIVIDER_RATIO 2.0` ⇄ both dividers are 10k/10k + (÷2). **Consistent.** +- `digitalRead(PIN_IGN_SENSE)` + `INPUT_PULLDOWN` ⇄ PA5 is a **digital** input → the divider + must deliver a solid HIGH (Finding 2), and the internal ~40 k pulldown sits in parallel with + R10. +- `digitalWrite(PIN_PWR_CTRL,HIGH)=on` ⇄ NPN→P‑FET gate‑pull‑down topology gives HIGH=on, **OFF + at reset.** **Consistent.** +- `setPower(false)` floats PA2/PA3 ⇄ UART pins go to the F9P only (no rail back‑feed). + **Consistent.** +- `PIN_EXT_LED` active‑high / `PIN_LED` active‑low ⇄ Q4 low‑side + onboard inverted. + **Consistent.** +- `ENABLE_PHLG_RELAY` default 0 ⇄ PA9/PA10 are DNP. **Consistent.** +- No firmware references to PA6/PA7/PB6/PB7/PB10/PB12 (grep = 0) ⇄ those are 🟡 pending. + **Consistent with "design ahead of code, by intent."** + +--- + +## 5. Review findings — ✅ ALL CORRECTED 2026‑06‑22 + +> **Resolution summary** (applied across the design doc, BOM, connection list, and firmware): +> **F1** — Q10 → a **−40 V/±20 V P‑FET** (IRFR5305; proto IRF9540) **+ a 15 V gate‑source +> Zener (DzG)** + Rrp, so Vgs stays in rating. **F2** — ignition **÷2 removed**; the DFR1015 +> logic level now reaches PA5 direct (Rig + clamp) → solid HIGH. **F3** — **battery resolved: +> dropped (vehicle‑only)**; PA4 senses the vehicle‑side 5 V and the list is correct as‑is +> (LiFePO4/supercap + moved sense‑tap documented if parked tracking is later required). +> **F4** — the fan/temp firmware is now **implemented in v2.3** (closed‑loop fan + I²C SHT40/ +> TMP102 + tach fault, MCU‑temp fallback). **F2b** — boot pins verified. Detail below is the *why*. + +### Original findings (retained for the record — now corrected) + +### 🔴 Finding 1 — Reverse‑polarity FET (Q10) is over‑stressed on 24 V *(blocking)* +With source at the 24 V rail and gate at GND, **Vgs ≈ −24 V**. **AO3401A is rated ±12 V Vgs** +(and −30 V Vds) — **it will be destroyed.** The design's alternate **SI2305 is −20 V Vds — +also unsuitable** for a 24 V rail with transients. +**Fix:** pick a P‑FET rated **Vds ≥ −40 V and Vgs ≥ ±20 V** (e.g., DMP3017SFG‑class), **and add +a gate→source Zener clamp (~15 V) with the existing series resistor** so Vgs can never exceed +the rating. Update Q10 in the BOM + the connection list (add `DzG` Zener: A→Q10.G, K→Q10.S). + +### 🔴 Finding 2 — Ignition sense (PA5) may never read HIGH *(blocking if DFR1015 ≤ 3.3 V)* +PA5 is a **digital** input. The DFR1015 conditions 24 V→logic, then the **÷2** halves it again; +the **internal pulldown (~40 k ∥ R10 10 k ≈ 8 k)** shifts the ratio to ≈0.44. If the DFR1015 +outputs **3.3 V**, PA5 sees **≈1.4 V — below VIH**, and `ignitionOn` stays false (breaking the +1 Hz/30 s rate switch *and* the brownout exit). +**Fix (pick one):** (a) set DFR1015 to **~5 V** and keep the ÷2 (PA5 ≈ 2.2 V, solid HIGH); or +(b) **drop R9/R10** and feed the DFR1015 output **directly** to PA5 through the 100 Ω series + +D5 clamp (cleanest if DFR1015 ≤ 3.3 V). Confirm the measured DFR1015 output on the bench. + +### 🔴 Finding 3 — `5V_SENSE` (PA4) must tap the *vehicle* side, and depends on the battery call +"Vehicle‑power present" only works if PA4 senses a node that **drops when the machine is off** +— i.e. the **SD‑15B‑05 output**, *before* any battery hold‑up. The connection list assumes +the **battery is dropped** (MAIN5V = SD‑15B‑05 powers the MCU directly; PA4 senses MAIN5V; P4 +is sense‑only). **If the 18650/PowerBoost is kept**, the MCU runs off the battery‑backed rail +and **PA4 must instead tap the SD‑15B‑05/P2 node** (not the backed rail) — otherwise `v5v` +reads ~5 V forever, `vehiclePower` never clears, and the cell drains. +**Action:** close the **battery decision** (design §6.1). Drop‑battery → list is correct as‑is. +Keep‑battery → add the PowerBoost between P2 and MAIN5V and move the PA4 tap to the vehicle side. + +### 🟡 Finding 4 — Thermal pins are wired ahead of the firmware *(expected, track it)* +PA6 (fan), PB10 (tach), PB6/PB7 (I²C) are in the list per design §7 but **not in v2.2**. A +flashed board is correct but **inert on cooling** until the fan‑curve + I²C‑temp code is added +(after the bench bring‑up). Don't be surprised when the fan doesn't spin on first power‑up. +**Action:** implement design §7 (I'll do it once you confirm the temp sensor you bought). + +### 🟡 Finding 2b — Boot pins (housekeeping) +Confirm **PB2 (BOOT1) → GND** and **BOOT0** only high via its button — a stray pull‑up on +either makes flashing flaky (matches the DFU notes). The list already shows PB2→GND and the +**22 k on PA10**; just verify on the board. + +### ✅ Everything else +Load switch logic, both ADC dividers, the float‑on‑power‑off, LED polarity, the relay being +default‑off, and the I²C addressing all **match the firmware**. No pin conflicts. + +--- + +## 6. Verdict + +The connection list is **sound and matches the code** for the watchdog core (sensing, load +switch, LED, UART, power‑off behaviour). **All review findings are now corrected (§5)** — the +Q10 FET rating + 15 V gate Zener, the ignition direct‑feed, the battery decision (dropped / +vehicle‑only with PA4 on the vehicle side), and the **v2.3 fan/temp firmware**. The design doc, +BOM, connection list, and firmware are consistent and **Gerber‑ready**. For the **breadboard +bring‑up**, none of this changes the bench steps: use a bench supply (correct polarity, so +Q10/D10 are skipped anyway), confirm the ignition logic level with a meter, and the watchdog — +now including the smart‑fan loop — comes up exactly as the firmware expects. + +## Related +- [[03-Architecture-Hardware/watchdog-connections|connection list (xlsx)]] · + [[03-Architecture-Hardware/watchdog-pcb-v3-design|v3 design (sub‑circuits)]] · + [[03-Architecture-Hardware/watchdog-protoboard-bringup|protoboard bring‑up]] · + `04-Source-Code/firmware/blackpillrtkcode_v2/blackpillrtkcode_v2.ino` (v2.2) diff --git a/03-Architecture-Hardware/watchdog-connections.xlsx b/03-Architecture-Hardware/watchdog-connections.xlsx index aab7f8f72fc4a8e1c693f21c4812efbe5f0b40f0..59d90dd024379dcabc0184166ece3c7980f73648 100644 GIT binary patch delta 16411 zcmZv@1y~%-(l(5{OK^7y9^BnsgS!L^4gm&t*Tvo4-7UBiB)D535Zr$9oLA0y|8Mr1 zo!u_!yQ{jouj%fpuK*8<2S-+xgM`8YgM)(uyFvUBkIV=pirDwFph?_i_NV*oQZ|;B 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--- a/03-Architecture-Hardware/watchdog-health-telemetry.md +++ b/03-Architecture-Hardware/watchdog-health-telemetry.md @@ -105,8 +105,8 @@ Key facts (confirmed in firmware + the 20-Jun bench analysis): talker** instead — `$PHLG` (`P` = proprietary, `HLG` = Helgen): ```text -$PHLG,,,,,,,,,,,,,,*CS -e.g. $PHLG,2.2,RUN,DEGR,1,12,34192,3.96,5.01,58,69,0,0,180,POR*11 +$PHLG,,,,,,,,,,,,,,,,,,,,*CS +e.g. $PHLG,2.3,RUN,OK,4,14,9001,3.96,5.01,58,69,0,0,180,POR,25,50,25,0,0,0*03 (checksum is the standard NMEA XOR over the chars between $ and *, computed at runtime by buildPHLG(); -127 in tc/tmax = "n/a". The earlier *4F here was a wrong hand-written placeholder — the correct XOR for that body is *49.) @@ -141,7 +141,8 @@ def _nmea_ok(s: str) -> bool: return f"{x:02X}" == cs.strip()[:2].upper() PHLG_FIELDS = ("fw","state","link","fix","sat","rx","vbat","v5v", - "tc","tmax","rec","limp","nmea_age_ms","reset") + "tc","tmax","rec","limp","nmea_age_ms","reset", + "tair","rh","tbat","fan_rpm","fan_pwm","fan_fault") # v2.3 def handle_phlg(line: str, cell_id: str, store: dict) -> bool: if not line.startswith('$PHLG,') or not _nmea_ok(line): diff --git a/03-Architecture-Hardware/watchdog-pcb-v3-bom.xlsx b/03-Architecture-Hardware/watchdog-pcb-v3-bom.xlsx index 05afc703b9ab83da201ccbb085f88657770a0bbd..1bada122886152a80fa5a0d28ee73f818af24144 100644 GIT binary patch delta 13030 zcmZvDbyOWqlQ+)A-QC?axVyU(+%N8OaR~03Ai+JjyIXJw?(Xied7eFIzjyb1{ZCi* zRP{_vO;?@%_0()Mctk8Xl8QVe6ebt|006s3SgJ+h0*CzD*Gq!WL;On+Lh(ZWOK8Jl zLjOY~0}&ZOt1i1OjsC*M`LpUf>b0_{q-D&jWg~S!u4JVmtEBSV;-;e}TXWTX>&N|5 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zX6ZQ}3t@+!(T6XctgK!T+{`feYZemDn4&x(Zi81F?My|_1SEM3TM1t7)YS*UR2f12 zi!jXESps(=N+IpE!plKP8HorAXyb@M{UmE6is*7LI^(N~U@icyQA+uxawbfEpvA7( zeOXrT6W(77VE>{lPV-(xSHRKBm86V3B!G1K%KevXi8mBTXNiC%WXBj5PU zls!`a<>P*n5QO4XEZeKJl-sT$Ux2G-SYbZip_3-`4C(lVwo$m_XFA#7@3M5c1OPql zaNY0gN2IFGX)oRW;prjh*GJ1@Q3I{P$Y+4&u-_d0yP&^%cL{jHv8Kx z>xAMzc-TNyS(p(x7}y@ff3HxJF@WcP79(3^>EBEU7t!wjDc}^B{5K=QN1Xp(-X<>m zFMk&2L;0I2q5FSB;mH6AKKOr%{*50b2S{K;q>>~nOJFD0NT8Gb^WZ-LIlTWc3NWxx z>VIBje=@`aOsOOpJne*9He0m+14$^TUW UUkM?;izMrQrG{}3`=^2b12Y$(SO5S3 diff --git a/03-Architecture-Hardware/watchdog-pcb-v3-design.md b/03-Architecture-Hardware/watchdog-pcb-v3-design.md index 2f5cca6..7dfe543 100644 --- a/03-Architecture-Hardware/watchdog-pcb-v3-design.md +++ b/03-Architecture-Hardware/watchdog-pcb-v3-design.md @@ -126,7 +126,43 @@ decision row above). **PA10 caveat:** PA10 is USART1-RX *and* a known Blackpill pin — a load/float here can block flash mode. Keep H3 unpopulated, or fit a **~22 kΩ pull-up on PA10 to 3V3**, so this board never inherits the flaky-flashing gremlin. -### 2a. Why there is no spare UART (the telemetry reality) +### 2a. WeAct Black Pill header pinout — what lands on J1/J2 + +The module mounts on two 1×20 headers. From the WeAct **MiniF4x1Cx V3.0** schematic +(`MiniF4x1Cx_V30 SchDoc.pdf`, headers P1/P2), the physical pin order is (pin 1 = VBAT end): + +| Pin | J1 = WeAct **P1** | carrier net | J2 = WeAct **P2** | carrier net | +|--:|---|---|---|---| +| 1 | VBAT | — | PB12 | — (spare) | +| 2 | PC13 | — (onboard LED) | PB13 | — | +| 3 | PC14 | — | PB14 | — | +| 4 | PC15 | — | PB15 | — | +| 5 | NRST | — | PA8 | — | +| 6 | PA0 | **BAT_SENSE** | PA9 | **USART1_TX** (reserve) | +| 7 | PA1 | **PWR_CTRL** | PA10 | **USART1_RX** (reserve, +Rdfu 22k) | +| 8 | PA2 | **GNSS_TX** | PA11 | — (USB) | +| 9 | PA3 | **GNSS_RX** | PA12 | — (USB) | +| 10 | PA4 | **5V_SENSE** | PA15 | — | +| 11 | PA5 | **IGN_SENSE** | PB3 | — | +| 12 | PA6 | **FAN_PWM** | PB4 | — | +| 13 | PA7 | — (spare) | PB5 | — | +| 14 | PB0 | **EXT_LED** | PB6 | **I2C_SCL** | +| 15 | PB1 | — | PB7 | **I2C_SDA** | +| 16 | PB2 | — (BOOT1, pulled low on-module) | PB8 | — | +| 17 | PB10 | **FAN_TACH** | PB9 | — | +| 18 | 3V3 | **3V3** (LDO out) | 5V | **MAIN5V** (in) | +| 19 | GND | **GND** | GND | **GND** | +| 20 | 5V | **MAIN5V** (in) | 3V3 | **3V3** (LDO out) | + +**Consequences (caught from the real pinout):** +- **SWD (PA13/PA14) is NOT on the 2×20** — it's the module's separate 4-pin SWD header. + → **H1 dropped**; flash/debug via the Blackpill **USB-C**. +- **5V pin = power IN, 3V3 pin = LDO OUT.** `MAIN5V` feeds the 5V pin; the module's 3V3 + LDO output *is* the carrier `3V3` rail (sensors + I²C/tach pull-ups). +- **BOOT1 (PB2)** is pulled low on the module — no carrier action needed. +- USB (PA11/PA12) is on the header but unused (we flash via the USB-C connector). + +### 2b. Why there is no spare UART (the telemetry reality) The simpleRTK2B **Pro** breaks out **both** F9P UARTs, but only one is free: @@ -174,9 +210,12 @@ isolated bench experiment in **§7a** — it touches no PCB. ### 4.1 24 V input protection (light — the cabinet does the heavy lifting) The cabinet already has the Phoenix SPD + breaker, so the board needs only: -- **Q10** reverse-polarity P-MOSFET in the 24 V high side (e.g., **AO3401A** if - fan+buck draw !3jVi3_~-Arw-&vCn!`zC{zkwoZd|E4?iIxts diff --git a/03-Architecture-Hardware/~$watchdog-pcb-v3-bom.xlsx b/03-Architecture-Hardware/~$watchdog-pcb-v3-bom.xlsx deleted file mode 100644 index bb7c09c662dca4fd8bc9e5c39ef724bbd842ae4d..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 165 zcmbV>!3jVi3_~-Arw-&vCn!`zC{zkwoZd|E4?iIxts diff --git a/CLAUDE.md b/CLAUDE.md index b652d71..8d241be 100644 --- a/CLAUDE.md +++ b/CLAUDE.md @@ -130,7 +130,7 @@ these before presenting; if it breaks one, say so and propose the compliant fix. | `00-Project-Management` | plan, ethos, hackathon, **financials**, **handover**, client comms, Drive tooling | [[00-Project-Management/PLAN\|PLAN]] · [[00-Project-Management/Engineering-Handover\|Engineering-Handover]] · `ethos.md` · `hackathon-plan.md` · `Financials.md` · `Drive-Upload/` · `client-comms/` | | `01-Requirements` | what we build | `SRS.md` · `HBOX-product-spec.md` | | `02-Architecture-Software` | backend/software analysis, ADRs | `backend-review.md` | -| `03-Architecture-Hardware` | HBOX/cabinet, wiring, BOM, **watchdog PCB v3** | `hardware-respec-and-pcb-brief.md` · `cabinet-electrical-bom.md` · `watchdog-schematic.md` · `watchdog-health-telemetry.md` · `firmware-review.md` · `BOM-master.md` · **`watchdog-pcb-v3-design.md`** (schematic spec: +1 fan, +I²C temp/RH) · `watchdog-pcb-v3-bom.xlsx` (proto+production, LCSC) · `watchdog-pcb-v3-kicad-guide.md` (KiCad→JLCPCB) · `watchdog-pcb-v3-blockdiagram.svg` · `watchdog-protoboard-bringup.md` (shop list) · `watchdog-connections.xlsx` (pin/net connection list, PCB+proto) | +| `03-Architecture-Hardware` | HBOX/cabinet, wiring, BOM, **watchdog PCB v3** | `hardware-respec-and-pcb-brief.md` · `cabinet-electrical-bom.md` · `watchdog-schematic.md` · `watchdog-health-telemetry.md` · `firmware-review.md` · `BOM-master.md` · **`watchdog-pcb-v3-design.md`** (schematic spec: +1 fan, +I²C temp/RH) · `watchdog-pcb-v3-bom.xlsx` (proto+production, LCSC) · `watchdog-pcb-v3-kicad-guide.md` (KiCad→JLCPCB) · `watchdog-pcb-v3-blockdiagram.svg` · `watchdog-protoboard-bringup.md` (shop list) · `watchdog-connections.xlsx` (pin/net connection list, PCB+proto) · `watchdog-connections-rationale.md` (per-connection justification + firmware cross-check; flags Q10 Vgs, ignition level, 5V-sense tap) | | `04-Source-Code` | firmware + backend repos | `firmware/` (**own git repo `hbox-firmware`**: `blackpillrtkcode_v2/` deploy · `legacy/` v1 · `docs/LOGGING-SPEC.md` v2.1) · `htracker/` · `notifications/` · `rtk-config/` | | `05-Analytics-Reports` | SQL views, dashboards (VERONICA/PowerBI), **observability** | `2026-06-22_Drogheda_Manual-Logs-Grafana_v1.0.pdf` (Grafana/Loki log-consultation manual) | | `06-Testing-Validation` | RCA, diagnostics, test evidence, **log analysis & tooling** | `RCA-2026-06-field-failures.md` · `remote-diagnostic-protocol.md` · `2026-06-20_Drogheda_Bench-Log-Analysis_v1.0.md` (rev-3) · `2026-06-20_Drogheda_GNSS-Findings-Summary.md` · `log-analysis/` (repo **`hbox-log-tools`**: `log-explorer.html` · `analyze_logs.py` · `build_dashboard.py` · `docs/manual.pdf`) | @@ -239,3 +239,13 @@ Montacargas 12 V. **Target:** 30 units by August. go stale — verify before bulk shell moves. Six empty legacy dirs (`docs`, `firmware`, …) remain from the restructure; delete them manually. - Client-facing docs are **Spanish** and route through Leo. + + +## Objectivity — partner, not sycophant + +I want an objective partner, not a sycophant. On every task: + +- **Genuine take first.** Lead with your real assessment. Don't mirror my tone or sentiment, and don't open by validating me. +- **Disagree when you disagree.** Say so plainly and explain why — and pair the criticism with a concrete better option (direct *and* constructive). +- **Self-check.** If a reply is about to start with something semantically like "You're right" / "Good point" / "Great question," stop and first answer: *"Is this true?"* +