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b505cb35c2 v4 production package for JLCPCB: gerbers, BOM, CPL + audit
Fabrication Toolkit export of hbox-watchdog-v4 (EinarBoard 2.0), verified
before ordering. Board is 155.00 x 100.00 mm, 4 layers, 1.6 mm.

New in production/:
  HBOX_v4_PROD.zip             15 gerber + drill files
  HBOX_v4_PROD_bom.csv         102 lines, 25 with an LCSC number
  HBOX_v4_PROD_positions.csv   187 rows
  HBOX_v4_PROD_designators.csv toolkit by-product, not a JLC input

hbox-watchdog-v4.kicad_pcb is modified only because the toolkit's AUTO FILL
refilled zones and re-saved on export. Diffed before/after: 0 footprints
moved, 0 rotated, 0 changed side; tracks 1989 -> 1989, vias 351 -> 351,
zones 5 -> 5, filled polygons 41 -> 41. Zone fill data only.

Verification (details in the order walkthrough):
  - Row counts matched a prediction registered before the export existed:
    CPL 187, BOM 102, 35 machine-placed. No duplicate designators, no
    collisions from the toolkit's uppercasing of refdes, nothing truncated.
  - All 30 pre-registered rotation predictions matched exactly, 0 mismatches.
    The five previously-unproven packages resolved as J10 +0 deg and
    U10/U11/U13/U15 +270 deg.
  - Every non-zero rotation correction is externally backed: six packages
    (SOT-23, SOIC-8, SOIC-8-1EP, QFN-24-1EP, CP_Elec_6.3x7.7, Arduino_UNO_R3)
    are byte-identical to the v3 CPL that JLC built; the other four (LQFP-48,
    SOIC-16, SOIC-16W, TSSOP-28) match KiBot's published JLCPCB rotation
    table. KiBot's generic ^QFN- rule says 270 where the toolkit applied +90
    to U6 - v3 hardware settles it in the toolkit's favour.
  - Positions: 22 rows carry an AUTO TRANSLATE offset. 19 of 22 identical to
    the v3 export, 20 of 22 equal the pad bounding-box centroid to 0.02 mm.
    J10 is the only machine-placed part with a translation and it matches the
    centroid exactly.
  - Gerbers: 4 copper layers populated, both mask, both silk, F.Paste 40
    apertures. B_Paste empty is correct (the one bottom-side part has no
    paste). 523 PTH holes 0.30-1.63 mm, 6 NPTH at 3.20/3.25 mm.

Open before ordering: J10 (C12074 HR911105A) is the only through-hole part
carrying an LCSC number, so JLC's standard SMT line will not place it.
Also gitignore **/_to_delete/ (scratch folder for manual deletion).

Co-Authored-By: Claude <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GSKKes8GsS4YHAMWJ44tCm
2026-08-01 06:57:17 +00:00
e06387d6a7 1.1 Phase C10: production footprint corrections + LCSC + silk rev (PRE-FAB GATE)
CRITICAL FIXES - parts only exist in these packages:
- U11 W5500: QFN-48-1EP -> LQFP-48_7x7mm_P0.5mm (ring 3.4375->4.1625, EP+paste
  deleted, courtyard 10.3mm sq, 48 track retargets, RXN/RXP/RSET/GND(3,23,38-48)/
  3V3_ETH(15,17,28)/1V2(22)/XI/PMODE/ACTLED/LINKLED reworked under+around body)
- U13 PCF8574: SOIC-16 narrow -> SOIC-16W_7.5x10.3mm (pads +-4.65, SW_BAT neck,
  FAN_PWM/SCL/LED_A rework)
- U12 MP1584: stays plain SOIC-8 (EP addition attempted, reverted: SYS5V+COMP
  route through EP zone; belly-over-mask accepted at 150mA load - flagged)
- LCSC fields (board+sch): W5500 C32843, SC16IS752 C57156, MP1584 C15051,
  PCF8574T C7605, SP3485 C8963, MAX3232 C15846, HR911105A C12074, SS34 C8678 x2
- sch footprint fields synced (U11/U13); silk rev 'HBOX v4 - 2026-07';
  toolkit ARCHIVE_NAME HBOX_v4_PROD
- verify: seg/via clearance 0 hits <0.125; SMD pad-aware 0 hits <0.09;
  census 0 opens (GND pads U11.9/U11.29 pour-served by design)
2026-07-30 23:21:58 +00:00
7c1353d5c3 auto-sync 2026-07-06 18:00 2026-07-06 18:00:09 -06:00