Commit Graph

17 Commits

Author SHA1 Message Date
23ccda9e78 docs: fuentes KISS + hbox-docs 2026-09-28 20:05:35 -06:00
b598016e87 docs: datasheet V5.6, manuales por tarjeta, configuracion/Ethernet/serie, manual cliente v2.0, ficha tecnica v2.0, guia ingeniero 2026-09-28 18:33:22 -06:00
c432814ed8 auto-sync 2026-09-28 18:00 2026-09-28 18:00:15 -06:00
966c84d395 auto-sync 2026-09-26 18:00 2026-09-26 18:00:15 -06:00
d3b72835ad auto-sync 2026-09-24 18:00 2026-09-24 18:00:15 -06:00
d3ab138dc6 auto-sync 2026-09-19 18:00 2026-09-19 18:00:14 -06:00
63bf5cc82f pin fw 0.5.1 + docs; htracker patch for Gibran 2026-09-18 13:12:09 -06:00
e2bf432a32 pin fw 0.5.0 + hbox-docs; prueba final de unidad 2026-09-18 11:51:14 -06:00
6b943e9b52 pin hbox-docs + fw at bring-up 0.2.1; procedimientos a 0.2.1 2026-09-17 18:58:48 -06:00
3c3097f0e1 06-Testing: procedimientos v5 modulos/integracion y ensamble; prueba-y-flasheo -> fw 0.2.0 2026-09-17 11:00:25 -06:00
8ea4bbc52f v5: procedimiento de prueba y flasheo por tarjeta (lote 15 pzas, ES)
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
2026-09-15 18:23:54 +00:00
69bd360fd0 auto-sync 2026-08-18 18:00 2026-08-18 18:00:14 -06:00
5db46d9092 sync: commit before registering as submodule 2026-07-08 14:58:40 -06:00
2c3dffa232 2026-07-02: PROD schematic complete (ERC 0) + carrier-board PCB + doc sweep to the Jul-2 ledger
Electrical/PCB:
- LTC4040 Block B sized to the 12 Ah 1S4P pack (RPROG 825R -> 2.42 A ~ C/5,
  RS 8 mR -> 3.1 A input limit, PFI 4.60 V, backup 4.79 V, charge 4.00 V Li-ion
  via VSYS-referenced straps) + Block E cutoff (P11) + Block F PA4->VEH5V re-tap
  + Block H fail-safe Modo-B bypass (K1 normally-closed relay) + Block I NTC->PB1.
- CARRIER-BOARD conversion: simpleRTK2B Pro on UNO-pattern female headers (MOD1;
  D0/D1=UART1, D2=RX2, D8=TX2, IOREF=3V3, 5V=SW_5V) + 4G NTRIP Master on on-board
  XBee socket (J7/J8; VCC=3V3_MODEM via new Block K MP1584 buck off SW_5V - the
  HP XBee socket is 3.3 V not 5 V). Board 120x100, placement + GND pour + DRC
  baselines. Custom symbols: LTC4040EUFD, AO4406A, SimpleRTK2B_Pro_Socket.
- Fixed duplicated U2, stale no-connects, A4->A3 sheet; ERC 0 errors.

Docs:
- Canonical electrical-design-state + production delta (Block B values table,
  5b/5c/5d/5e) + design/rationale/connections/BOM swept to the Jul-2 assumptions
  ledger (Conexiones-por-Bloque xlsx).
- Guia de Conexion Protoboard: LaTeX source now maintained in-repo -> v2.1 PDF.
- CircuiTikZ sheet + wiring Beamer: block 11 (NTC->PB1) + guinda ignition legend.
- Client decks: Avance v1.1 (overclaims fixed) + RCA v1.1 (2-jul addendum).

Repo hygiene:
- .gitignore: live rtk-config (SIM/APN/NTRIP creds) now ignored and REMOVED from
  tracking (NOTE: rotate those credentials - they exist in prior commits);
  KiCad .bak/snapshots/.history, LaTeX intermediates, Office locks ignored+purged.
- Removed rogue .history gitlinks that broke git status.
2026-07-02 22:18:56 -06:00
eef023e15a auto-sync 2026-06-22 18:00 2026-06-22 18:00:16 -06:00
0f74fde451 Wire firmware/htracker/log-analysis as proper submodules 2026-06-22 00:03:31 -06:00
fd7b26b357 Initial commit (Hub backfill) 2026-06-21 23:39:49 -06:00