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b505cb35c2 v4 production package for JLCPCB: gerbers, BOM, CPL + audit
Fabrication Toolkit export of hbox-watchdog-v4 (EinarBoard 2.0), verified
before ordering. Board is 155.00 x 100.00 mm, 4 layers, 1.6 mm.

New in production/:
  HBOX_v4_PROD.zip             15 gerber + drill files
  HBOX_v4_PROD_bom.csv         102 lines, 25 with an LCSC number
  HBOX_v4_PROD_positions.csv   187 rows
  HBOX_v4_PROD_designators.csv toolkit by-product, not a JLC input

hbox-watchdog-v4.kicad_pcb is modified only because the toolkit's AUTO FILL
refilled zones and re-saved on export. Diffed before/after: 0 footprints
moved, 0 rotated, 0 changed side; tracks 1989 -> 1989, vias 351 -> 351,
zones 5 -> 5, filled polygons 41 -> 41. Zone fill data only.

Verification (details in the order walkthrough):
  - Row counts matched a prediction registered before the export existed:
    CPL 187, BOM 102, 35 machine-placed. No duplicate designators, no
    collisions from the toolkit's uppercasing of refdes, nothing truncated.
  - All 30 pre-registered rotation predictions matched exactly, 0 mismatches.
    The five previously-unproven packages resolved as J10 +0 deg and
    U10/U11/U13/U15 +270 deg.
  - Every non-zero rotation correction is externally backed: six packages
    (SOT-23, SOIC-8, SOIC-8-1EP, QFN-24-1EP, CP_Elec_6.3x7.7, Arduino_UNO_R3)
    are byte-identical to the v3 CPL that JLC built; the other four (LQFP-48,
    SOIC-16, SOIC-16W, TSSOP-28) match KiBot's published JLCPCB rotation
    table. KiBot's generic ^QFN- rule says 270 where the toolkit applied +90
    to U6 - v3 hardware settles it in the toolkit's favour.
  - Positions: 22 rows carry an AUTO TRANSLATE offset. 19 of 22 identical to
    the v3 export, 20 of 22 equal the pad bounding-box centroid to 0.02 mm.
    J10 is the only machine-placed part with a translation and it matches the
    centroid exactly.
  - Gerbers: 4 copper layers populated, both mask, both silk, F.Paste 40
    apertures. B_Paste empty is correct (the one bottom-side part has no
    paste). 523 PTH holes 0.30-1.63 mm, 6 NPTH at 3.20/3.25 mm.

Open before ordering: J10 (C12074 HR911105A) is the only through-hole part
carrying an LCSC number, so JLC's standard SMT line will not place it.
Also gitignore **/_to_delete/ (scratch folder for manual deletion).

Co-Authored-By: Claude <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GSKKes8GsS4YHAMWJ44tCm
2026-08-01 06:57:17 +00:00
2c3dffa232 2026-07-02: PROD schematic complete (ERC 0) + carrier-board PCB + doc sweep to the Jul-2 ledger
Electrical/PCB:
- LTC4040 Block B sized to the 12 Ah 1S4P pack (RPROG 825R -> 2.42 A ~ C/5,
  RS 8 mR -> 3.1 A input limit, PFI 4.60 V, backup 4.79 V, charge 4.00 V Li-ion
  via VSYS-referenced straps) + Block E cutoff (P11) + Block F PA4->VEH5V re-tap
  + Block H fail-safe Modo-B bypass (K1 normally-closed relay) + Block I NTC->PB1.
- CARRIER-BOARD conversion: simpleRTK2B Pro on UNO-pattern female headers (MOD1;
  D0/D1=UART1, D2=RX2, D8=TX2, IOREF=3V3, 5V=SW_5V) + 4G NTRIP Master on on-board
  XBee socket (J7/J8; VCC=3V3_MODEM via new Block K MP1584 buck off SW_5V - the
  HP XBee socket is 3.3 V not 5 V). Board 120x100, placement + GND pour + DRC
  baselines. Custom symbols: LTC4040EUFD, AO4406A, SimpleRTK2B_Pro_Socket.
- Fixed duplicated U2, stale no-connects, A4->A3 sheet; ERC 0 errors.

Docs:
- Canonical electrical-design-state + production delta (Block B values table,
  5b/5c/5d/5e) + design/rationale/connections/BOM swept to the Jul-2 assumptions
  ledger (Conexiones-por-Bloque xlsx).
- Guia de Conexion Protoboard: LaTeX source now maintained in-repo -> v2.1 PDF.
- CircuiTikZ sheet + wiring Beamer: block 11 (NTC->PB1) + guinda ignition legend.
- Client decks: Avance v1.1 (overclaims fixed) + RCA v1.1 (2-jul addendum).

Repo hygiene:
- .gitignore: live rtk-config (SIM/APN/NTRIP creds) now ignored and REMOVED from
  tracking (NOTE: rotate those credentials - they exist in prior commits);
  KiCad .bak/snapshots/.history, LaTeX intermediates, Office locks ignored+purged.
- Removed rogue .history gitlinks that broke git status.
2026-07-02 22:18:56 -06:00
fd7b26b357 Initial commit (Hub backfill) 2026-06-21 23:39:49 -06:00