% =====================================================================
%  2026-07-07_Drogheda_EinarBoard-1.0_Engineering-Manual_v1.1
%  Helgen Technologies — Project Drogheda (GPS RTK)
%  HELGEN EINARBOARD 1.0 (hbox-watchdog-v3-PROD) — Rev 1.1 Post-Audit
%  Production Engineering Manual / Engineering Memory
%
%  BOM table is AUTO-SYNCED: edit helgen_einarboard_1.0_production_bom.xlsx,
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\documentclass[11pt,a4paper]{article}

\usepackage[T1]{fontenc}
\usepackage[utf8]{inputenc}
\usepackage{lmodern}
% Brand fonts (League Spartan / MADE Evolve Sans) are license-gated for
% embedded client-facing use — sans-serif fallback per brand working summary.
\renewcommand{\familydefault}{\sfdefault}

\usepackage[margin=2.1cm,headheight=14pt]{geometry}
\usepackage[table]{xcolor}
\definecolor{HelgenIndigo}{HTML}{2C3C5B}
\definecolor{HelgenCyan}{HTML}{51F3DA}
\definecolor{HelgenSlate}{HTML}{44597A}
\definecolor{HelgenMist}{HTML}{EAEFF5}

\usepackage{graphicx,booktabs,longtable,array,tabularx,enumitem,fancyhdr,titlesec,caption,microtype,textcomp}
\usepackage{pdfpages} % full-sheet schematic + per-layer plots (assets/)
\usepackage{tikz}
\usetikzlibrary{arrows.meta,positioning,fit,calc}
\usepackage[colorlinks=true,linkcolor=HelgenIndigo,urlcolor=HelgenSlate,pdftitle={Helgen EinarBoard 1.0 — Production Engineering Manual v1.1}]{hyperref}

\titleformat{\section}{\Large\bfseries\color{HelgenIndigo}}{\thesection}{0.8em}{}[{\color{HelgenCyan}\titlerule[1.2pt]}]
\titleformat{\subsection}{\large\bfseries\color{HelgenSlate}}{\thesubsection}{0.7em}{}
\captionsetup{font=small,labelfont={bf,color=HelgenIndigo}}
\setlist{nosep,leftmargin=1.4em}
\newcolumntype{L}[1]{>{\raggedright\arraybackslash}p{#1}}

\pagestyle{fancy}\fancyhf{}
\fancyhead[L]{\small\color{HelgenSlate}EinarBoard 1.0 --- Rev 1.1 Production Master}
\fancyhead[R]{\small\color{HelgenSlate}Helgen Technologies}
\fancyfoot[L]{\small\color{HelgenSlate}CONFIDENTIAL --- Project Drogheda (GPS RTK)}
\fancyfoot[R]{\small\color{HelgenSlate}\thepage}
\renewcommand{\headrulewidth}{0.4pt}

\newcommand{\net}[1]{\texttt{#1}}
\newcommand{\warn}[1]{\par\medskip\noindent\colorbox{HelgenMist}{\parbox{\dimexpr\linewidth-2\fboxsep}{\textbf{\color{HelgenIndigo}\textbardbl~WARNING.} #1}}\medskip}

\begin{document}

% ------------------------------------------------------------------ COVER
\begin{titlepage}
\centering
\vspace*{8mm}
\IfFileExists{assets/Logo_Helgen_Azul_2026.png}{\includegraphics[width=0.42\linewidth]{assets/Logo_Helgen_Azul_2026.png}}{\textbf{\Huge\color{HelgenIndigo}HELGEN}}\par
\vspace{14mm}
{\color{HelgenCyan}\rule{\linewidth}{2pt}}\par\vspace{6mm}
{\Huge\bfseries\color{HelgenIndigo} HELGEN EINARBOARD 1.0\par}
\vspace{3mm}
{\Large\color{HelgenSlate} HBOX RTK Watchdog Carrier --- Production Engineering Manual\par}
\vspace{2mm}
{\large\color{HelgenSlate} Rev 1.1 --- Post-Audit Production Master\par}
\vspace{6mm}
{\color{HelgenCyan}\rule{\linewidth}{2pt}}\par
\vspace{16mm}
\begin{tabular}{ll}
\textbf{Document code} & \texttt{2026-07-07\_Drogheda\_EinarBoard-1.0\_Engineering-Manual\_v1.1}\\
\textbf{Project} & Drogheda (GPS RTK) --- Hutchison Ports ICAVE / TIMSA / EIT / LCT\\
\textbf{KiCad project} & \texttt{kicad/hbox-watchdog-v3-PROD.kicad\_pcb}\\
\textbf{Board} & $135.1 \times 100.1$\,mm, 4-layer, 132 footprints, 130 nets\\
\textbf{Verification} & ERC 0 errors $\cdot$ DRC 0 errors / 0 unconnected (2026-07-07)\\
\textbf{Author} & Helgen CTO/CSO --- principal HW/SW architect\\
\textbf{Status} & Bare-board order RELEASED $\cdot$ PCBA gated (\S\ref{sec:readiness})\\
\end{tabular}
\vfill
{\small\color{HelgenSlate} CONFIDENTIAL --- Helgen Technologies. Client-facing derivatives are produced in Spanish and routed through Leo.\par}
\end{titlepage}

% ------------------------------------------------------------------ DOC CONTROL
\section*{Revision history}
\begin{tabular}{@{}llL{9.6cm}@{}}
\toprule
\rowcolor{HelgenMist}\textbf{Rev} & \textbf{Date} & \textbf{Change}\\
\midrule
1.0 & 2026-07-06 & Initial production master; pre-fab audit executed same day (4 HIGH, 6 MED findings).\\
1.1 & 2026-07-07 & \textbf{Post-audit master.} H1 Q7 S/D corrected (S=\net{VIN\_SW}, D=\net{MAIN5V}); H2 Q5/Q6 to \texttt{Q\_NPN\_BEC} map; H3 \net{RIG1}/\net{RDFU1}=22\,k$\Omega$ + dangling pin fixed; H4 \net{SW\_IN} in PWR\_MID @1.0\,mm. M3 closed (physical Pro pinout verified). Refdes converged to numbered names. Fab package regenerated after last save.\\
\bottomrule
\end{tabular}

\tableofcontents

% ------------------------------------------------------------------ 1
\section{System overview}
\textbf{EinarBoard 1.0} (title-block \emph{EINARBoard HBOX 1.0}; KiCad lineage \texttt{hbox-watchdog-v3-PROD}) is the HBOX carrier/motherboard for the Drogheda GPS-RTK fleet tracker deployed on heavy port equipment. It hosts the full electronics stack of an HBOX unit on plug-in sockets and carries the watchdog, power, backup-battery, thermal-sensing, and fail-safe corrections infrastructure on its own copper:

\begin{itemize}
\item \textbf{STM32F411 Blackpill} (watchdog MCU) on J1/J2 $1{\times}20$ sockets --- supervises the stack, power-cycles it on lost corrections, gauges the battery, qualifies charging by temperature, and injects \texttt{\$PHLG} diagnostics on the Modo-B uplink.
\item \textbf{simpleRTK2B Pro} (u-blox ZED-F9P) as an Arduino-UNO-form shield on MOD1 --- GNSS RTK engine.
\item \textbf{4G NTRIP Master} (XBee-form LTE) on J7/J8 2.00\,mm sockets at \net{3V3\_MODEM} --- corrections downlink and NMEA uplink. USB-C service port J9 firmware-updates the modem in place.
\item \textbf{LTC4040} battery-backup manager with a 1S4P ($\sim$12\,Ah) 18650 pack --- rides through power loss on a parked machine; charge voltage strapped to 4.00\,V Li-ion for cycle life and hot-cell margin (RCA \#1 answer).
\item \textbf{K1 normally-closed relay bypass} --- RTCM3 corrections survive a dead, hung, or physically absent MCU.
\end{itemize}

Deployment context: machine power (12/24\,V classes at ICAVE) enters the IP67 cabinet (breaker, SPD, Mean~Well DDR-60G-24); the HBOX receives regulated 24\,V, vehicle 5\,V (SD-15B-05), and \emph{raw} machine ignition through the GX16-5 bulkhead. Corrections arrive over LTE/NTRIP --- never through the GNSS --- so link recovery is always a stack power-cycle.

\subsection{Power tree (as built, Rev 1.1)}
\begin{center}
\resizebox{\linewidth}{!}{%
\begin{tikzpicture}[
  font=\scriptsize,
  box/.style={draw=HelgenIndigo, fill=HelgenMist, rounded corners=1pt, minimum height=5.5mm, inner sep=2pt, align=center},
  pow/.style={draw=HelgenIndigo, fill=HelgenIndigo, text=white, rounded corners=1pt, minimum height=5.5mm, inner sep=2pt, align=center},
  acc/.style={draw=HelgenIndigo, fill=HelgenCyan, rounded corners=1pt, minimum height=5.5mm, inner sep=2pt, align=center},
  a/.style={-{Stealth[length=2mm]}, HelgenSlate, thick},
  node distance=3.5mm and 5mm]
\node[pow] (gx) {P1 GX16-5\\24\,V / IGN / GND};
\node[box, right=of gx] (fe) {D10 SMBJ33A +\\Q10 IRFR5305 rev-pol};
\node[box, right=of fe] (u2) {U2 MP1584\\24$\to$5.0\,V};
\node[box, right=of u2] (fan) {\net{5V\_FAN}\\P6 fan (Q2 PWM)};
\node[pow, below=7mm of gx] (p2) {P2 \net{VEH5V}\\SD-15B-05 5\,V};
\node[box, right=of p2] (rs) {RS1 8\,m$\Omega$\\3.1\,A limit};
\node[acc, right=of rs] (ltc) {U6 LTC4040 + Q7\\backup mgr};
\node[box, right=of ltc] (main) {\net{MAIN5V}\\(backed-up)};
\node[box, right=of main] (cut) {P11 cutoff\\$\to$ \net{SYS5V}};
\node[box, below=7mm of rs] (bat) {P4 1S4P $\sim$12\,Ah\\+ cell NTC};
\node[box, below=7mm of cut] (mcu) {Blackpill 5\,V\\+ K1 coil};
\node[box, right=of cut] (f1) {F1 PPTC $\to$ \net{SW\_IN}\\Q1 load switch};
\node[acc, below=7mm of f1] (sw5) {\net{SW\_5V}\\MOD1 (Pro 5\,V)};
\node[box, right=of sw5] (u7) {U7 MP1584\\$\to$ \net{3V3\_MODEM}};
\node[box, below=7mm of u7] (xbee) {J7/J8 XBee\\4G NTRIP Master};
\draw[a] (gx) -- (fe); \draw[a] (fe) -- (u2); \draw[a] (u2) -- (fan);
\draw[a] (p2) -- (rs); \draw[a] (rs) -- (ltc); \draw[a] (ltc) -- (main);
\draw[a] (main) -- (cut); \draw[a] (cut) -- (f1);
\draw[a, {Stealth[length=2mm]}-{Stealth[length=2mm]}] (ltc) -- node[left]{L6 2.2\,\textmu H} (bat);
\draw[a] (cut) -- (mcu);
\draw[a] (f1) -- (sw5); \draw[a] (sw5) -- (u7); \draw[a] (u7) -- (xbee);
\end{tikzpicture}}
\end{center}

\noindent\textbf{Ignition sense (Rev 1.1 topology --- DFR1015 removed):} GX16 pin 3 carries \emph{raw} machine ignition (12--24\,V) to \net{IGN\_IN} $\to$ \net{RIG1} 22\,k$\Omega$ / \net{Rigb} 10\,k$\Omega$ divider $\to$ D5 BAT54 clamp to 3V3 $+$ C9 100\,nF $\to$ PA5 (digital input). At 24\,V the clamp carries $<$1\,mA. \emph{The stale 100\,$\Omega$ value (audit H3) would have burned D5 and the resistor at 24\,V --- corrected on board, schematic, and fab BOM.}

% ------------------------------------------------------------------ 2
\section{Canonical invariants (engineering memory)}
Every change to this board is checked against the project ethos. In copper, Rev 1.1 realizes them as:
\begin{enumerate}
\item \textbf{Power-off is the safe state.} R2 10\,k$\Omega$ pulls the Q1 gate to rail; only PA1 (\net{PWR\_CTRL}) via Q5 can enable the RTK stack. MCU absent $\Rightarrow$ stack OFF.
\item \textbf{Never vanish, never loop.} Watchdog power-cycles the stack (modem included, via U7 fed from \net{SW\_5V}) instead of letting a unit go silent; firmware rate-limits reboots.
\item \textbf{Corrections ride the 4G modem, not the GNSS.} RTCM3 downlink (modem DOUT $\to$ MOD1 D2 $\to$ F9P RX2) is hardwired and never touches the MCU; uplink survives a dead MCU through K1's NC contacts.
\item \textbf{No sub-80\,$^{\circ}$C-softening material in the thermal path;} enclosure is ASA; cooling is conduction (IP67 --- no vents). Thermal telemetry: SHT40 + TMP102 (I$^2$C) + hotspot NTC (PB1) + cell NTC (charger-owned).
\item \textbf{Backend must not black-hole a healthy unit} --- board-side contribution is honest telemetry (\texttt{\$PHLG}, charge status, temperatures) on the STREAM log.
\item \textbf{No secrets in the repo} --- this manual and the BOM workbook carry none.
\end{enumerate}

% ------------------------------------------------------------------ 3
\section{Electrical architecture by block}
\begin{center}
\small
\begin{tabular}{@{}lL{6.4cm}L{5.6cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Block}} & \textcolor{white}{\textbf{Function}} & \textcolor{white}{\textbf{Key parts / nets}}\\
\midrule
A & Fan buck 24\,V$\to$5.0\,V, dedicated rail (inrush never sags \net{MAIN5V}) & U2 MP1584EN, L2 10\,\textmu H, FB 100k/19.1k, \net{5V\_FAN}, JP1 OPEN\\
\rowcolor{HelgenMist}
B & Battery backup: charger + power path + 2.5\,A boost & U6 LTC4040, Q7 AO4406A, RS1 8\,m$\Omega$, L6 2.2\,\textmu H, P4, straps 4.00\,V\\
C & Reset & SW1 on-board + P10 external $\to$ \net{NRST}\\
\rowcolor{HelgenMist}
D & 4-LED battery gauge & PB12--15, RB1--4 330\,$\Omega$, DB1--4\\
E & Power cutoff (kills vehicle \emph{and} battery) & P11 in series \net{MAIN5V}$\to$\net{SYS5V}; jumper plug when unused\\
\rowcolor{HelgenMist}
F & Vehicle-power sense on the vehicle side & PA4 divider taps \net{VEH5V} (never the backed-up rail)\\
H & Modo-B fail-safe uplink bypass & K1 G5V-1 NC, Q6 driver (PB5), D6 flyback\\
\rowcolor{HelgenMist}
I & Hot-spot NTC channel & R42 10\,k$\Omega$ 1\,\% + C24 $\to$ PB1 (ADC1\_IN9), P12 probe\\
J & Carrier sockets & J1/J2 Blackpill $\cdot$ MOD1 UNO shield $\cdot$ J7/J8 XBee 2.00\,mm\\
\rowcolor{HelgenMist}
K & Modem rail & U7 MP1584EN \net{SW\_5V}$\to$\net{3V3\_MODEM} (3.33\,V), FB 100k/31.6k\\
U & USB-C service port (modem DFU in place) & J9 USB4085, Rcc 5.1\,k$\Omega\times2$, SW4G reset, D4G/Rmled LED\\
\bottomrule
\end{tabular}
\end{center}

\subsection{Block B --- LTC4040 backup manager (sized to the 12\,Ah pack)}
Single-inductor architecture: step-down charger (\net{VSYS}$\to$BAT) while input is good; 2.5\,A step-up backup (BAT$\to$\net{VSYS}) when PFI trips. Q7 (gate = IGATE) disconnects the dead input during backup --- \textbf{Rev 1.1 orientation: S = \net{VIN\_SW}, D = \net{MAIN5V}} (audit H1: reversed, the body diode would have back-fed the dead vehicle rail and collapsed backup \emph{exactly when needed}).

\begin{center}
\small
\begin{tabular}{@{}llL{6.8cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Parameter}} & \textcolor{white}{\textbf{Value}} & \textcolor{white}{\textbf{Sizing (ADI 4040fb)}}\\
\midrule
Charge current & 2.42\,A $\approx$ C/5 & $I_{CHG}=2000/R_{PROG}$, $R_{PROG}=825\,\Omega$ 1\,\% (R50)\\
\rowcolor{HelgenMist} Input current limit & 3.1\,A & $25\,\mathrm{mV}/R_S$, $R_S=8$\,m$\Omega$ (RS1) --- protects the SD-15B-05 (3\,A); charge sheds first\\
PFI trip & 4.60\,V falling ($\approx$4.72\,V recover) & 287k/100k from \net{VEH5V} (R51/R52)\\
\rowcolor{HelgenMist} Backup voltage & 4.79\,V (RST $-7.5\,\%\approx4.43$\,V) & BSTFB=RSTFB shared divider 499k/100k (R53/R54)\\
Charge voltage & \textbf{4.00\,V Li-ion} & F2=1, F1=0, F0=1 via JP2/3/4 strapped to \net{VSYS} (chemistry survives absent MCU); LiFePO$_4$ = re-strap F2\\
\rowcolor{HelgenMist} Inductor & 2.2\,\textmu H, $I_{sat}\geq8$\,A & L6 (Sunlord MWSA0804S-2R2MT sub)\\
VSYS hold-up & 104\,\textmu F $\geq$ 100\,\textmu F min & C32/C33 47\,\textmu F 1210 + C34\\
\rowcolor{HelgenMist} Cell NTC & charger-owned (U6 NTC pin) & RT1 on the cell via P4.3; R55 10\,k$\Omega$ bias --- charging stays temperature-qualified with the MCU dead\\
CHGOFF & \net{CHRG\_EN} (PA8) + 100\,k$\Omega$ pull-down & MCU absent $\Rightarrow$ charging enabled, NTC still guards; MCU cuts charge on hot cell (RCA \#1)\\
\bottomrule
\end{tabular}
\end{center}

\noindent\textbf{Safety-timer note:} a deep-discharge full recharge (12\,Ah @ 2.42\,A $\approx$ 5\,h) exceeds the internal safety timer --- firmware restarts the cycle via \net{CHRG\_EN} while the cell is cool and \net{BAT\_SENSE} is low.

\subsection{Block H --- fail-safe Modo-B bypass}
K1 (Omron G5V-1, 5\,V coil) de-energized routes F9P TX2 $\to$ 4G DIN through its \textbf{normally-closed} contacts: corrections and position flow exactly as if the watchdog were not there --- with the Blackpill hung, unpowered, or physically removed. PB5 (\net{BYP\_CTRL}) via Q6 energizes the coil to insert the MCU in-line (USART1: PA10 monitor tap, PA9 injection of \texttt{\$PHLG}). Verified against the Omron datasheet at net level: coil pins 2/9, COM 5\&6 (internally doubled), NC\,=\,1\,=\,F9P TX2, NO\,=\,10\,=\,PA9. Q6 is a Rev 1.1 (H2) BEC-map correction --- with the old BCE map it could not sink the 30\,mA coil and Modo-B injection was dead.

% ------------------------------------------------------------------ 4
\section{Pinout matrices}

\subsection{STM32F411 Blackpill core signals (J1/J2 sockets)}
SWD is not on the $2{\times}20$ --- flash via USB-C DFU (BOOT0), diagnose via USB CDC STREAM log.

{\small
\begin{longtable}{@{}llllL{6.1cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Pin}} & \textcolor{white}{\textbf{Hdr}} & \textcolor{white}{\textbf{Net}} & \textcolor{white}{\textbf{Group}} & \textcolor{white}{\textbf{Function / notes}}\\
\midrule\endhead
PA0 & J1 & \net{BAT\_SENSE} & ADC & Pack voltage $\div2$ (R5/R6) --- feeds gauge logic\\
\rowcolor{HelgenMist} PA1 & J1 & \net{PWR\_CTRL} & Relay/Switch & RTK-stack load-switch enable via Q5$\to$Q1; HIGH = stack ON; pull-down default OFF (invariant \#1)\\
PA2 & J1 & \net{GNSS\_TX} & UART & USART2 TX $\to$ MOD1 D1 (F9P UART1 RX)\\
\rowcolor{HelgenMist} PA3 & J1 & \net{GNSS\_RX} & UART & USART2 RX $\gets$ MOD1 D0 (F9P UART1 TX) --- NMEA\\
PA4 & J1 & \net{5V\_SENSE} & ADC & Vehicle 5\,V present, $\div2$ from \net{VEH5V} (vehicle side --- Block F; on the backed-up rail it would never drop and the cell would drain)\\
\rowcolor{HelgenMist} PA5 & J1 & \net{IGN\_SENSE} & Ignition & \textbf{Digital} \texttt{INPUT\_PULLDOWN}; raw 12--24\,V $\to$ 22k/10k divider + BAT54 clamp + 100\,nF (Rev 1.1/H3)\\
PA6 & J1 & \net{FAN\_PWM} & PWM & TIM3\_CH1, 25\,kHz $\to$ Q2 low-side\\
\rowcolor{HelgenMist} PA7 & J1 & --- & Reserve & Proto-only LM35 channel; unassigned on EinarBoard\\
PA8 & J2/5 & \net{CHRG\_EN} & LTC status & U6 CHGOFF; HIGH = charge OFF; 100\,k$\Omega$ pull-down = charging enabled if MCU absent (NTC still guards). \emph{Proto TP4056 rig is INVERTED (\net{CHRG\_RUN}) --- firmware flag}\\
\rowcolor{HelgenMist} PA9 & J2 & \net{USART1\_TX} & UART/Modo-B & $\to$ K1 NO --- \texttt{\$PHLG} injection when K1 energized\\
PA10 & J2/7 & \net{USART1\_RX} & UART/Modo-B & $\gets$ F9P TX2 (K1 NC node, MOD1 D8) --- passive monitor tap\\
\rowcolor{HelgenMist} PB0 & J1/14 & \net{EXT\_LED} & GPIO & Status LED low-side (Q4); panel LED on P8\\
PB1 & J1/15 & \net{NTC\_TEMP} & ADC & ADC1\_IN9 hotspot NTC (R42 10\,k 1\,\% + C24; P12 probe at battery/modem) --- may drive the charge cutoff\\
\rowcolor{HelgenMist} PB3 & J2/11 & \net{CHRG\_STAT} & LTC status & U6 CHRG open-drain, 100\,k$\uparrow$3V3; LOW = charging ($>$C/8)\\
PB4 & J2/12 & \net{CHRG\_FAULT} & LTC status & U6 FAULT open-drain, 100\,k$\uparrow$3V3; LOW = NTC/bad-battery fault\\
\rowcolor{HelgenMist} PB5 & J2/13 & \net{BYP\_CTRL} & Relay control & K1 coil driver via Q6 (BEC map --- Rev 1.1/H2); HIGH = MCU in-line on the uplink; de-energized/absent = NC = corrections direct\\
PB6 & J2/14 & \net{I2C\_SCL} & I$^2$C & SHT40 (0x44) + TMP102 (0x48), 4.7\,k pulls; P5 probe port\\
\rowcolor{HelgenMist} PB7 & J2/15 & \net{I2C\_SDA} & I$^2$C & (proto uses AHT10 0x38 \emph{alone} on the bus --- PCB unaffected)\\
PB10 & J1 & \net{FAN\_TACH} & DNP & 2-wire fans: tach unused; DNP provision (fan fault inferred from temperature)\\
\rowcolor{HelgenMist} PB12--15 & J2/1--4 & \net{BATLED1--4} & GPIO & Battery gauge 25/50/75/100\,\% (330\,$\Omega$ each)\\
PC13 & --- & on-module LED & GPIO & WeAct module\\
\rowcolor{HelgenMist} NRST & J1/5 & \net{NRST} & Reset & SW1 on-board + P10 external, both $\to$ GND\\
\bottomrule
\end{longtable}}

\subsection{ArduSimple carrier socket (MOD1) --- incl.\ switchless Pro behavior}
\label{sec:mod1}
UNO-form shield socket, pin map \textbf{verified against a physical simpleRTK2B Pro (M3 closed, 2026-07-07)} --- silk reads D0=TX1, D1=RX1, D2=RX2, D3--D7 empty, D8=TX2.

\begin{center}
\small
\begin{tabular}{@{}llllL{5.6cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Shield pin}} & \textcolor{white}{\textbf{F9P signal}} & \textcolor{white}{\textbf{Dir (Pro)}} & \textcolor{white}{\textbf{Carrier net}} & \textcolor{white}{\textbf{Role}}\\
\midrule
D0 & TX1 (UART1 TX) & out & \net{GNSS\_RX} $\to$ PA3 & NMEA to the watchdog\\
\rowcolor{HelgenMist} D1 & RX1 (UART1 RX) & in & \net{GNSS\_TX} $\gets$ PA2 & Watchdog commands/poll\\
D2 & RX2 (UART2 RX) & in & \net{DOUT\_4G} & \textbf{RTCM3 downlink --- modem-direct, never through the MCU} (silk: \emph{XBEE-TX/GPS RX2})\\
\rowcolor{HelgenMist} D8 & TX2 (UART2 TX) & out & K1.NC + PA10 tap & Modo-B uplink source (silk: \emph{XBEE-RX/GPS TX2})\\
5V & shield power & in & \net{SW\_5V} & Pro's ``5V=OUTPUT'' switch \textbf{OFF}\\
\rowcolor{HelgenMist} IOREF & logic reference & in & \net{3V3} & Defines Pro TX/RX levels\\
GND $\times3$ & --- & --- & \net{GND} & \\
\rowcolor{HelgenMist} \multicolumn{5}{@{}L{16.2cm}@{}}{\emph{All other shield positions (3V3, VIN, RESET, A0--A5, D3--D7, D9--D13, AREF, SDA, SCL): NC per ArduSimple guidance --- do not connect unused special pins.}}\\
\bottomrule
\end{tabular}
\end{center}

\paragraph{Switchless Pro variants --- hardwired UART2 behavior.} Pro revisions differ and the difference is operationally critical:
\begin{itemize}
\item \textbf{Older Pros} carry an \emph{XBEE TO GPS UART} slide switch --- it must be \textbf{parked on UART1} so the (empty) on-Pro XBee socket does not sit on UART2.
\item \textbf{Newer Pros have no switch}: the on-Pro XBee socket is \emph{hardwired to UART2}, i.e.\ permanently in parallel with the carrier's D2/D8 rail pins.
\end{itemize}

\warn{On \textbf{both} revisions the Pro's own XBee socket stays \textbf{EMPTY} --- the modem lives on the carrier's J7/J8. On switchless Pros, \textbf{never plug the Pro's ``USB XBee'' port while the unit is in service}: its FTDI sits directly across UART2 --- that is the live RTCM3 corrections downlink. Bench configuration via that port only with the unit out of service.}

\subsection{XBee socket J7/J8 --- including the J8 mirror map}
J7 carries module pins 1--10 in order; \textbf{J8 pad $k$ = XBee pin $(21-k)$} --- the mirror is easy to get wrong and was previously undocumented outside the copper.

\begin{center}
\small
\begin{tabular}{@{}lllL{5.2cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Pad}} & \textcolor{white}{\textbf{XBee pin}} & \textcolor{white}{\textbf{Net}} & \textcolor{white}{\textbf{Role}}\\
\midrule
J7.1 & 1 VCC & \net{3V3\_MODEM} & 3.3--3.6\,V, 2\,A peak (U7 rail --- \textbf{not 5\,V})\\
\rowcolor{HelgenMist} J7.2 & 2 TX & \net{DOUT\_4G} & RTCM3 out $\to$ F9P RX2 (direct)\\
J7.3 & 3 RX & \net{DIN\_4G} & $\gets$ K1 COM (uplink in)\\
\rowcolor{HelgenMist} J7.4 & 4 GND & \net{GND} & \\
J7.5 & 5 RESET & \net{MODEM\_RST} & SW4G button $\to$ GND\\
\rowcolor{HelgenMist} J7.6 & 6 V\_USB & \net{USB\_VBUS} & 5\,V from J9 enables modem USB (laptop-powered only --- no rail backfeed)\\
J7.7 / J7.8 & 7 USB+ / 8 USB$-$ & \net{USB\_DP}/\net{USB\_DM} & Service USB to J9\\
\rowcolor{HelgenMist} J7.9 / J7.10 & 9 DTR / 10 GND & NC / \net{GND} & \\
J8.1 & 20 ON/OFF & \net{GND} & \textbf{GND = always ON} (floating may never power up)\\
\rowcolor{HelgenMist} J8.5 / J8.9 & 16 RTS / 12 CTS & NC & Flow control disabled\\
J8.6 / J8.10 & 15 / 11 GND & \net{GND} & \\
\rowcolor{HelgenMist} J8.7 & 14 VREF & \net{3V3\_MODEM} & \textbf{Must equal VCC}\\
J8.8 & 13 LED & \net{MODEM\_LED} & 1.8\,V drive $\to$ Rmled 1\,k + D4G (dim --- accepted, audit L4)\\
\bottomrule
\end{tabular}
\end{center}

\subsection{Harness connectors (external interface summary)}
Full netlist-derived pin tables: \texttt{harness-connector-pinout.md}.

\begin{center}
\small
\begin{tabular}{@{}llL{9.8cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Conn}} & \textcolor{white}{\textbf{Type}} & \textcolor{white}{\textbf{Function / key pins}}\\
\midrule
P1 & Phoenix 5-pos & GX16-5: 1=\net{24V\_IN}, 2=\net{GND}, 3=\net{IGN\_IN} (\textbf{raw} 12--24\,V)\\
\rowcolor{HelgenMist} P2 & XH-2 & \net{VEH5V} in from SD-15B-05\\
P4 & XH-3 & Battery: 1=\net{BAT\_PLUS}, 2=\net{GND}, 3=\net{NTC} (cell)\\
\rowcolor{HelgenMist} P5 & XH-4 & External I$^2$C probe (3V3/GND/SDA/SCL)\\
P6 & XH-4 & Fan: \net{5V\_FAN}/\net{FAN\_RET}/GND/\net{FAN\_TACH\_RAW}\\
\rowcolor{HelgenMist} P8 & XH-2 & Panel LED (\net{LED\_A}/\net{LED\_K})\\
P10 & XH-2 & External reset (\net{NRST}/GND)\\
\rowcolor{HelgenMist} P11 & XH-2 & Cutoff: 1=\net{MAIN5V}, 2=\net{SYS5V} --- \textbf{jumper plug installed when no switch fitted; open P11 = dead board}\\
P12 & XH-2 & Hotspot NTC probe (\net{NTC\_TEMP}/GND)\\
\rowcolor{HelgenMist} P3 / P13 / H3 & --- & \textbf{DNP} --- harness alternatives superseded by carrier sockets + K1 bypass\\
\bottomrule
\end{tabular}
\end{center}

% ------------------------------------------------------------------ 5
\section{PCB fabrication specification}
\label{sec:fab}
\begin{center}
\small
\begin{tabular}{@{}lL{10.6cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Parameter}} & \textcolor{white}{\textbf{Specification}}\\
\midrule
Stackup & \textbf{4-layer}: F.Cu (signal/power) / In1.Cu (\textbf{solid GND plane}) / In2.Cu (signal) / B.Cu\\
\rowcolor{HelgenMist} Material & FR-4, \textbf{standard TG150} (JLCPCB 4-layer default stackup)\\
Thickness / copper & \textbf{1.6\,mm} finished; \textbf{1\,oz} outer copper\\
\rowcolor{HelgenMist} Finish & \textbf{ENIG} --- required in practice for the QFN-24 (LTC4040), DFN-4 (SHT40), SOT-563 (TMP102) and USB-C fine pitch\\
Soldermask / silk & \textbf{Blue mask, white silkscreen} (nearest standard to Helgen indigo \#2C3C5B); \textbf{black} is the approved alternate --- no other colors without brand approval\\
\rowcolor{HelgenMist} Min track/space & 0.15\,mm present on board (JLC 4-layer capability 0.09\,mm)\\
Netclasses & PWR\_HI \textbf{1.5\,mm} $\cdot$ PWR\_MID \textbf{1.0\,mm} (Rev 1.1/H4 added \net{SW\_IN}) $\cdot$ default 0.2\,mm; exceeds the kicad-guide minimums (5\,V $\geq$ 0.5\,mm, \net{SW\_5V} $\geq$ 0.8\,mm)\\
\rowcolor{HelgenMist} Impedance & Not controlled --- USB 2.0 FS service port only (audit M5: functional-grade; next spin routes D$\pm$ as a pair + ESD array)\\
Vias & Tented (default); EP stitching under U6/U2/U7 to In1\\
\rowcolor{HelgenMist} Mounting & 4$\times$ 3.2\,mm (MH1--4) at 4--5\,mm edge margins --- M3 brass standoffs\\
Order & 5\,pcs minimum; PCBA = \textbf{Standard} (QFN/fine pitch); SMD by JLC, THT hand-soldered per order guide\\
\bottomrule
\end{tabular}
\end{center}

Fab exports live in \texttt{kicad/production/} (Fabrication Toolkit: Gerbers + BOM.csv + CPL, regenerated \emph{after} the final Rev 1.1 save). The stale \texttt{fab-jlc-usb/} package is superseded --- do not order from it (audit M6).

% ------------------------------------------------------------------ 6
\section{Schematic --- Rev 1.1 full sheet}
\label{sec:schematic}
The complete Rev 1.1 production schematic (all blocks A--K + USB service port, post-audit state: Q7 S/D corrected, Q5/Q6 BEC map, RIG1/RDFU1 22\,k$\Omega$) is reproduced on the following page, exported from \texttt{kicad/hbox-watchdog-v3-PROD.kicad\_sch} \emph{after} the 2026-07-07 closure save. The vector original lives at \texttt{assets/schematic-rev11.pdf} --- zoom there for net-level reading; this page is the archival copy. \textbf{Reminder: sch$\leftrightarrow$board sync on this project is manual (F8 retired)} --- if the schematic changes, the board does not follow automatically.

\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/schematic-rev11.pdf}

% ------------------------------------------------------------------ 7
\section{PCB layer plots \& assembly view}
\label{sec:layers}
Per-layer copper plots of the routed board (135.1$\times$100.1\,mm, 1317 tracks, 249 vias), each with \texttt{Edge.Cuts} overlaid and the KiCad title block, exported from the Rev 1.1 \texttt{.kicad\_pcb}. All plots are viewed \textbf{from the top} (X-ray convention --- B.Cu is \emph{not} mirrored). Originals in \texttt{assets/layers/}.

\begin{center}
\small
\begin{tabular}{@{}llL{9.2cm}@{}}
\toprule
\rowcolor{HelgenIndigo}\textcolor{white}{\textbf{Page}} & \textcolor{white}{\textbf{Layer}} & \textcolor{white}{\textbf{Content}}\\
\midrule
1 & F.Cu & Top copper: power routing (PWR\_HI 1.5\,mm / PWR\_MID 1.0\,mm incl.\ \net{SW\_IN}), module socket fields, LTC4040 block\\
\rowcolor{HelgenMist} 2 & In1.Cu & Solid GND plane (stitched; EP thermal ties for U6/U2/U7)\\
3 & In2.Cu & Inner signal (autoroute overflow; no pour --- audit L7)\\
\rowcolor{HelgenMist} 4 & B.Cu & Bottom copper: signal + sense routing\\
5 & F.SilkS & Assembly view: silkscreen + outline, DNP footprints crossed out (P3/P13/H3)\\
\bottomrule
\end{tabular}
\end{center}

\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/layers/hbox-watchdog-v3-PROD-F_Cu.pdf}
\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/layers/hbox-watchdog-v3-PROD-In1_Cu.pdf}
\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/layers/hbox-watchdog-v3-PROD-In2_Cu.pdf}
\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/layers/hbox-watchdog-v3-PROD-B_Cu.pdf}
\includepdf[pages=1,landscape,pagecommand={\thispagestyle{fancy}}]{assets/board-assembly-top.pdf}

% ------------------------------------------------------------------ 8
\section{Production BOMs (synchronized)}
\label{sec:boms}
Both tables below are \textbf{generated} --- do not edit here. Source of truth: \texttt{helgen\_einarboard\_1.0\_production\_bom.xlsx}; regenerate both with \texttt{tools/sync\_bom.py}.

\subsection{Internal PCBA BOM (per board --- JLC order)}
\IfFileExists{pcba_bom.tex}{\input{pcba_bom.tex}}{\emph{pcba\_bom.tex missing --- run \texttt{python3 tools/sync\_bom.py} first.}}

\subsection{External Integration BOM (per HBOX unit --- Helgen procurement)}
Everything the unit needs \emph{around} the PCBA: enclosure set (HBOX-135100), the three plug-in modules, antennas, the 1S4P pack, cabinet-side power and panel hardware, and the pre-wired JST harnesses. Order these in parallel with the boards --- module lead times (ArduSimple) usually pace the build, not the PCB.

\IfFileExists{external_bom.tex}{\input{external_bom.tex}}{\emph{external\_bom.tex missing --- run \texttt{python3 tools/sync\_bom.py} first.}}

% ------------------------------------------------------------------ 7
\section{Assembly \& field warnings}
\begin{enumerate}
\item \textbf{Switchless simpleRTK2B Pro variants} --- see \S\ref{sec:mod1}: XBee socket empty on both revisions; switch (if present) parked on UART1; \textbf{never} the Pro's USB-XBee port in service.
\item \textbf{P11 cutoff} ships with a jumper plug when no panel switch is fitted --- an open P11 is a dead unit that looks like a field failure.
\item \textbf{GX16 pin 3 = raw ignition.} Harnesses must feed 12--24\,V machine ignition, \emph{not} a pre-conditioned 5\,V (the DFR1015 stage no longer exists).
\item \textbf{Battery pack}: 1S4P only, cell NTC bonded and wired to P4.3 --- the charger owns that NTC. Verify the 4.00\,V strap set (JP2/3/4) before connecting a pack.
\item \textbf{Modules are hand-fitted} after PCBA; they are never on the JLC BOM. Seat the Pro with the notch/silk alignment --- D0/D1 reversal is fatal to the GNSS UART and invisible electrically.
\item \textbf{IP67 discipline}: conduction cooling only; thermal pads from pack/modem hotspot to the enclosure wall; no vents.
\item \textbf{CPL rotation spot-check} at JLC review: LTC4040 (QFN-24) and both MP1584 (SOIC-8-EP) orientations, plus Q7 --- rotation errors are the \#1 PCBA failure and H1 taught us what a reversed Q7 costs.
\end{enumerate}

% ------------------------------------------------------------------ 8
\section{Order readiness \& open gates}
\label{sec:readiness}
\begin{itemize}
\item \textbf{CLEARED:} H1--H4 fixed and re-verified (ERC 0 / DRC 0); M3 closed on a physical Pro; M4 (HBOX mechanical fit) verified 2026-07-07; fab package regenerated after the last save. \textbf{Bare-board order: RELEASED.}
\item \textbf{OPEN --- M1 remainder (PCBA):} specialty + semiconductor LCSC numbers are verified and baked into the schematic (18 pinned lines); passives ride JLC auto-match at upload; DNP attributes on P3/P13/H3 confirmed in Rev 1.1. Re-confirm live stock at upload --- the pacing item is parts, not fab.
\item \textbf{OPEN --- M2 (deliberate risk posture):} the declared fab gate --- \emph{bench-validate the LTC4040 backup transition + hot-cell charge cutoff} --- remains unmet by the TP4056 proto. Bare boards at 5\,pcs are the cheap, conscious way to retire it; \textbf{do not commit the 30-unit PCBA run before the LTC4040 block passes on real copper.}
\item \textbf{Known-accepted:} USB service port is functional-grade (M5); D4G dim at 1.8\,V drive (L4); L7 saturation margin thin vs 2\,A modem peak (L5) --- 3\,A part next spin.
\end{itemize}

% ------------------------------------------------------------------ APPENDIX
\section*{Appendix --- BOM synchronization toolchain}
\textbf{Single source of truth = the Excel workbook.} Flow:
\begin{enumerate}
\item \texttt{python3 tools/generate\_production\_bom.py} --- (re)builds \texttt{helgen\_einarboard\_1.0\_production\_bom.xlsx} (Summary + Internal PCBA + External Integration, Helgen palette, live line-cost and cross-sheet roll-up formulas).
\item Edit costs/parts in Excel as quotes land (or edit the generator and re-run).
\item \texttt{python3 tools/sync\_bom.py} --- extracts the \emph{Internal PCBA BOM} and \emph{External Integration BOM} tabs, drops section bars / blanks / TOTAL rows, escapes LaTeX reserved tokens (\&, \_, \%, \$, \#, \{\}, \textasciitilde, \textasciicircum, \textbackslash), recomputes line costs, writes \texttt{pcba\_bom.tex} + \texttt{external\_bom.tex}.
\item \texttt{pdflatex einarboard-manual.tex} $\times2$ --- the manual ingests both snippets via \texttt{\textbackslash input\{\}}.
\end{enumerate}
\textbf{Drawing assets} (\texttt{assets/}): \texttt{schematic-rev11.pdf} (full A2 sheet) + \texttt{layers/} (per-layer plots) + \texttt{board-assembly-top.pdf} are exported from the Rev 1.1 KiCad files via kicad-cli (KiCad MCP) --- re-export after \emph{any} board/schematic save, or the manual silently archives stale copper. The Jun-22 \texttt{watchdog-pcb-v3-blockdiagram.svg} predates the carrier conversion and is deliberately \emph{not} included.
KiCad board $\leftrightarrow$ schematic sync on this project is \textbf{manual} (F8 retired after the refdes-duplication incident) --- never let a BOM edit imply a netlist push.

\vspace{6mm}
\begin{center}
{\color{HelgenCyan}\rule{0.6\linewidth}{1.2pt}}\\[2mm]
{\small\color{HelgenSlate} Helgen Technologies --- precise, fail-safe first. \\ Canonical electrical state: \texttt{watchdog-electrical-design-state.md} $\cdot$ Audit: \texttt{2026-07-06\_Drogheda\_EinarBoard-1.0-PreFab-Audit\_v1.0.md}}
\end{center}

\end{document}