Drogheda/scripts
Claude (Cowork) d4795539e7 v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6
T0  hbox-watchdog-v6.{sch,pcb,pro,dru} forked from v5.5 @ e6ac8cc (new files on main,
    same precedent as v4 -> v5). All internal project refs renamed, paren-balanced.
T1  Deleted the simpleRTK2B Pro socket (MOD1), both XBee sockets (J7/J8) and the modem
    reset button (SW4G1) from schematic and PCB, plus the 25 on-pin labels that carried
    their connectivity. The schematic has ZERO wires - connectivity is labels on pins -
    so no wire/junction surgery was needed.
T2  Relay K1 pin 10 (NO contact) moves from PA9 /USART1_TX to PC6 /USART6_TX, giving the
    MCU ownership of the modem RX line while K1 de-energised still feeds the receiver's
    GGA straight to the modem (MCU-dead fail-safe). PA9 freed -> no_connect. USART6_RX
    added on PC7. Retired /USART1_TX copper ripped (7 items).

Verified: /USART6_TX = U16.37 + K1.10 | /USART1_RX = U16.43 + Rdfu1.1 + K1.1 | PA9 free.
Nets awaiting T3/T4 silicon: /DOUT_4G, /MODEM_RST, /GNSS_TX, /GNSS_RX, /USART6_RX.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
2026-08-24 22:51:21 +00:00
..
2026-08-12_einarboard30_phaseA_gen_blockP.py auto-sync 2026-08-12 18:00 2026-08-12 18:00:16 -06:00
2026-08-12_einarboard30_phaseB2_revision.py auto-sync 2026-08-12 18:00 2026-08-12 18:00:16 -06:00
2026-08-12_einarboard30_phaseB_gen_placement.py auto-sync 2026-08-12 18:00 2026-08-12 18:00:16 -06:00
2026-08-24_v6_T1_delete_sockets.py v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6 2026-08-24 22:51:21 +00:00
2026-08-24_v6_T2_k1_to_pc6.py v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6 2026-08-24 22:51:21 +00:00
prep_order_release.sh auto-sync 2026-07-07 18:00 2026-07-07 18:00:12 -06:00