d4795539e7
T0 hbox-watchdog-v6.{sch,pcb,pro,dru} forked from v5.5 @ e6ac8cc (new files on main,
same precedent as v4 -> v5). All internal project refs renamed, paren-balanced.
T1 Deleted the simpleRTK2B Pro socket (MOD1), both XBee sockets (J7/J8) and the modem
reset button (SW4G1) from schematic and PCB, plus the 25 on-pin labels that carried
their connectivity. The schematic has ZERO wires - connectivity is labels on pins -
so no wire/junction surgery was needed.
T2 Relay K1 pin 10 (NO contact) moves from PA9 /USART1_TX to PC6 /USART6_TX, giving the
MCU ownership of the modem RX line while K1 de-energised still feeds the receiver's
GGA straight to the modem (MCU-dead fail-safe). PA9 freed -> no_connect. USART6_RX
added on PC7. Retired /USART1_TX copper ripped (7 items).
Verified: /USART6_TX = U16.37 + K1.10 | /USART1_RX = U16.43 + Rdfu1.1 + K1.1 | PA9 free.
Nets awaiting T3/T4 silicon: /DOUT_4G, /MODEM_RST, /GNSS_TX, /GNSS_RX, /USART6_RX.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
158 lines
6.3 KiB
Python
158 lines
6.3 KiB
Python
#!/usr/bin/env python3
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"""v6 T1 - delete MOD1, J7, J8, SW4G1 from hbox-watchdog-v6 (sch symbols + on-pin labels, pcb footprints).
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The v5/v6 schematic has ZERO wires: connectivity is 100% labels placed on pin coordinates.
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So deleting a symbol = delete its (symbol ...) block + the (label ...) blocks sitting on its pins.
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Usage: python3 2026-08-24_v6_T1_delete_sockets.py [--apply]
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Default is a DRY RUN that prints exactly what would be removed.
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"""
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import re, sys, os, shutil
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KI = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', '03-Architecture-Hardware', 'kicad')
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SCH = os.path.join(KI, 'hbox-watchdog-v6.kicad_sch')
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PCB = os.path.join(KI, 'hbox-watchdog-v6.kicad_pcb')
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APPLY = '--apply' in sys.argv
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REFS = ['MOD1', 'J7', 'J8', 'SW4G1']
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# (name, x, y) of every label sitting on a pin of a deleted symbol - surveyed 2026-08-24
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LABELS = [
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# MOD1 (simpleRTK2B Pro socket)
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('3V3', 484.378, 94.488), ('SW_5V', 484.378, 86.868),
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('GND', 484.378, 99.568), ('GND', 484.378, 102.108),
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('GND', 484.378, 104.648),
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('GNSS_RX', 453.898, 86.868), ('GNSS_TX', 453.898, 89.408),
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('DOUT_4G', 453.898, 91.948), ('USART1_RX', 453.898, 94.488),
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# J7 (XBee row 1)
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('3V3_MODEM', 398.272, 39.116), ('DOUT_4G', 398.272, 41.656),
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('DIN_4G', 398.272, 44.196), ('GND', 398.272, 46.736),
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('MODEM_RST', 398.272, 49.276), ('USB_VBUS', 398.272, 51.816),
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('USB_DP', 398.272, 54.356), ('USB_DM', 398.272, 56.896),
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('GND', 398.272, 61.976),
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# J8 (XBee row 2)
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('GND', 420.878, 39.624), ('GND', 420.878, 52.324),
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('3V3_MODEM', 420.878, 54.864), ('MODEM_LED', 420.198, 57.334),
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('GND', 420.878, 62.484),
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# SW4G1 (modem reset button)
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('MODEM_RST', 17.780, 276.860), ('GND', 40.640, 275.590),
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]
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def spans(text, opener):
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"""Yield (start, end) byte spans of every top-level s-expression beginning with `opener`."""
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out = []
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for m in re.finditer(re.escape(opener), text):
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i = m.start(); depth = 0; instr = False; esc = False; j = i
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while j < len(text):
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ch = text[j]
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if esc: esc = False
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elif ch == '\\': esc = True
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elif ch == '"': instr = not instr
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elif not instr:
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if ch == '(': depth += 1
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elif ch == ')':
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depth -= 1
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if depth == 0:
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out.append((i, j + 1)); break
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j += 1
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return out
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def cut(text, spans_to_cut):
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for a, b in sorted(spans_to_cut, reverse=True):
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# also swallow a single trailing newline + leading tabs so the file stays tidy
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while a > 0 and text[a-1] in '\t':
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a -= 1
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if a > 0 and text[a-1] == '\n':
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a -= 1
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text = text[:a] + text[b:]
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return text
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# ---------------- schematic ----------------
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sch = open(SCH, encoding='utf-8').read()
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kill, report = [], []
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for a, b in spans(sch, '\n\t(symbol\n'):
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blk = sch[a:b]
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m = re.search(r'\(property "Reference" "([^"]+)"', blk)
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if m and m.group(1) in REFS:
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lib = re.search(r'\(lib_id "([^"]+)"', blk)
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kill.append((a, b)); report.append(f" symbol {m.group(1):<8} {lib.group(1) if lib else '?':<44} {b-a:>6} B")
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lab_spans = []
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for kind in ('(label ', '(global_label ', '(hierarchical_label '):
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lab_spans += spans(sch, '\n\t' + kind)
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found = set()
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for a, b in lab_spans:
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blk = sch[a:b]
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m = re.match(r'\s*\((?:label|global_label|hierarchical_label) "([^"]+)"\s*\n\s*\(at ([-\d.]+) ([-\d.]+)', blk)
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if not m: continue
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name, x, y = m.group(1), float(m.group(2)), float(m.group(3))
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for (ln, lx, ly) in LABELS:
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if name == ln and abs(x-lx) < 0.01 and abs(y-ly) < 0.01:
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kill.append((a, b)); found.add((ln, lx, ly))
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report.append(f" label {name:<14} ({x}, {y})")
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break
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missing = [l for l in LABELS if l not in found]
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print(f"--- SCHEMATIC {os.path.basename(SCH)} ---")
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print("\n".join(report))
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print(f" => {len(kill)} blocks ({len(REFS)} symbols + {len(found)}/{len(LABELS)} labels)")
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if missing:
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print(" !! LABELS NOT FOUND (investigate before applying):")
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for l in missing: print(" ", l)
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new_sch = cut(sch, kill)
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# ---------------- pcb ----------------
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pcb = open(PCB, encoding='utf-8').read()
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pkill, preport = [], []
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for a, b in spans(pcb, '\n\t(footprint '):
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blk = pcb[a:b]
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m = re.search(r'\(property "Reference" "([^"]+)"', blk)
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if m and m.group(1) in REFS:
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npad = len(re.findall(r'\n\t\t\(pad ', blk))
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pkill.append((a, b)); preport.append(f" footprint {m.group(1):<8} pads={npad:<3} {b-a:>7} B")
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print(f"\n--- PCB {os.path.basename(PCB)} ---")
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print("\n".join(preport))
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print(f" => {len(pkill)} footprints")
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new_pcb = cut(pcb, pkill)
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# nets that lose members -> report orphaned copper for the layout phase
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orphan_nets = ['/DOUT_4G', '/DIN_4G', '/MODEM_RST', '/MODEM_LED', '/3V3_MODEM',
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'/USB_VBUS', '/USB_DP', '/USB_DM', '/GNSS_RX', '/GNSS_TX', '/USART1_RX', '/SW_5V']
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print("\n--- copper still on affected nets (clean up in the layout phase) ---")
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for n in orphan_nets:
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seg = len(re.findall(r'\(segment(?:(?!\(segment).)*?\(net "' + re.escape(n) + r'"\)', new_pcb, re.S))
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via = len(re.findall(r'\(via(?:(?!\(via).)*?\(net "' + re.escape(n) + r'"\)', new_pcb, re.S))
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print(f" {n:<14} segments={seg:<4} vias={via}")
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def balanced(t):
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d = 0; instr = False; esc = False
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for ch in t:
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if esc: esc = False; continue
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if ch == '\\': esc = True; continue
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if ch == '"': instr = not instr; continue
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if instr: continue
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if ch == '(': d += 1
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elif ch == ')':
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d -= 1
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if d < 0: return None
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return d
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print(f"\nparen balance sch={balanced(new_sch)} pcb={balanced(new_pcb)}")
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if not APPLY:
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print("\nDRY RUN - nothing written. Re-run with --apply to commit the edit.")
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sys.exit(0)
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if missing:
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sys.exit("REFUSING to apply: some labels were not found.")
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if balanced(new_sch) != 0 or balanced(new_pcb) != 0:
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sys.exit("REFUSING to apply: paren imbalance.")
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shutil.copy2(SCH, SCH + '.T1bak'); shutil.copy2(PCB, PCB + '.T1bak')
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open(SCH, 'w', encoding='utf-8').write(new_sch)
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open(PCB, 'w', encoding='utf-8').write(new_pcb)
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print("\nAPPLIED. Backups: *.T1bak")
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