The .kicad_dru held one unconditional (min 0.15mm). A custom rule outranks
the netclass table and an unconditional rule matches every pair on the board,
so it was silently overriding the HV24 netclass's 0.5 mm everywhere: the
netclass said 0.5, DRC only ever enforced 0.15.
Rule file, three mutually-exclusive rules so order and specificity agree:
1. neither item HV24 -> 0.15 mm (unchanged)
2. either item HV24 -> 0.50 mm
3. except U2 pad-to-pad (its own land pattern)-> 0.15 mm
Rule 3 covers exactly one pair: U2 (MP1584EN, SOIC-8-EP) pad 7 (24V) to pad 9
(exposed thermal pad, GND) at 0.355 mm. That is the manufacturer's qualified
land pattern, set by the package and not by routing. U2's courtyard contains
9 pads and all 9 belong to U2, so the condition cannot match foreign copper;
the 24 foreign tracks/vias crossing that courtyard are excluded by the
A.Type == 'Pad' test and stay at the full 0.5 mm.
Copper: 13 of the 14 HV24-to-foreign gaps under 0.5 mm were routing, and all
13 are fixed. No component was moved or rotated.
3 width reductions (a narrower track can never reduce a clearance):
479e5357 24V -> U2.7 1.0 -> 0.6 U2's pads are 0.6 tall, so the
pad was already the bottleneck
854214dc FREQ_FAN -> U2.6 1.0 -> 0.6 1.14 mm long, R~0.93 mohm,
~8 mV at 3 A; IPC-2221 gives
~1.9 A at 10 C rise for 0.6 mm
30ed4012 24V -> DzG1.3 1.5 -> 0.8 leaf branch into a BZX84C15
SOT-23 clamp, sub-mA
5 track-vertex moves (never a via centre, never a pad centre):
/3V3_MODEM x3 corridor walks 0.55 mm east off the 24V bus
/USB_CC2 x2 opposite ends of one 6.05 mm segment pivot apart, opening
pad Rrp1.1 and the GND via at the same time
Verification (shapely geometry over every pad/via/track, diffed against the
unedited baseline so nothing pre-existing is miscounted as new):
HV24 inter-item pairs under 0.5 mm 13 -> 0
cross-footprint pairs under 0.15 mm 0 (unchanged)
pairs this edit created 0 at 0.15, 0 at 0.30, 0 at 0.50
per-net connectivity 180/180 nets whole, 0 orphan copper clusters
static DRC 0 violations, byte-identical to the C13 run
fab sweep 0 findings (edge clearance, drills, annular rings, outline)
thinnest new margin 0.5650 mm (pad Rrp1.1 <-> trk 1fed5fbb), looser than
five pre-existing HV24 pairs on this board
/24V_IN and IGN_IN copper byte-identical; 24V differs only in two width tokens
Pour reflow: the 0.5 mm rule widens the zone pullback around HV24 from 0.3 to
0.5 mm. Simulated the refill on all four pours at both values — the anchor
partition is identical (F.Cu 547 anchors / 35 groups, B.Cu 222/2, In1 33/5,
In2 220/7), so pressing B strands nothing. Area loss 115 mm2 on F.Cu, 4.6 mm2
on each of the other three.
Press B to refill zones before running DRC.
|
||
|---|---|---|
| _brand | ||
| .claude/skills/project-drogheda | ||
| 00-Project-Management | ||
| 01-Requirements | ||
| 02-Architecture-Software | ||
| 03-Architecture-Hardware | ||
| 04-Source-Code | ||
| 05-Analytics-Reports | ||
| 06-Testing-Validation | ||
| 99-Archive | ||
| Marketing | ||
| mcpmarket-me | ||
| scripts | ||
| .gitignore | ||
| .gitmodules | ||
| CLAUDE.md | ||
| mcpmarket-plugin-me.zip | ||
| README.md | ||
Project Drogheda (GPS RTK)
Helgen Technologies' HBOX RTK GPS tracker fleet for Hutchison Ports heavy
equipment (ICAVE / TIMSA / EIT / LCT) — centimetre-class position over 4G, streamed to the
Helgen backend (retranslator → Wialon/Traccar → VERONICA), built to survive a hot, salty,
high-vibration port environment.
New here? Read
00-Project-Management/Engineering-Handover.mdfirst. It is the deep context: product, failure analysis, fixes, repo map, open items, glossary. This README is the 2-minute orientation;CLAUDE.mdis the terse machine index.
Where we are (2026-06-20 · updated 2026-07-02)
2026-07-02: backend deployed + stable; thermal chamber run done; 3-board protoboard campaign in flight (units to ICAVE 7-jul). Watchdog v3 PROD schematic is complete (ERC 0) — LTC4040 battery-backup sized to the 12 Ah pack, fail-safe Modo-B relay bypass — and the PCB is now a 120×100 carrier board: Blackpill + simpleRTK2B Pro (UNO-shield sockets) + 4G NTRIP Master (on-board XBee socket) all on female headers. Layout in placement review; fab gate = proto bench validation. Canonical:
03-Architecture-Hardware/watchdog-electrical-design-state.md.
We deployed a first batch of HBOX trackers on ICAVE machines in Veracruz. They worked "ish," then failed. We are mid-crisis, hardening for scale — target 30 units by August. The failure is three independent fronts, fixed in parallel:
- Backend (confirmed in code) —
retranslator.pyhead-of-line blocks the whole fleet on slow upstream, and an anti-jump filter can permanently black-hole a healthy unit. - Thermal — an ASA case (UV-stable, ~95–100 °C — adequate) sealed in a sealed IP67 cabinet that also holds the heat-generating Mean Well PSU, in full sun → nested heat trap for the battery / boost / modem (not the case).
- Prototype hardware — Dupont + hand-wiring + 18650/PowerBoost; fragile under vibration.
Units: all pulled — 4 in hand (3 dead, 1 working-ish) in Veracruz; team in Querétaro → remote debug. Field firmware is v1 (no thermal log).
Free triage: a unit ONLINE in htracker but OFFLINE in Wialon is a backend victim, not dead hardware. Check that before condemning a radio.
The product in one breath
Rover (HBOX) on the machine + Base Station (Ardusimple AS-PRO-CORS, 110/230 V) publishing RTCM3 corrections over NTRIP. The rover gets corrections over the 4G modem, not the GNSS → recover a dead link by power-cycling the 4G stack, never a GNSS reset. HBOX core: simpleRTK2B Pro (ZED-F9P) · 4G NTRIP Master · STM32F411 watchdog · Mean Well SD-15B-05 (24→5 V) · PowerBoost + 18650 · GX16-5 to the cabinet. 24 V is the production variant.
Invariants (never violate)
- Power-off is the safe state. 2. Never vanish, never loop. 3. Corrections ride the 4G modem, not the GNSS. 4. No material that softens below ~80 °C (PLA-class) in the thermal path — the ASA enclosure complies; design to measured cabinet temperature. 5. Backend forwards without head-of-line blocking; anti-jump never locks out a healthy unit. 6. No secrets in the repo (the committed MSSQL password is a live violation to rotate).
Repo layout
00-Project-Management (plan, ethos, financials, handover, Drive tooling) ·
01-Requirements (SRS, product spec, tracker) · 02-Architecture-Software (backend review) ·
03-Architecture-Hardware (cabinet/HBOX, BOM, PCB brief, watchdog, manual) ·
04-Source-Code (firmware/ · htracker/ · notifications/) ·
05-Analytics-Reports (SQL views — placeholder) · 06-Testing-Validation (RCA, diagnostics) ·
Marketing (datasheet, brochure) · _brand (LaTeX style) · 99-Archive (raw inputs).
Quick start
# Branded docs (XeLaTeX; League Spartan + MADE Evolve Sans):
cd 01-Requirements/HBOX-Ficha-Tecnica && latexmk -xelatex main.tex
# Firmware (own repo 'hbox-firmware', at 04-Source-Code/firmware):
# open blackpillrtkcode_v2/blackpillrtkcode_v2.ino in the STM32duino toolchain.
# ⚠ Bench-test before any field flash — the sandbox cannot build STM32.
# Backend: 04-Source-Code/htracker (ssh://git.helgen.dev:6611/htracker, feature/test500unidades)
Storage model (one home per artifact)
This repo = working source of truth (editable .md/.tex, code). Google Drive
Drogheda (GPS RTK) = finalized exports (branded PDFs, native Docs/Sheets). Second Brain
vault = distilled decisions/lessons. Author in repo → export final to Drive → distill to
vault. Drive upload how-to + mapping: 00-Project-Management/Drive-Upload/README.md. Never
change Drive sharing — that's Leo's call.
Go deeper
- Deep context / onboarding →
00-Project-Management/Engineering-Handover.md - Current priorities →
00-Project-Management/PLAN.md - Machine index →
CLAUDE.md - Failure analysis →
06-Testing-Validation/RCA-2026-06-field-failures.md