v6 T3 CLOSED: Leo's Update-PCB-from-Schematic - Block N on the board; -04B pin table verified
PCB (Leo, KiCad GUI 14:44): U18 + U21 + C119-C124 + R105 placed in the GNSS island (U18 at 76.8, 101.4 r90 - freed MOD1 area, bottom-left). All nets verified on the board: /3V3_GNSS 9 pads, U18 GND = 56 pads (8 + the 48-pad ground array), MCU side confirmed (ANT_DETECT U16.9, ANT_SHORT_N U16.10, RTK_STAT U16.11, TIMEPULSE U16.23, RESET_N U16.53). The sync also deleted MH7/MH9/MH10 - exactly the shield-bolt holes the delta doc retired; MH4/5/6 (enclosure) and MH11 (heatsink clamp) survive. Footprints 224 -> 230. Schematic diff vs previous commit: none (243 symbols / 666 labels / 125 no-connects identical) - KiCad format normalization only. -04B PIN CHECK CLOSED: the ZED-F9P-04B datasheet (UBX-21044850) pin table matches the -15B transcription EXACTLY, all 54 pins. Spec refinement: VCC ramp is a WINDOW, 20-8000 us/V (3.3 V in 66 us .. 26.4 ms) - a normal LDO soft-start sits comfortably inside it. Keep the bench measurement, drop the alarm. NEXT: T4 LTE island. Needs the vendor part first: easyeda2kicad --full --lcsc_id=C18548276 --output <kicad>/Drogheda-v6 Standing: v6 zone fills still stale (GUI refill pending); DRC not meaningful until then. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
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