v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6
T0 hbox-watchdog-v6.{sch,pcb,pro,dru} forked from v5.5 @ e6ac8cc (new files on main,
same precedent as v4 -> v5). All internal project refs renamed, paren-balanced.
T1 Deleted the simpleRTK2B Pro socket (MOD1), both XBee sockets (J7/J8) and the modem
reset button (SW4G1) from schematic and PCB, plus the 25 on-pin labels that carried
their connectivity. The schematic has ZERO wires - connectivity is labels on pins -
so no wire/junction surgery was needed.
T2 Relay K1 pin 10 (NO contact) moves from PA9 /USART1_TX to PC6 /USART6_TX, giving the
MCU ownership of the modem RX line while K1 de-energised still feeds the receiver's
GGA straight to the modem (MCU-dead fail-safe). PA9 freed -> no_connect. USART6_RX
added on PC7. Retired /USART1_TX copper ripped (7 items).
Verified: /USART6_TX = U16.37 + K1.10 | /USART1_RX = U16.43 + Rdfu1.1 + K1.1 | PA9 free.
Nets awaiting T3/T4 silicon: /DOUT_4G, /MODEM_RST, /GNSS_TX, /GNSS_RX, /USART6_RX.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
This commit is contained in:
Claude (Cowork)
parent
e6ac8cc808
commit
d4795539e7
18
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_dru
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18
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_dru
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@ -0,0 +1,18 @@
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(version 1)
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(rule "Minimum clearance 1"
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(constraint clearance (min 0.15mm))
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(condition "A.NetClass != 'HV24' && B.NetClass != 'HV24'")
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)
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(rule "HV24 clearance"
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(constraint clearance (min 0.5mm))
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(condition "(A.NetClass == 'HV24' || B.NetClass == 'HV24') && !(A.Type == 'Pad' && B.Type == 'Pad' && A.memberOfFootprint('U2') && B.memberOfFootprint('U2'))")
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)
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(rule "HV24 exception: MP1584EN land pattern"
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(constraint clearance (min 0.15mm))
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(condition "A.Type == 'Pad' && B.Type == 'Pad' && A.memberOfFootprint('U2') && B.memberOfFootprint('U2')")
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)
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(rule "Minimum text height and thickness 1"
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(layer "F.Silkscreen")
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(constraint text_height (min 0.5mm))
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(constraint text_thickness (min 0.1mm))
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)
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91822
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_pcb
Normal file
91822
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_pcb
Normal file
File diff suppressed because it is too large
Load Diff
875
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_pro
Normal file
875
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_pro
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@ -0,0 +1,875 @@
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"apply_defaults_to_fp_barcodes": false,
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||||
"apply_defaults_to_fp_dimensions": false,
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"apply_defaults_to_fp_fields": false,
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||||
"apply_defaults_to_fp_shapes": false,
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||||
"apply_defaults_to_fp_text": false,
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||||
"board_outline_line_width": 0.05,
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||||
"copper_line_width": 0.2,
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||||
"copper_text_italic": false,
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||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
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||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.05,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
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"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": true,
|
||||
"text_position": 0,
|
||||
"units_format": 0
|
||||
},
|
||||
"fab_line_width": 0.1,
|
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"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.1,
|
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"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
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"other_text_upright": false,
|
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"pads": {
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"drill": 0.0,
|
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"height": 0.95,
|
||||
"width": 0.8
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||||
},
|
||||
"silk_line_width": 0.1,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.1,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"border_display_style": 2,
|
||||
"border_hatch_pitch": 0.5,
|
||||
"corner_radius": 0.0,
|
||||
"corner_smoothing": 0,
|
||||
"fill_mode": 0,
|
||||
"hatch_gap": 1.5,
|
||||
"hatch_orientation": 0.0,
|
||||
"hatch_smoothing_level": 0,
|
||||
"hatch_smoothing_value": 0.1,
|
||||
"hatch_thickness": 1.0,
|
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"min_clearance": 0.3,
|
||||
"min_island_area": 10.0,
|
||||
"min_thickness": 0.25,
|
||||
"pad_connection": 1,
|
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"remove_islands": 0,
|
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"thermal_relief_gap": 0.5,
|
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"thermal_relief_spoke_width": 0.5
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}
|
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},
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"diff_pair_dimensions": [
|
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{
|
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"gap": 0.0,
|
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"via_gap": 0.0,
|
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"width": 0.0
|
||||
}
|
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],
|
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"drc_exclusions": [],
|
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"meta": {
|
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"version": 2
|
||||
},
|
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"rule_severities": {
|
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"annular_width": "error",
|
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"clearance": "error",
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"connection_width": "warning",
|
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"copper_edge_clearance": "error",
|
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"copper_sliver": "warning",
|
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"courtyards_overlap": "error",
|
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"creepage": "error",
|
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"diff_pair_gap_out_of_range": "error",
|
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"diff_pair_uncoupled_length_too_long": "error",
|
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"drill_out_of_range": "error",
|
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"duplicate_footprints": "warning",
|
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"extra_footprint": "warning",
|
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"footprint": "error",
|
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"footprint_filters_mismatch": "ignore",
|
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"footprint_symbol_field_mismatch": "warning",
|
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"footprint_symbol_mismatch": "warning",
|
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"footprint_type_mismatch": "ignore",
|
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"hole_clearance": "error",
|
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"hole_to_hole": "warning",
|
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"holes_co_located": "warning",
|
||||
"invalid_outline": "error",
|
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"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
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"items_not_allowed": "error",
|
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"length_out_of_range": "error",
|
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"lib_footprint_issues": "warning",
|
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"lib_footprint_mismatch": "warning",
|
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"malformed_courtyard": "error",
|
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"microvia_drill_out_of_range": "error",
|
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"mirrored_text_on_front_layer": "warning",
|
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"missing_courtyard": "ignore",
|
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"missing_footprint": "warning",
|
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"missing_tuning_profile": "warning",
|
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"net_conflict": "warning",
|
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"nonmirrored_text_on_back_layer": "warning",
|
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"npth_inside_courtyard": "error",
|
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"padstack": "warning",
|
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"pth_inside_courtyard": "error",
|
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
|
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"silk_over_copper": "warning",
|
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"silk_overlap": "warning",
|
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"skew_out_of_range": "error",
|
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
|
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"text_height": "warning",
|
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"text_on_edge_cuts": "error",
|
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"text_thickness": "warning",
|
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"through_hole_pad_without_hole": "error",
|
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"too_many_vias": "error",
|
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"track_angle": "error",
|
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"track_dangling": "warning",
|
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"track_not_centered_on_via": "ignore",
|
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"track_on_post_machined_layer": "error",
|
||||
"track_segment_length": "error",
|
||||
"track_width": "error",
|
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"tracks_crossing": "error",
|
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"tuning_profile_track_geometries": "ignore",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zones_intersect": "error"
|
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},
|
||||
"rules": {
|
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"max_error": 0.005,
|
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"min_clearance": 0.0,
|
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"min_connection": 0.0,
|
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"min_copper_edge_clearance": 0.5,
|
||||
"min_groove_width": 0.0,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.2,
|
||||
"min_microvia_drill": 0.1,
|
||||
"min_resolved_spokes": 2,
|
||||
"min_silk_clearance": 0.0,
|
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"min_text_height": 0.8,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.2,
|
||||
"min_via_annular_width": 0.1,
|
||||
"min_via_diameter": 0.5,
|
||||
"solder_mask_to_copper_clearance": 0.005,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"teardrop_options": [
|
||||
{
|
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"td_onpthpad": true,
|
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"td_onroundshapesonly": false,
|
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"td_onsmdpad": true,
|
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"td_ontrackend": false,
|
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"td_onvia": true
|
||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
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{
|
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"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
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"td_length_ratio": 0.5,
|
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"td_maxheight": 2.0,
|
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"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_target_name": "td_round_shape",
|
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"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
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"td_curve_segcount": 0,
|
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"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_target_name": "td_rect_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
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"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
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"td_target_name": "td_track_end",
|
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"td_width_to_size_filter_ratio": 0.9
|
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}
|
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],
|
||||
"track_widths": [
|
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0.0,
|
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0.01,
|
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0.15,
|
||||
0.25,
|
||||
0.3,
|
||||
0.5,
|
||||
1.0
|
||||
],
|
||||
"tuning_pattern_settings": {
|
||||
"diff_pair_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 1.0
|
||||
},
|
||||
"diff_pair_skew_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 0.6
|
||||
},
|
||||
"single_track_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 0.6
|
||||
}
|
||||
},
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.3,
|
||||
"drill": 0.15
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false
|
||||
},
|
||||
"filename": "hbox-watchdog-v6.kicad_pcb",
|
||||
"ipc2581": {
|
||||
"bom_rev": "",
|
||||
"dist": "",
|
||||
"distpn": "",
|
||||
"internal_id": "",
|
||||
"mfg": "",
|
||||
"mpn": "",
|
||||
"sch_revision": "1.1"
|
||||
},
|
||||
"layer_pairs": [],
|
||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"component_class_settings": {
|
||||
"assignments": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"sheet_component_classes": {
|
||||
"enabled": false
|
||||
}
|
||||
},
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
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|
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|
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|
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|
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|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "ignore",
|
||||
"extra_units": "error",
|
||||
"field_name_whitespace": "warning",
|
||||
"footprint_filter": "ignore",
|
||||
"footprint_link_issues": "warning",
|
||||
"four_way_junction": "ignore",
|
||||
"ground_pin_not_ground": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"isolated_pin_label": "warning",
|
||||
"label_dangling": "error",
|
||||
"label_multiple_wires": "warning",
|
||||
"lib_symbol_issues": "warning",
|
||||
"lib_symbol_mismatch": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"same_local_global_label": "warning",
|
||||
"similar_label_and_power": "warning",
|
||||
"similar_labels": "warning",
|
||||
"similar_power": "warning",
|
||||
"simulation_model_issue": "ignore",
|
||||
"single_global_label": "ignore",
|
||||
"stacked_pin_name": "warning",
|
||||
"unannotated": "error",
|
||||
"unconnected_wire_endpoint": "warning",
|
||||
"undefined_netclass": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "hbox-watchdog-v6.kicad_pro",
|
||||
"version": 3
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 2147483647,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"tuning_profile": "",
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
},
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.5,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "HV24",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 0,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.5,
|
||||
"tuning_profile": "",
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6
|
||||
},
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "PWR_HI",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 0,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 1.5,
|
||||
"tuning_profile": "",
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6
|
||||
},
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "PWR_MID",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 1,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 1.0,
|
||||
"tuning_profile": "",
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 5
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": [
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "BAT_PLUS"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "SW_BAT"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "MAIN5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "VEH5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "SYS5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "VIN_SW"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "SW_5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "3V3_MODEM"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "5V_FAN"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "SW_FAN"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "SW3_NODE"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "FAN_RET"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "SW_IN"
|
||||
},
|
||||
{
|
||||
"netclass": "HV24",
|
||||
"pattern": "/24V_IN"
|
||||
},
|
||||
{
|
||||
"netclass": "HV24",
|
||||
"pattern": "24V"
|
||||
},
|
||||
{
|
||||
"netclass": "HV24",
|
||||
"pattern": "IGN_IN"
|
||||
},
|
||||
{
|
||||
"netclass": "HV24",
|
||||
"pattern": "Q10_GATE"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/BAT_PLUS"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/SW_BAT"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/MAIN5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/VEH5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/SYS5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_HI",
|
||||
"pattern": "/VIN_SW"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/SW_5V"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/3V3_MODEM"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/5V_FAN"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/SW_FAN"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/SW3_NODE"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/FAN_RET"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/SW_IN"
|
||||
},
|
||||
{
|
||||
"netclass": "PWR_MID",
|
||||
"pattern": "/3V3_ETH"
|
||||
}
|
||||
]
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"idf": "",
|
||||
"netlist": "./",
|
||||
"plot": "",
|
||||
"specctra_dsn": "hbox-watchdog-v6-PROD.dsn",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"annotation": {
|
||||
"method": 0,
|
||||
"sort_order": 0
|
||||
},
|
||||
"bom_export_filename": "${PROJECTNAME}.csv",
|
||||
"bom_fmt_presets": [],
|
||||
"bom_fmt_settings": {
|
||||
"field_delimiter": ",",
|
||||
"keep_line_breaks": false,
|
||||
"keep_tabs": false,
|
||||
"name": "CSV",
|
||||
"ref_delimiter": ",",
|
||||
"ref_range_delimiter": "",
|
||||
"string_delimiter": "\""
|
||||
},
|
||||
"bom_presets": [],
|
||||
"bom_settings": {
|
||||
"exclude_dnp": false,
|
||||
"fields_ordered": [
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Reference",
|
||||
"name": "Reference",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Qty",
|
||||
"name": "${QUANTITY}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Value",
|
||||
"name": "Value",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "DNP",
|
||||
"name": "${DNP}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Exclude from BOM",
|
||||
"name": "${EXCLUDE_FROM_BOM}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Exclude from Board",
|
||||
"name": "${EXCLUDE_FROM_BOARD}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Footprint",
|
||||
"name": "Footprint",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Datasheet",
|
||||
"name": "Datasheet",
|
||||
"show": true
|
||||
}
|
||||
],
|
||||
"filter_string": "",
|
||||
"group_symbols": true,
|
||||
"include_excluded_from_bom": true,
|
||||
"name": "Default Editing",
|
||||
"sort_asc": true,
|
||||
"sort_field": "Reference"
|
||||
},
|
||||
"bus_aliases": {},
|
||||
"connection_grid_size": 50.0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"hop_over_size_choice": 0,
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"operating_point_overlay_i_precision": 3,
|
||||
"operating_point_overlay_i_range": "~A",
|
||||
"operating_point_overlay_v_precision": 3,
|
||||
"operating_point_overlay_v_range": "~V",
|
||||
"overbar_offset_ratio": 1.23,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"reuse_designators": true,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0,
|
||||
"top_level_sheets": [
|
||||
{
|
||||
"filename": "hbox-watchdog-v6.kicad_sch",
|
||||
"name": "hbox-watchdog-v3",
|
||||
"uuid": "561403b3-895e-4153-a7be-3876ae930d43"
|
||||
}
|
||||
],
|
||||
"used_designators": "DzG1,Rts1,Rg1,Rrp1,Ccomp1,#PWR1-4,Rig1,Rigb1,D4G1,Rled1,Rdfu1,Rtp1,Cbst1,Rgs1,Rfreq1,Dbk1,Rcomp1,Rmled1,SW4G1",
|
||||
"variants": []
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"561403b3-895e-4153-a7be-3876ae930d43",
|
||||
"hbox-watchdog-v3"
|
||||
]
|
||||
],
|
||||
"text_variables": {},
|
||||
"tuning_profiles": {
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"tuning_profiles_impedance_geometric": []
|
||||
}
|
||||
}
|
||||
48642
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch
Normal file
48642
03-Architecture-Hardware/kicad/hbox-watchdog-v6.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
157
scripts/2026-08-24_v6_T1_delete_sockets.py
Normal file
157
scripts/2026-08-24_v6_T1_delete_sockets.py
Normal file
@ -0,0 +1,157 @@
|
||||
#!/usr/bin/env python3
|
||||
"""v6 T1 - delete MOD1, J7, J8, SW4G1 from hbox-watchdog-v6 (sch symbols + on-pin labels, pcb footprints).
|
||||
|
||||
The v5/v6 schematic has ZERO wires: connectivity is 100% labels placed on pin coordinates.
|
||||
So deleting a symbol = delete its (symbol ...) block + the (label ...) blocks sitting on its pins.
|
||||
|
||||
Usage: python3 2026-08-24_v6_T1_delete_sockets.py [--apply]
|
||||
Default is a DRY RUN that prints exactly what would be removed.
|
||||
"""
|
||||
import re, sys, os, shutil
|
||||
|
||||
KI = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', '03-Architecture-Hardware', 'kicad')
|
||||
SCH = os.path.join(KI, 'hbox-watchdog-v6.kicad_sch')
|
||||
PCB = os.path.join(KI, 'hbox-watchdog-v6.kicad_pcb')
|
||||
APPLY = '--apply' in sys.argv
|
||||
|
||||
REFS = ['MOD1', 'J7', 'J8', 'SW4G1']
|
||||
|
||||
# (name, x, y) of every label sitting on a pin of a deleted symbol - surveyed 2026-08-24
|
||||
LABELS = [
|
||||
# MOD1 (simpleRTK2B Pro socket)
|
||||
('3V3', 484.378, 94.488), ('SW_5V', 484.378, 86.868),
|
||||
('GND', 484.378, 99.568), ('GND', 484.378, 102.108),
|
||||
('GND', 484.378, 104.648),
|
||||
('GNSS_RX', 453.898, 86.868), ('GNSS_TX', 453.898, 89.408),
|
||||
('DOUT_4G', 453.898, 91.948), ('USART1_RX', 453.898, 94.488),
|
||||
# J7 (XBee row 1)
|
||||
('3V3_MODEM', 398.272, 39.116), ('DOUT_4G', 398.272, 41.656),
|
||||
('DIN_4G', 398.272, 44.196), ('GND', 398.272, 46.736),
|
||||
('MODEM_RST', 398.272, 49.276), ('USB_VBUS', 398.272, 51.816),
|
||||
('USB_DP', 398.272, 54.356), ('USB_DM', 398.272, 56.896),
|
||||
('GND', 398.272, 61.976),
|
||||
# J8 (XBee row 2)
|
||||
('GND', 420.878, 39.624), ('GND', 420.878, 52.324),
|
||||
('3V3_MODEM', 420.878, 54.864), ('MODEM_LED', 420.198, 57.334),
|
||||
('GND', 420.878, 62.484),
|
||||
# SW4G1 (modem reset button)
|
||||
('MODEM_RST', 17.780, 276.860), ('GND', 40.640, 275.590),
|
||||
]
|
||||
|
||||
def spans(text, opener):
|
||||
"""Yield (start, end) byte spans of every top-level s-expression beginning with `opener`."""
|
||||
out = []
|
||||
for m in re.finditer(re.escape(opener), text):
|
||||
i = m.start(); depth = 0; instr = False; esc = False; j = i
|
||||
while j < len(text):
|
||||
ch = text[j]
|
||||
if esc: esc = False
|
||||
elif ch == '\\': esc = True
|
||||
elif ch == '"': instr = not instr
|
||||
elif not instr:
|
||||
if ch == '(': depth += 1
|
||||
elif ch == ')':
|
||||
depth -= 1
|
||||
if depth == 0:
|
||||
out.append((i, j + 1)); break
|
||||
j += 1
|
||||
return out
|
||||
|
||||
def cut(text, spans_to_cut):
|
||||
for a, b in sorted(spans_to_cut, reverse=True):
|
||||
# also swallow a single trailing newline + leading tabs so the file stays tidy
|
||||
while a > 0 and text[a-1] in '\t':
|
||||
a -= 1
|
||||
if a > 0 and text[a-1] == '\n':
|
||||
a -= 1
|
||||
text = text[:a] + text[b:]
|
||||
return text
|
||||
|
||||
# ---------------- schematic ----------------
|
||||
sch = open(SCH, encoding='utf-8').read()
|
||||
kill, report = [], []
|
||||
|
||||
for a, b in spans(sch, '\n\t(symbol\n'):
|
||||
blk = sch[a:b]
|
||||
m = re.search(r'\(property "Reference" "([^"]+)"', blk)
|
||||
if m and m.group(1) in REFS:
|
||||
lib = re.search(r'\(lib_id "([^"]+)"', blk)
|
||||
kill.append((a, b)); report.append(f" symbol {m.group(1):<8} {lib.group(1) if lib else '?':<44} {b-a:>6} B")
|
||||
|
||||
lab_spans = []
|
||||
for kind in ('(label ', '(global_label ', '(hierarchical_label '):
|
||||
lab_spans += spans(sch, '\n\t' + kind)
|
||||
found = set()
|
||||
for a, b in lab_spans:
|
||||
blk = sch[a:b]
|
||||
m = re.match(r'\s*\((?:label|global_label|hierarchical_label) "([^"]+)"\s*\n\s*\(at ([-\d.]+) ([-\d.]+)', blk)
|
||||
if not m: continue
|
||||
name, x, y = m.group(1), float(m.group(2)), float(m.group(3))
|
||||
for (ln, lx, ly) in LABELS:
|
||||
if name == ln and abs(x-lx) < 0.01 and abs(y-ly) < 0.01:
|
||||
kill.append((a, b)); found.add((ln, lx, ly))
|
||||
report.append(f" label {name:<14} ({x}, {y})")
|
||||
break
|
||||
|
||||
missing = [l for l in LABELS if l not in found]
|
||||
|
||||
print(f"--- SCHEMATIC {os.path.basename(SCH)} ---")
|
||||
print("\n".join(report))
|
||||
print(f" => {len(kill)} blocks ({len(REFS)} symbols + {len(found)}/{len(LABELS)} labels)")
|
||||
if missing:
|
||||
print(" !! LABELS NOT FOUND (investigate before applying):")
|
||||
for l in missing: print(" ", l)
|
||||
|
||||
new_sch = cut(sch, kill)
|
||||
|
||||
# ---------------- pcb ----------------
|
||||
pcb = open(PCB, encoding='utf-8').read()
|
||||
pkill, preport = [], []
|
||||
for a, b in spans(pcb, '\n\t(footprint '):
|
||||
blk = pcb[a:b]
|
||||
m = re.search(r'\(property "Reference" "([^"]+)"', blk)
|
||||
if m and m.group(1) in REFS:
|
||||
npad = len(re.findall(r'\n\t\t\(pad ', blk))
|
||||
pkill.append((a, b)); preport.append(f" footprint {m.group(1):<8} pads={npad:<3} {b-a:>7} B")
|
||||
print(f"\n--- PCB {os.path.basename(PCB)} ---")
|
||||
print("\n".join(preport))
|
||||
print(f" => {len(pkill)} footprints")
|
||||
|
||||
new_pcb = cut(pcb, pkill)
|
||||
|
||||
# nets that lose members -> report orphaned copper for the layout phase
|
||||
orphan_nets = ['/DOUT_4G', '/DIN_4G', '/MODEM_RST', '/MODEM_LED', '/3V3_MODEM',
|
||||
'/USB_VBUS', '/USB_DP', '/USB_DM', '/GNSS_RX', '/GNSS_TX', '/USART1_RX', '/SW_5V']
|
||||
print("\n--- copper still on affected nets (clean up in the layout phase) ---")
|
||||
for n in orphan_nets:
|
||||
seg = len(re.findall(r'\(segment(?:(?!\(segment).)*?\(net "' + re.escape(n) + r'"\)', new_pcb, re.S))
|
||||
via = len(re.findall(r'\(via(?:(?!\(via).)*?\(net "' + re.escape(n) + r'"\)', new_pcb, re.S))
|
||||
print(f" {n:<14} segments={seg:<4} vias={via}")
|
||||
|
||||
def balanced(t):
|
||||
d = 0; instr = False; esc = False
|
||||
for ch in t:
|
||||
if esc: esc = False; continue
|
||||
if ch == '\\': esc = True; continue
|
||||
if ch == '"': instr = not instr; continue
|
||||
if instr: continue
|
||||
if ch == '(': d += 1
|
||||
elif ch == ')':
|
||||
d -= 1
|
||||
if d < 0: return None
|
||||
return d
|
||||
|
||||
print(f"\nparen balance sch={balanced(new_sch)} pcb={balanced(new_pcb)}")
|
||||
|
||||
if not APPLY:
|
||||
print("\nDRY RUN - nothing written. Re-run with --apply to commit the edit.")
|
||||
sys.exit(0)
|
||||
if missing:
|
||||
sys.exit("REFUSING to apply: some labels were not found.")
|
||||
if balanced(new_sch) != 0 or balanced(new_pcb) != 0:
|
||||
sys.exit("REFUSING to apply: paren imbalance.")
|
||||
|
||||
shutil.copy2(SCH, SCH + '.T1bak'); shutil.copy2(PCB, PCB + '.T1bak')
|
||||
open(SCH, 'w', encoding='utf-8').write(new_sch)
|
||||
open(PCB, 'w', encoding='utf-8').write(new_pcb)
|
||||
print("\nAPPLIED. Backups: *.T1bak")
|
||||
134
scripts/2026-08-24_v6_T2_k1_to_pc6.py
Normal file
134
scripts/2026-08-24_v6_T2_k1_to_pc6.py
Normal file
@ -0,0 +1,134 @@
|
||||
#!/usr/bin/env python3
|
||||
"""v6 T2 - move K1 pin 10 (relay NO) from PA9 /USART1_TX to PC6 /USART6_TX.
|
||||
|
||||
This is the one-net change that lets the MCU own the modem's RX line (AT commands,
|
||||
byte-exact GGA forwarding, $PHLG injection) while keeping the MCU-dead fail-safe:
|
||||
de-energised, K1's NC contact still feeds the receiver's GGA straight to the modem.
|
||||
|
||||
Schematic (label-only connectivity):
|
||||
- rename USART1_TX @ (513.588, 182.372) -> USART6_TX [K1 pin 10]
|
||||
- delete USART1_TX @ (518.16, 416.56) + add a no_connect [U16 PA9, now free]
|
||||
- add USART6_TX @ (482.6, 431.8) [U16 PC6]
|
||||
- add USART6_RX @ (482.6, 434.34) [U16 PC7]
|
||||
PCB:
|
||||
- K1 pad 10 /USART1_TX -> /USART6_TX
|
||||
- U16 pad 37 -> /USART6_TX ; pad 38 -> /USART6_RX ; pad 42 -> unconnected
|
||||
- rip all copper on the retired /USART1_TX net (it joined PA9 to K1.10)
|
||||
|
||||
Usage: python3 2026-08-24_v6_T2_k1_to_pc6.py [--apply]
|
||||
"""
|
||||
import re, sys, os, shutil, uuid
|
||||
|
||||
KI = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', '03-Architecture-Hardware', 'kicad')
|
||||
SCH = os.path.join(KI, 'hbox-watchdog-v6.kicad_sch')
|
||||
PCB = os.path.join(KI, 'hbox-watchdog-v6.kicad_pcb')
|
||||
APPLY = '--apply' in sys.argv
|
||||
|
||||
def span_from(text, i):
|
||||
d = 0; instr = False; esc = False; j = i
|
||||
while j < len(text):
|
||||
ch = text[j]
|
||||
if esc: esc = False
|
||||
elif ch == '\\': esc = True
|
||||
elif ch == '"': instr = not instr
|
||||
elif not instr:
|
||||
if ch == '(': d += 1
|
||||
elif ch == ')':
|
||||
d -= 1
|
||||
if d == 0: return j + 1
|
||||
j += 1
|
||||
raise ValueError('unbalanced')
|
||||
|
||||
def find_label(text, name, x, y):
|
||||
for m in re.finditer(r'\(label "' + re.escape(name) + r'"\s*\n\s*\(at ([-\d.]+) ([-\d.]+) (\d+)\)', text):
|
||||
if abs(float(m.group(1)) - x) < 0.01 and abs(float(m.group(2)) - y) < 0.01:
|
||||
return m.start(), span_from(text, m.start()), int(m.group(3))
|
||||
return None
|
||||
|
||||
def mklabel(name, x, y, rot, justify):
|
||||
return ('\n\t(label "%s"\n\t\t(at %s %s %d)\n\t\t(effects\n\t\t\t(font\n\t\t\t\t(size 1.27 1.27)\n'
|
||||
'\t\t\t)\n\t\t\t(justify %s)\n\t\t)\n\t\t(uuid "%s")\n\t)') % (name, x, y, rot, justify, uuid.uuid4())
|
||||
|
||||
def mknc(x, y):
|
||||
return '\n\t(no_connect\n\t\t(at %s %s)\n\t\t(uuid "%s")\n\t)' % (x, y, uuid.uuid4())
|
||||
|
||||
sch = open(SCH, encoding='utf-8').read()
|
||||
log = []
|
||||
|
||||
# 1. K1 pin 10 label -> USART6_TX
|
||||
hit = find_label(sch, 'USART1_TX', 513.588, 182.372)
|
||||
if not hit: sys.exit('K1.10 USART1_TX label not found')
|
||||
a, b, rot = hit
|
||||
sch = sch[:a] + sch[a:b].replace('"USART1_TX"', '"USART6_TX"', 1) + sch[b:]
|
||||
log.append(' rename USART1_TX -> USART6_TX @ (513.588, 182.372) [K1 pin 10 / relay NO]')
|
||||
|
||||
# 2. U16 PA9 label -> gone, no_connect in its place
|
||||
hit = find_label(sch, 'USART1_TX', 518.16, 416.56)
|
||||
if not hit: sys.exit('U16 PA9 USART1_TX label not found')
|
||||
a, b, rot = hit
|
||||
sch = sch[:a] + mknc('518.16', '416.56') + sch[b:]
|
||||
log.append(' delete USART1_TX @ (518.16, 416.56) -> no_connect [U16 PA9, freed -> test point later]')
|
||||
|
||||
# 3+4. new labels on PC6 / PC7 (left column of U16: rot 180, justify right bottom)
|
||||
anchor = sch.find('\n\t(label "ETH_INT"')
|
||||
ins = span_from(sch, anchor + 1)
|
||||
add = mklabel('USART6_TX', '482.6', '431.8', 180, 'right bottom') + \
|
||||
mklabel('USART6_RX', '482.6', '434.34', 180, 'right bottom')
|
||||
sch = sch[:ins] + add + sch[ins:]
|
||||
log.append(' add USART6_TX @ (482.6, 431.8) [U16 PC6 / USART6_TX]')
|
||||
log.append(' add USART6_RX @ (482.6, 434.34) [U16 PC7 / USART6_RX]')
|
||||
|
||||
# ---------------- PCB ----------------
|
||||
pcb = open(PCB, encoding='utf-8').read()
|
||||
plog = []
|
||||
|
||||
def set_pad_net(text, ref, pad, newnet):
|
||||
m = re.search(r'\n\t\(footprint (?:(?!\n\t\(footprint ).)*?\(property "Reference" "' + re.escape(ref) + r'"(?:(?!\n\t\(footprint ).)*', text, re.S)
|
||||
if not m: raise ValueError('footprint %s not found' % ref)
|
||||
seg = m.group(0)
|
||||
pm = re.search(r'\(pad "' + re.escape(pad) + r'"(?:(?!\(pad ").)*?\(net "([^"]*)"\)', seg, re.S)
|
||||
if not pm: raise ValueError('pad %s.%s not found' % (ref, pad))
|
||||
old = pm.group(1)
|
||||
newseg = seg[:pm.start(1)] + newnet + seg[pm.end(1):]
|
||||
plog.append(' %-5s pad %-3s %-34s -> %s' % (ref, pad, old, newnet))
|
||||
return text[:m.start()] + newseg + text[m.end():]
|
||||
|
||||
pcb = set_pad_net(pcb, 'K1', '10', '/USART6_TX')
|
||||
pcb = set_pad_net(pcb, 'U16', '37', '/USART6_TX')
|
||||
pcb = set_pad_net(pcb, 'U16', '38', '/USART6_RX')
|
||||
pcb = set_pad_net(pcb, 'U16', '42', 'unconnected-(U16-PA9-Pad42)')
|
||||
|
||||
# rip retired /USART1_TX copper
|
||||
cuts = []
|
||||
for kw in ('\n\t(segment', '\n\t(via'):
|
||||
for m in re.finditer(re.escape(kw), pcb):
|
||||
e = span_from(pcb, m.start() + 1)
|
||||
if '(net "/USART1_TX")' in pcb[m.start():e]:
|
||||
cuts.append((m.start(), e))
|
||||
for a, b in sorted(cuts, reverse=True):
|
||||
pcb = pcb[:a] + pcb[b:]
|
||||
plog.append(' ripped %d copper items on the retired /USART1_TX net' % len(cuts))
|
||||
|
||||
print('--- SCHEMATIC ---'); print('\n'.join(log))
|
||||
print('--- PCB ---'); print('\n'.join(plog))
|
||||
|
||||
def bal(t):
|
||||
d = 0; instr = False; esc = False
|
||||
for ch in t:
|
||||
if esc: esc = False; continue
|
||||
if ch == '\\': esc = True; continue
|
||||
if ch == '"': instr = not instr; continue
|
||||
if instr: continue
|
||||
if ch == '(': d += 1
|
||||
elif ch == ')': d -= 1
|
||||
return d
|
||||
print('\nparen balance sch=%s pcb=%s' % (bal(sch), bal(pcb)))
|
||||
|
||||
if not APPLY:
|
||||
print('\nDRY RUN - nothing written. Re-run with --apply.')
|
||||
sys.exit(0)
|
||||
if bal(sch) or bal(pcb): sys.exit('REFUSING: paren imbalance')
|
||||
shutil.copy2(SCH, SCH + '.T2bak'); shutil.copy2(PCB, PCB + '.T2bak')
|
||||
open(SCH, 'w', encoding='utf-8').write(sch)
|
||||
open(PCB, 'w', encoding='utf-8').write(pcb)
|
||||
print('\nAPPLIED. Backups: *.T2bak')
|
||||
Loading…
Reference in New Issue
Block a user