HBOX Watchdog v3 PROD — JLCPCB Order Guide

Board: kicad/hbox-watchdog-v3-PROD.kicad_pcb — 132 footprints, 135.1 × 100.1 mm, 4-layer (F.Cu / In1.Cu = GND plane / In2.Cu / B.Cu). Verified: 0 shorts, 0 unconnected, DRC clean (parity net-name/refdes warnings are cosmetic — the copper is correct).

Goal: fastest turnaround with assembly. The pacing item is always parts stock (LCSC), not the fab — so the checklist front-loads that.

Step 1 — Generate the fab files (in KiCad)

Fastest, least error-prone: install the "JLCPCB Fabrication Toolkit" KiCad plugin (Plugin and Content Manager → search "Fabrication Toolkit", by Bennymeg). One click produces a production/ folder with Gerbers.zip + BOM.csv + CPL(positions).csv already in JLC's format (correct rotations, LCSC column). This is the recommended route.

Manual route if you prefer:

Gerbers + drill: File → Fabrication Outputs → Gerbers → include all copper + Edge.Cuts + silk + mask + paste; then Drill Files (PTH+NPTH, Excellon, mm). Zip everything together.
Placement / CPL: File → Fabrication Outputs → Component Placement → CSV, mm, both sides.
BOM: Tools → Generate Legacy BOM (or the JLC toolkit). Must carry an LCSC part number per assembled part.

Step 2 — Order the bare PCB (JLCPCB PCB settings)

Upload the Gerber zip; JLC auto-reads size/layers. Set:

Setting	Value	Note
Layers	4	required — In1 is the GND plane
Dimensions	135.1 × 100.1 mm	auto-detected
Thickness	1.6 mm	JLC applies its standard 4-layer stackup
Material	FR-4
Surface finish	ENIG (recommended)	you have a QFN (LTC4040) + fine-pitch — ENIG solders far better than HASL. +~$ / +1 day
Outer copper	1 oz	standard
Min track/space	0.15 mm present	well within JLC 4-layer (they do 0.09 mm)
Impedance control	No	USB2 is low-speed here; not routed as controlled-impedance
Via / tenting	Tented (default)

Step 3 — Assembly (turn on "PCB Assembly")

Assembly side: Top (bulk of SMD is top-side).
PCBA type: Standard (you have a QFN + fine-pitch + SOIC-EP; Economic can't place those).
Upload the BOM.csv and CPL/positions.csv. JLC matches parts by LCSC #.

What JLC assembles vs. what you don't — three buckets

A. JLC solders (SMD) — YES. ~98 SMD parts: all 0603/0805 R & C, the LEDs, SOT-23 FETs (Q1/Q2/Q4/Q5/Q6 + AO3401/AO3400), LTC4040 (QFN-24), 2× MP1584EN (SOIC-8-EP), AO4406A, IRFR5305, SHT40 + TMP102, SS34/BAT54/Zeners, Bourns SRU8028 inductors, PPTC fuse, the new USB-C (J9), 2× 5.1k CC, tactile reset (SW4G), LED + 1k. These need LCSC numbers (Step 3b).

THT parts — assemble only if worth it. Connectors (Phoenix P1, JST P2/P3/P5/P6/P8/P10/P12/P13), the 3 module sockets (J1/J2 Blackpill, MOD1 Arduino, J7/J8 XBee 2 mm), K1 relay (G5V-1), SW1 tactile, radial electrolytics (C3/C10/C43). JLC charges a per-joint THT fee + some of these (Phoenix, big JSTs) aren't in their library. → Recommended for speed + cost: JLC does SMD only; you hand-solder the THT. It's ~20 through-hole parts and keeps the order simple.

B. Modules — DO NOT put on the JLC BOM. Blackpill (into J1/J2), simpleRTK2B Pro (into MOD1), 4G NTRIP Master (into J7/J8). You hand-fit these after the PCBA arrives. Mark them DNP/excluded.

DNP to confirm: engineering notes flagged P3 / P13 / H3 as redundant (Modo-B + K1 bypass). Decide per-connector before ordering — mark DNP in the BOM if dropping them.

Step 3b — LCSC part numbers (the real pre-order task)

Every assembled part needs an LCSC # in the BOM. This is the bottleneck, so:

Assign LCSC #s in KiCad (add an LCSC field per symbol) or paste them in JLC's BOM editor after upload (it suggests matches).
Prefer JLC "Basic" parts (0603/0805 R & C, common SOT-23, LEDs) — no extended-part fee, no reel-loading delay.
Check stock now for the specialty parts — these decide your lead time: LTC4040EUFD, SHT40-AD1B, TMP102, MP1584EN, AO4406A, IRFR5305, Bourns SRU8028 (2.2/10 µH). If any is out of stock → pick an LCSC alternate, or pull it to hand-solder, rather than let the whole order wait on one part.

Step 4 — Fastest turnaround levers

Parts stock is the pacing item. One out-of-stock LCSC part holds the entire PCBA. Verify stock before you submit; swap or hand-solder anything back-ordered.
Bare 4-layer fab is ~2–3 days; PCBA adds ~2–5 days depending on parts + review.
ENIG costs ~1 day vs HASL — keep ENIG (worth it for the QFN); the day is minor next to parts lead time.
Order 5 pcs (JLC minimum) — right for this proto run; you need ~3–4 anyway.
Respond fast to JLC's DFM/part-substitution review email (that's often where days are lost).

Pre-order checklist

production/ folder generated (Gerbers.zip + BOM.csv + CPL.csv) — Fabrication Toolkit.
BOM: SMD parts each have an in-stock LCSC #; modules excluded; P3/P13/H3 DNP decided.
Specialty parts (LTC4040, SHT40, TMP102, MP1584, AO4406A, Bourns L) — stock confirmed or swapped.
Decide THT: JLC-assemble vs hand-solder (recommend hand-solder the ~20 THT).
Spot-check a few CPL rotations against JLC's library (QFN/SOIC/SOT-23 orientation) — the #1 PCBA error. The Fabrication Toolkit usually gets these right; verify LTC4040 and the MP1584s.
PCB: 4-layer, 1.6 mm, ENIG.
Order 5 pcs.

Reference: part buckets in Assembly-BOM-Split.md. Board file: kicad/hbox-watchdog-v3-PROD.kicad_pcb.

5.9 KiB Raw Blame History Unescape Escape