Drogheda/03-Architecture-Hardware/4G-USB-Reset-LED-addition.md

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---
title: HBOX v3 — 4G modem USB / Reset / LED / power-pin fix (build spec)
project: Project Drogheda
date: 2026-07-05
status: SCHEMATIC COMPLETE (ERC 0 errors) — board sync + place + route to finish in KiCad GUI
tags: [project-drogheda, hardware, 4g, usb, revision]
---
# 4G NTRIP module — add USB, reset, LED + fix required power pins
Goal: firmware-update and reset the 4G modem **in place** on the EINARBoard (no more
swapping it to the simpleRTK), and wire the module's **mandatory** pins that are
currently floating.
## Module pin map (XBee-form, per datasheet) → EINARBoard socket
J7 = module pins 1–10 (row 1), J8 = module pins 11–20 (row 2, numbered 20→11 top-to-bottom).
| Module pin | Function | Socket pad | Current | Action |
|---|---|---|---|---|
| 1 VCC | 3.3–3.6 V, 2 A pk | J7.1 | 3V3_MODEM ✓ | keep |
| 2 TX | data out | J7.2 | DOUT_4G ✓ | keep |
| 3 RX | data in | J7.3 | DIN_4G ✓ | keep |
| 4 GND | ground | J7.4 | **NC** | → GND |
| 5 RESET | low = reset | J7.5 | **NC** | → reset button → GND |
| 6 V_USB | 5 V enables USB | J7.6 | **NC** | → USB VBUS (5 V) |
| 7 USB+ | USB D+ | J7.7 | **NC** | → USB D+ |
| 8 USB− | USB D− | J7.8 | **NC** | → USB D− |
| 9 DTR | disabled | J7.9 | NC | leave |
| 10 GND | ground | J7.10 | GND ✓ | keep |
| 11 GND | ground | **J8.10** | **NC** | → GND |
| 12 CTS | disabled | J8.9 | NC | leave |
| 13 LED | 1.8 V LED drive | **J8.8** | **NC** | → R + LED → GND |
| 14 VREF | **must = VCC** | **J8.7** | **NC** | → 3V3_MODEM |
| 15 GND | ground | **J8.6** | **NC** | → GND |
| 16 RTS | disabled | J8.5 | NC | leave |
| 20 ON/OFF | **GND = always ON** | **J8.1** | **NC** | → GND |
> ⚠️ **Must-fix even if we skipped USB:** VREF (J8.7→VCC) and ON/OFF (J8.1→GND). Without
> ON/OFF tied low the modem may never power on. Confirm J8 pad numbers vs. the Ardusimple
> footprint before wiring.
## Parts to add
| Ref | Part | Notes |
|---|---|---|
| J9 | **USB-C receptacle, USB 2.0** (e.g. GCT USB4085 / TYPE-C-31-M-12) | D+/D−, VBUS, GND, 2×CC |
| R_cc1, R_cc2 | 5.1 kΩ 0402/0603 | CC1, CC2 → GND (device-mode detect, required for Type-C) |
| R_dp, R_dm | 0 Ω (optional series) | in D+/D− if you want the option; can be DNP |
| SW_4G | tactile 6 mm (or SMD) | RESET(J7.5) ↔ GND |
| D_4G | LED 0805 | anode ← R_led ← LED(J8.8); cathode → GND |
| R_led | ~1 kΩ | LED current limit (pin sources 1.8 V) |
## New nets
`USB_VBUS` (→ J7.6 V_USB + USB-C VBUS), `USB_DP` (J7.7 ↔ USB-C D+), `USB_DM` (J7.8 ↔ USB-C D−),
`MODEM_RST` (J7.5 ↔ SW_4G ↔ GND), `MODEM_LED` (J8.8 ↔ R_led ↔ D_4G ↔ GND).
Reuse existing `3V3_MODEM` for VREF, `GND` for ON/OFF + spare grounds.
## Placement
Open pocket **right of / below the XBee sockets** (board ≈ x200–212, y76–98). USB-C at the
board edge (mechanical access), button + LED beside it.
## Routing
- **USB D+/D−**: keep the pair together and short; USB-2.0 FS/HS firmware speed is forgiving —
no controlled-impedance needed, just route them side-by-side, similar length, GND nearby.
- Everything else is low-speed/DC — trivial.
- Do it by adding to the **schematic first** → re-import → place → FreeRoute the new nets
(lock existing routing) → DRC → re-export fab.
---
## STATUS 2026-07-05 — what's done, what's left
**DONE (in the schematic `hbox-watchdog-v3-PROD.kicad_sch`, verified ERC 0 errors):**
- Modem must-fix pins wired: **J8.1→GND (ON/OFF), J8.7→3V3_MODEM (VREF), J8.6/J8.10/J7.4→GND**.
- New parts added + net-labelled: **J9** USB-C (USB_C_Receptacle_USB2.0_14P, fp GCT_USB4085),
**Rcc1/Rcc2** 5.1k, **SW4G** reset (CK_PTS636 SMD), **Rmled** 1k, **D4G** LED (0805).
- All connections: USB_VBUS→J7.6, USB_DP→J7.7, USB_DM→J7.8, MODEM_RST→J7.5+SW4G, MODEM_LED→J8.8
chain, CC resistors→GND, USB-C VBUS/GND/CC/D±. (Verified on a trial board sync — J7/J8 pads
took the right nets.)
- Fixed a reference collision: the schematic already had a `Rled` (10k, live circuit); the new
LED resistor is **`Rmled`** so the existing part is untouched.
**LEFT (do in the KiCad GUI — the MCP's board backend left spurious DRC shorts on sync, so the
board was reverted to its clean pre-USB state; the schematic is the source of truth):**
1. **Tools → Update PCB from Schematic (F8)** — pulls in J9, Rcc1, Rcc2, SW4G, Rmled, D4G and
assigns the modem-pin nets. (GUI F8 is clean; don't use the MCP sync.)
2. **Place** the 6 parts in the pocket right of the XBee (board coords, mm):
| Ref | x | y | note |
|---|---|---|---|
| J9 (USB-C) | 199.5 | 79 | fills pocket; pads clear J8 (left) & P3 (right) |
| Rcc1 | 198.5 | 75.3 | CC1 5.1k, row above J9 |
| Rcc2 | 201.2 | 75.3 | CC2 5.1k |
| Rmled | 203.9 | 75.3 | LED 1k |
| D4G | 206.4 | 75.3 | LED |
| SW4G | 202.5 | 90 | reset, in the strip below the y≈87.5 trace |
Courtyard "kisses" with J8/P3 are OK (pads clear) — same as the board's existing by-design kisses.
3. **Route 9 nets.** GND pads (J9 grounds+shields, Rcc·2, SW4G·2, D4G·1) drop to the In1 GND plane
with a via each (THT grounds auto-connect). Signals: USB_VBUS/DP/DM run J7.6/7/8 → J9 (under the
module is fine); MODEM_RST J7.5→SW4G; MODEM_LED J8.8→Rmled→D4G; CC1/CC2 J9→Rcc. Keep D+/D-
together. **FreeRouting** the ratsnest is the fast path (as before).
4. **Fill All Zones (B)** → **DRC** → should be back to the pre-existing cosmetic set (0 shorts).
5. **Re-export the JLCPCB fab package** (`fab-jlcpcb/`) — the current zip predates all of this.
Backup of the clean board kept at `kicad/hbox-watchdog-v3-PROD.kicad_pcb.bak-preusb`.