195 lines
9.5 KiB
Markdown
195 lines
9.5 KiB
Markdown
---
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tags: [project-drogheda, firmware, power, battery, thermal]
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project: Project Drogheda
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author: Helgen CTO
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date: 2026-09-09
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status: Draft — design proposal
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---
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# Backup mode: duty-cycled low power, and what it does to the charging problem
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> **Bottom line:** yes, do the duty-cycle. But **the wake interval barely matters — the
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> sleep floor is everything.** 10 min vs 60 min changes runtime by 2 %. Dropping the
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> sleeping draw from 150 mW to 20 mW changes it by **5.5×**. And the payoff is bigger than
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> runtime: at ~1.5 Wh/day the pack needs **~10 minutes of charging a day**, which the
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> narrow cool window we already have can supply. **The duty-cycle largely dissolves the
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> temperature problem** — that is the real reason to do it.
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---
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## 1. "Can't we just move the charge temperature?"
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The **threshold** is ours (`RNTB`). The **limit** is the cell's. Charging an NMC/LCO 18650
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at 55 °C is not a tuning choice — it is accelerated SEI growth, gas generation and a safety
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liability inside a sealed IP67 box in full sun. Not something to ship on 30 units.
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What you *can* legitimately buy, without changing the cell:
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- **Lower the float.** Damage rate is temperature × voltage × time. You are already at
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4.00 V rather than 4.20 V, which is most of the win. `JP3`/`JP4` → F1=0/F0=0 gives
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**3.95 V** and a little more margin. That justifies nudging the hot pause to maybe
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**48–50 °C** *if the cell's datasheet supports it*. A few degrees, not fifteen.
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- Anything beyond that needs a cell rated for it — see the high-temp LFP note.
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**But read §3 before deciding any of this.**
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---
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## 2. Duty-cycled backup — the numbers
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Pack ~43 Wh, 85 % usable = **36.5 Wh**. Boost efficiency 88 %.
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**Today, continuous:** ~2.5 W at the 5 V rail → **~13 h**; with the fan running, ~8 h.
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**Duty-cycled**, wake = 10 s at 1.5 W (modem held in PSM, no re-attach):
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| sleep floor | 10 min | 30 min | 60 min |
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|---|---:|---:|---:|
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| 150 mW | 7.7 d | 8.5 d | 8.7 d |
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| 100 mW | 10.7 d | 12.4 d | 12.9 d |
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| 50 mW | 17.9 d | **23.0 d** | 24.7 d |
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| 20 mW | 29.8 d | **47.3 d** | 55.5 d |
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| 10 mW | 38.3 d | 73.1 d | 94.6 d |
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If the carrier will not give us PSM and every wake is a full LTE re-attach (~35 s):
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| sleep floor | 10 min | 30 min | 60 min |
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|---|---:|---:|---:|
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| 150 mW | 5.6 d | 7.5 d | 8.1 d |
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| 50 mW | 9.7 d | 16.9 d | 20.8 d |
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| 20 mW | 12.5 d | 27.3 d | **38.8 d** |
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**Read the rows, not the columns.** Your 10-minute instinct costs 20–50 % against 30 min
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and buys the operator nothing they need. Go **30 min**, and spend the effort on the floor.
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---
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## 3. 🔴 The part that matters most — it also fixes the charging
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| Duty cycle | Daily energy | Charging needed at 2.42 A |
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|---|---:|---:|
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| 30 min wake, 50 mW sleep | 1.59 Wh/day | **~10 min/day** |
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| 30 min wake, 20 mW sleep | 0.77 Wh/day | **~5 min/day** |
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| 10 min wake, 100 mW sleep | 3.41 Wh/day | ~22 min/day |
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Today the pack must replace ~30 Wh after a long outage and we give it a charge window that
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closes at 42 °C. At **1.6 Wh/day** you need *ten minutes* of cool weather. Port nights drop
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well below 40 °C — the existing window is already enough.
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So the ordering changes: **do the firmware work first.** It is free, it ships to the
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installed fleet over the existing update path, and it may retire the cell question entirely.
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Keep the high-temp LFP option open — but stop treating it as the first move.
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It also means the 43 Wh pack is oversized. At 1.6 Wh/day a **single 12 Wh cell gives 6+
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days** — cheaper, cooler, smaller, easier to keep topped up.
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---
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## 4. What actually sets the sleep floor
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Ranked by what I expect to find on the bench. **All of these need measuring, not assuming.**
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| Suspect | Est. | Fix |
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|---|---:|---|
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| **`U17` AMS1117-3.3** — quiescent 5 mA typ / 11 mA max, and it burns 1.7 V × I as heat | **25–55 mW** | Swap for a low-Iq LDO. `U21` (AP2112K, 55 µA) is already in the BOM; a TPS7A02-class part is ~1 µA. **This is probably the single biggest item and it is a one-part change** |
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| **`K1` coil** — ~30 mA from SYS5V while the MCU is inserted | **150 mW** | See §5 |
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| **LTC4040 boost** at very light load — light-load efficiency and its own Iq | 10–40 mW? | Measure. If bad, this caps everything and needs a rethink |
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| Battery gauge LEDs `PB12–15`, `D17`, `D18`, `DB1–4`, `D4G1` | 50–150 mW | All off in backup, or one 50 ms blink per wake |
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| `U12` MP1584 → `/3V3_ETH` + `W5500` (~130 mA) | 400+ mW | Ethernet is useless on battery — disable `U12`, hold `W5500` in reset |
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| `MAX3232` charge pump, `SP3485`, `SC16IS752` | 5–15 mW | Shutdown pins / disable |
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| `U18` `V_BCKP` | **0.15 mW** | ✅ already right — see §6 |
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| MCU in STOP + LSE RTC | 0.1–0.2 mW | Achievable; today it is ~165 mW because `loop()` never stops |
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⚠ **Today's `SLEEP` state is not a low-power state.** It cuts `PWR_CTRL` and then keeps
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spinning `loop()` at 84 MHz with Serial, I²C polling and the gauge alive. Real STOP-mode
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+ RTC wake is the substantive firmware change here. `Y4` (32.768 kHz) is on the board, so
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LSE-driven RTC wake is available.
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---
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## 5. `K1` — reverse the earlier call
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The Firmware v3.1 brief said: *"bobina ~30 mA de SYS5V … se queda insertado; 30 mA contra
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12 Ah es ruido."* That was correct for a 13-hour continuous budget. **It is wrong for a
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duty-cycled one** — 150 mW against a 20–50 mW target is 3–7× the entire rest of the floor,
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and it alone would cap you at 8 days no matter what else you fix.
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**New rule: `BYP_CTRL` low between wakes, high only during the TX window.** 150 mW × 10 s
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per 30 min = 0.8 mW average — it disappears. The fail-safe semantics are unchanged
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(de-energised = F9P→modem direct), and between wakes there is nothing to inject anyway.
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Longer term, a **latching relay** (G6K-class, pulse to switch, zero hold) removes the
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question permanently. Worth pricing for the v6 BOM.
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---
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## 6. Don't chase position — you already have the right parts
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The machine is **parked**. Its position does not change during an outage, so re-acquiring
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a fix every wake is pure waste.
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- `V_BCKP` is already wired (`/3V3` via 1 kΩ + Schottky, 45 µA) and keeps ephemeris, so
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when you *do* want a fix it is a hot start (~2–5 s), not a 30 s cold start. Good design,
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already done.
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- Report the **stored** position with a `pwr=BATT` flag and a staleness marker. Take a real
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fix only every **N-th** wake (e.g. every 2 h) as an anti-theft check.
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- **`U26` (SC7A20 accelerometer) is on the v6 board.** Wire its interrupt to a wake-capable
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pin and you get motion-triggered wake for free: asleep while the machine is still, awake
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within a second if someone moves it. That is strictly better than polling GNSS.
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⚠ `U26` does not appear in any of the v6 briefs — confirm what it was placed for and that
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its INT line reaches an EXTI/wake pin before counting on this.
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---
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## 7. Modem: PSM before power-cycling
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Power-cycling the modem every 10 minutes means paying a full network attach every 10 minutes
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— 20–30 s at 100–300 mA with 2 A bursts. **3GPP PSM keeps the module registered while it
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sleeps at tens of µA**, with no re-attach cost; eDRX is the lighter variant.
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- The A7670SA (Cat-1bis) supports PSM. **Whether you get it is a Telcel question**, not a
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module question — it depends on the APN/plan and the network granting the requested TAU.
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**Verify this early; the whole table in §2 hinges on which column you land in.**
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- Fall back to `MODEM_PWR_EN` power-cycling only if PSM is refused — and then stretch the
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interval to 30–60 min so the attach cost amortises.
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⚠ **Inrush risk.** You already tripped the LTC4040 `PFI` at 4.60 V on LTE inrush with no
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pack connected. Duty-cycling means taking that 2 A / 7.6 W burst **repeatedly, at low SoC,
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on a hot or aged pack**. Hold the ≥ 470 µF modem bulk, and bench the worst case: coldest
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SoC × hottest pack × attach burst. This is the most likely way the design fails in the field.
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---
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## 8. Proposed state machine
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```
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RUNNING ──(5V_SENSE PA4 falls, debounced)──► BACKUP_ENTRY
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BACKUP_ENTRY: hot-start fix (or use last) → $PHLG{pwr=BATT, evt=POWER_LOSS} → TX now
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(operators care most in the first minute — do not make them wait 30)
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→ BACKUP_SLEEP: PWR_CTRL low · MODEM→PSM · BYP_CTRL low · U12/W5500 off
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transceivers shutdown · LEDs off · fan off · MCU STOP + RTC(T)
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→ wake on RTC(T) or accelerometer INT or PA4 rising:
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read vbat/tbat → if vbat < BAT_CRITICAL: TX final "shutting down" → deep off
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else: BYP_CTRL high → modem wake → TX heartbeat → back to BACKUP_SLEEP
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→ PA4 rising: full wake, resume RUNNING
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```
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**Adaptive cadence** (cheap, and better product behaviour): 15 min for the first hour,
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30 min to 24 h, 60 min after. Include the **drain rate** in `$PHLG` so ops can see how long
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the unit has left rather than guessing.
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**Fan: off in backup, full stop.** A 5 V fan is 0.75–1.25 W — it would consume the entire
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budget in hours. If the box is too hot to sit idle without a fan, that is a thermal problem,
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not a power-management one.
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---
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## 9. Do these three first
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1. **Measure the sleeping current** on a v5.5 board with `PWR_CTRL` low, MCU in STOP, and
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the loads in §4 disabled one at a time. That single number decides everything in §2.
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2. **Ask Telcel about PSM/eDRX** on the current APN and plan. It sets which table applies.
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3. **Pull the `tbat`/`tntc` fleet histogram** — with §3's 10 min/day figure in hand, the
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question is no longer "is it ever cool enough" but "is it cool enough for ten minutes",
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which is a much easier bar and may already be met.
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