31 lines
5.2 KiB
Markdown
31 lines
5.2 KiB
Markdown
# Decisions for the v6 correction pass — taken by Claude on Leo's delegation (2026-09-28 17:20 CST)
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Leo: "if a change can be done at the schematic level we should do that — make the best decisions for me".
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IDs refer to `/home/claude/v6audit/report/2026-09-28_Drogheda_EinarBoard-v6_Full-Audit_v1.0.md` (§5 ranked list, §6 layout list, §7 schematic change list, §8 firmware). Verification files: `findings/verify_1.md`, `findings/verify_2.md`.
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| # | Question (report §10) | Decision | Why |
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|---|---|---|---|
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| D1 | Supply context | HBOX input = the cabinet's **regulated 24 V** (Mean Well DDR-60G-24), per the project hard constraint; the board keeps its 9–36 V margin. Ignition = **raw machine ignition, 12 V and 24 V machines** (ICAVE: RTG / Reach Stacker / Empty Handler 24 V; Tractoplana / Montacargas 12 V). | CLAUDE.md §1c + §4 |
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| D2 | Modem supply topology (A-01, B-01, V1-01) | Adopt the verified topology: **U20 fed from `/MAIN5V` only**; D20 and D21 removed (direct connection MAIN5V → U20 VIN); **fan from `/VEH5V`** (U2 fan-buck block DNP, JP1 bridged); the **Q10 `/24V` branch DNP** once it has no loads; **F2 = 3 A (C206912), electrically ahead of D10**. Prerequisites in the same pass: A-04, A-05 (CSYS + 2×47 µF), U20 input caps (2×22 µF + 220 µF), B-02 loop values. | Removes the D21 failure mode and the unfused branch with fewer parts; verify_1 checked U25 ≤ 2.95 A |
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| D3 | R50 | **1.43 kΩ (C22840)**: ≥ 1.3 A at every corner, below the 2.5 A limit | A-03 verified |
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| D4 | U25 set-point | **R121 = 57.6 k (C23082)** → 5.18/5.32/5.46 V; firmware `V5_PFI` → 4.40 V | A-04 |
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| D5 | LTE antenna ESD | **Fit PESD0402-240 (C1975527)** on an 0402 land (keep protection; the antenna cable leaves the box) | B-03 verified |
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| D6 | GNSS antenna bias | **TPS2552DBVR (C46506)**, ILIM→IN (75 mA), ANT_OFF→EN̅, FAULT̅→ANT_SHORT_N | C-01 |
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| D7 | Charger temperature | "Sensor ≤ 10 mm of U6" is **binding**: implement F-51 fully (TMP102 C99269 @0x48 beside U6 + pack-NTC tap to PC5: 100 k C25803 / 120 k C25808 / 10 nF C1589) | R4; lesson F5 |
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| D8 | PD2 | **PD2 = ETH_PWR_EN** (E-01, U12 enable + 100 k pull-down). Board ID = firmware-only (probe the F9P / RTK_STAT behaviour at boot, D-08); PA9 stays the debug-TX pad (D-12) | Hardware power gating beats a strap; ID can be detected |
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| D9 | Battery mode | **LTE-only on battery** (`AT+CNMP=38`); **Ethernet off on battery** | A-05, B-16 |
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| D10 | J10 / P11 / P12 | **Populated** (Ethernet + RS-485/RS-232 are v6 features, EinarBoard 1.1 decisions). Schematic footprints corrected to the ordered parts (P11/P12 right-angle = the PCB's Horizontal footprint; J10 to a library nickname that exists). Michelle clears the PCB DNP flags | G-03 / H-06 |
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| D11 | Enclosure | v6 must fit the **existing V5.5 backplate / standoffs** (v6 brief: "no enclosure rework") → **G-01 = Blocker**: restore V5.5 MH4 and the heatsink-clamp holes (MH11 + partner); L6 moves anyway with A-02 | G-01 |
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| D12 | Fab stackup | **JLC04161H-7628 with impedance control, ENIG, 1 oz inner copper** (and still widen inner power runs per A-07) | F-06, A-07, J-02 |
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| D13 | BOM tool | **Fabrication Toolkit** → delete `LCSC Part` from U25's footprint in `Drogheda-v6.pretty` and on the board | H-04 |
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| D14 | Order quantity | **20 prototypes first**; re-check stock on order day; pre-order J14 (and U18/U19 if going to 100) | H-02, H-02b |
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| D15 | Firmware | Report §8 → **FW 0.7.x `board_v6.h`**; not part of this pass | — |
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| D16 | Minors | Schematic-only value/field Minors from §7.3 are applied **when trivially safe**; the rest go to the layout list or v6.1 | — |
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| D17 | Where to edit | **In place** in `hbox-watchdog-v6.*` (Leo's rule 28-Sep 20:20: iterations of a board are edited in place; old state recoverable from git). Pre-change copies in `kicad/_to_delete/v6-apply-20260928/`. The `.kicad_pcb` is **not** touched (Michelle's file); she runs Update PCB from Schematic | preferences |
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| D18 | Netclasses / DRC rules (F-01) | Applied now in `.kicad_pro` (netclass patterns, RF + PWR_MODEM classes) and `.kicad_dru` (verify_2's corrected rules), so DRC becomes the release gate | F-01 |
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## D19 — Scope of the schematic pass (report §7)
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- **All of §7.1 (Blockers) and §7.2 (Majors)** that touch the schematic/project, exactly as listed, with the D-decisions above. G-01 is layout-only (Michelle).
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- **§7.3 Minors applied** (schematic-only, low risk): A-11 (R56 → pull-up, charger OFF by default = safe state), A-13 (PFO → PB10 + 100 k), B-09 (22 Ω + 100 nF), B-10 (pulls + R106 → 1 k), C-07 (test pads), D-02 (Y3 → 3225 C2901684 + 12 pF; Michelle places it ≤ 5 mm from the MCU), D-03 (Y4 CL 7 pF + 6.8 pF), D-05 (Rigb1 → 2.2 k; firmware reads ignition on the ADC), D-09, D-12 (TP9), E-03 (**keep Y1, C95/C96 → 33 pF C1663**; no footprint change), E-04, **F-52 (modem TMP102 at 0x49)**, G-03 (footprints per D10, populated), G-04 (JP_CUT), G-08 (3× ESD), H-08 (value texts), J-04 (orphan NC flags, NC-on-connected flags, wire stubs; re-link missing symbols only if straightforward), B-15 (R107/R108 DNP + "never fit").
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- **§7.3 NOT applied** (→ v6.1 or layout): D-08 (board-ID strap; decided firmware-only), H-03 (MWSA0804S footprint: no land drawing available; V5.5 same pairing works), J-03 (library-wide pin types; cosmetic).
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