Drogheda/03-Architecture-Hardware/watchdog-electrical-design-state.md

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Watchdog v3 — Electrical Design State & Assumptions
project-drogheda
hardware
watchdog
electrical
assumptions
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Project Drogheda Helgen CTO 2026-06-24 Active — CANONICAL current electrical state (read this first)

HBOX Watchdog v3 — Electrical Design State & Assumptions

Read this to get the electrical context. It is the single source of truth for the current state of the watchdog electrical design — power tree, pin map, the decisions made and why, the bug fixes, what is in the schematic vs. still pending, the prototype approach, and the open items. Supersedes scattered notes. Links: watchdog-pcb-v3-design · BOM-master · kicad/hbox-watchdog-v3.kicad_sch (schematic).


0. Status (2026-06-24)

KiCad schematic 03-Architecture-Hardware/kicad/hbox-watchdog-v3.kicad_sch — ERC = 0 errors (only cosmetic off-grid + one Q_NPN_BCE symbol-cache warning). Authored via the KiCad MCP; renders to PDF/SVG (kicad-cli PATH fixed in claude_desktop_config.json).

In the schematic NOW: MCU (Blackpill J1/J2), MAIN5V/3V3 rails, 24 V reverse-polarity protect (Q10 + 15 V Zener DzG), RTK-stack load switch (Q1/Q5), three sense dividers, on-board DFR1015 ignition conditioning, fan driver + dedicated fan buck (U2), I²C temp sensors (SHT40 0x44 + TMP102 0x48), status LED, reset (SW1 on-board + P10 external), 4-LED battery gauge, output connectors, PWR_FLAGs.

Designed but NOT yet wired (next pass): the battery-backup power section (LTC4040 block

  • battery connector + NTC + the P2→MAIN5V re-route) and the power-cutoff switch. The LTC4040's detailed switching reference circuit (symbol, inductor, program resistors sized to the real pack) is a dedicated power-design pass — not fabricated blind.

1. Power tree (current intent)

Cabinet 24 V ─GX16─► Mean Well SD-15B-05 (24→5 V) ─► MAIN5V (board logic rail)
                                                      ├─► Blackpill 5V (J1/20, J2/18) → 3V3 (on-module LDO)
                                                      ├─► Load switch (Q5 NPN → Q1 P-FET) → SW_5V → RTK stack
                                                      └─► [PLANNED] LTC4040 backup ↔ 1S4P cell; boosts to 5 V on power loss
Cabinet 24 V ─GX16─► Q10 rev-pol P-FET (IRFR5305 + DzG 15 V Zener) ─► U2 fan buck (MP1584) → 5V_FAN → fan
Machine ignition (12–24 V) ─GX16 pin 3─► DFR1015 (ON-BOARD, →5 V) ─► Rig 100 Ω ─► D5 BAT54 clamp→3V3 / C9 ─► PA5
[PLANNED] cutoff switch in series with SYS_5V (downstream of the battery merge) → kills vehicle + battery
  • MAIN5V is the board logic rail. With the LTC4040 inserted, P2 (vehicle 5 V) feeds the LTC4040 input and the LTC4040 output feeds MAIN5V (so MAIN5V is the backed-up rail).
  • Corrections ride the 4G modem, not the GNSS — recover a dead link by power-cycling the stack.
  • Power-off is the safe state: the RTK stack defaults OFF (gate pull-up) until the MCU asserts.

2. Pin map — STM32F411 Blackpill (current)

J1 = header P1, J2 = header P2. SWD (PA13/PA14) is not on the 2×20 → flash via USB.

Pin Net Function Notes
PA0 BAT_SENSE ADC ÷2 from battery+ also feeds the gauge logic
PA1 PWR_CTRL RTK-stack load-switch enable HIGH = stack ON
PA2 / PA3 GNSS_TX/RX USART2 ↔ F9P UART NMEA
PA4 5V_SENSE ADC ÷2, vehicle 5 V present —
PA5 IGN_SENSE digital INPUT_PULLDOWN from DFR1015 via Rig + D5 clamp — NO ÷2 (Finding 2)
PA6 FAN_PWM 25 kHz fan PWM TIM3_CH1
PA8 CHRG_EN [PLANNED] LTC4040 charge enable/disable MCU cuts charge when TMP102 reads cell hot
PA9 / PA10 USART1 relay optional NMEA relay ENABLE_PHLG_RELAY default 0
PB0 EXT_LED status LED (low-side) FIXED 2026-06-24 (was disconnected)
PB6 / PB7 I2C1 SCL/SDA SHT40 (0x44) + TMP102 (0x48) 4.7 k pull-ups
PB10 FAN_TACH fan RPM + stalled-fan fault EXTI
PB12–PB15 BATLED1–4 [NEW] battery gauge bar firmware-driven from BAT_SENSE, 330 Ω + LED each
PC13 onboard LED — WeAct module
NRST NRST [NEW] reset SW1 (on-board) + P10 (external), both → GND

3. Decisions made this session (2026-06-24) + rationale

  1. DFR1015 folded ON-BOARD (was an external module). GX16 pin 3 now carries RAW machine ignition (12–24 V), not pre-conditioned 5 V. The on-board DFR1015 (7.5–30 V in, 5 V out) auto-handles 12 V and 24 V machines, drops the external-module dependency, and removes the risk of 24 V reaching the 5 V-rated clamp. Nets: IGN_24V (P1/3 → U5 VIN), IGN_5V (U5 VOUT → Rig). Harness implication: feed raw ignition to GX16 pin 3 — not 5 V.
  2. Ignition sense topology (confirmed, Finding 2): PA5 is a digital input. Path = DFR1015 5 V → Rig 100 Ω series → IGN_SENSE → D5 BAT54 clamp to 3V3 + C9 100 nF → PA5. No ÷2 divider (a divider drops the logic-high below V_IH).
  3. Battery backup RE-ADDED — reverses the old "battery dropped / vehicle-only" (Finding 3). Real trackers carry a cell; we want runtime on a parked machine. Pack = 18650 1S4P (Hyvel FG-0889, 3.6 V). Charger = LTC4040 (1S Li-ion/LiFePO4 battery-backup manager: switching reverse-buck charger + power-path + 2.5 A boost to 5 V backup + NTC). Safety lever: NTC on the cell + the Blackpill gates charge (CHRG_EN) off when TMP102 reads the cell hot — this directly answers the RCA's #1 failure (hot Li-ion swelling/ignition). The charge voltage jumper-selects Li-ion or LiFePO4, so a future chemistry change is config, not redesign. LTC4040 is 1S-only → sufficient for 1S4P. (Rejected: supercap = last-gasp only; BQ24074 + boost = cheap/available but no LiFePO4 path, linear charge heat.)
  4. Reset — on-board button SW1 + external connector P10, both pull NRST → GND.
  5. Battery gauge — 4 LEDs (D_BAT1–4 = 25/50/75/100 %) on PB12–PB15 via 330 Ω, firmware-driven from BAT_SENSE (no gauge IC; reuses spare GPIOs).
  6. Power cutoff (planned) — external switch in series with the system 5 V (downstream of the battery merge) so it kills vehicle and battery power.

4. Bug fixes this session

  • EXT_LED disconnect (real): J1/14 (PB0) was not on the EXT_LED net — a wire ran through the pin without terminating, so the MCU couldn't drive the status LED. Fixed → EXT_LED = J1/14 · Rled · Q4 gate.
  • Panel-LED short: a stray wire bridged P8 pin 1↔pin 2 (anode↔cathode of the external status LED). Deleted → LED_A/LED_K clean.
  • Ground unified: 4 stray power:GNDREF symbols (added during arrangement) → power:GND (left as-is they'd have renamed the whole ground net to GNDREF). One GND net now.
  • Schematic grid-snapped to 1.27 mm; symbol fields (Footprint/Datasheet/Description) hidden so only Reference + Value show.

5. Prototype approach (3 boards, easy-to-find parts)

  • BOMs: watchdog-protoboard-BOM-3boards.xlsx (engineering, ≈ MXN 5,341) and watchdog-LISTA-DE-COMPRAS-ES.xlsx (plain-Spanish shop list for a non-expert buyer).
  • Battery backup on proto = module stand-in: TP4056 charger + MT3608 boost + 2× 1N5819 OR-ing + 10 k NTC — reproduces charge / power-loss→backup / BAT_SENSE / cell-temp so the firmware is fully testable. The PCB uses the LTC4040. The one thing the proto can't test exactly is the temperature-qualified charge cutoff (LTC4040-only) — validate it in firmware logic.
  • GNSS + 4G: one F9P + 4G set, shared across the three watchdog boards (the watchdog logic, sensing, fan/temp, gauge, reset, cutoff and backup all test without them).

6. Key assumptions / invariants (electrical)

  • Backup pack is 1S4P, 3.6 V nominal (NOT 3S). The "40 Ah" on the label is suspect (4× 18650 ≈ 10–14 Ah max) — confirm; it sets charge current + the LTC4040 safety timer.
  • GX16 pin 3 = raw machine ignition (12–24 V) into the on-board DFR1015 (changed this session).
  • MAIN5V = board logic rail (from SD-15B-05; backed up via the LTC4040 path once wired).
  • Corrections ride the 4G modem → recover the link by power-cycling the stack, never a GNSS reset.
  • Power-off is the safe state; the load switch defaults OFF until the MCU asserts confidence.
  • Enclosure is ASA (not PLA); the thermal liability is the power components (battery/boost/ modem), not the case. v3.0 thermal = waterproof duct + Blackpill smart fan (active managed).
  • No material softening < ~80 °C in the thermal path.

7. Open items / TODO (electrical)

  • Wire the battery-backup section into the schematic: LTC4040 block (U6) + battery connector (BAT+, BAT−, NTC) + the P2 → LTC4040 → MAIN5V re-route + CHRG_EN/BAT_SENSE to the MCU.
  • Add the power-cutoff switch in series with SYS_5V.
  • LTC4040 detailed reference design — symbol, inductor, RPROG (charge current sized to the real pack Ah), input-current limit, PFI divider, NTC bias, compensation — then bench-validate.
  • Confirm the real pack capacity (the "40 Ah" label).
  • Firmware: gauge-LED driver (PB12–15 from BAT_SENSE); CHRG_EN cut-charge-when-hot logic (TMP102); reset is hardware-only.
  • Cosmetic: position the new parts on-grid (clears off-grid warnings).

8. Pointers

  • Schematic: kicad/hbox-watchdog-v3.kicad_sch (+ …-schematic.pdf/.svg).
  • Design doc: watchdog-pcb-v3-design (sub-circuits, pin map, findings).
  • Connections: watchdog-connections.xlsx + watchdog-connections-rationale.
  • BOMs: BOM-master (production) · watchdog-protoboard-BOM-3boards.xlsx + watchdog-LISTA-DE-COMPRAS-ES.xlsx (proto) · watchdog-protoboard-bringup (bench order).
  • Firmware: 04-Source-Code/firmware/blackpillrtkcode_v2/ (v2.3) + docs/PINOUT.md, docs/LOGGING-SPEC.md.