hbox-docs/docs/procedimientos/historico-proto-bench-v3.md
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Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
2026-09-15 18:23:26 +00:00

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---
title: Watchdog v3 — Proto Bench Bring-up & Build-Readiness (DEV board)
tags: [project-drogheda, hardware, watchdog, prototype, breadboard, bring-up, readiness]
project: Project Drogheda
author: Helgen CTO
date: 2026-06-24
status: Active — tomorrow's bench guide (supersedes the procedure half of watchdog-protoboard-bringup.md for v3)
---
# Watchdog v3 — Proto Build Readiness & Bench Bring-up
> **Scope:** breadboard the **DEV** watchdog on the existing Blackpill and prove the state
> machine + sensing + load switch + fan/temp loop. **PCB layout is explicitly out of scope
> for tomorrow** (do it after the proto works). Authority: [[watchdog-electrical-design-state]]
> (canonical) · firmware `04-Source-Code/firmware/blackpillrtkcode_v2/` (v2.3) ·
> schematic `kicad/hbox-watchdog-v3.kicad_sch`.
> **⚠ UPDATE 2026-07-03 — sensor suite changed to parts in hand.** Proto sensors are now
> **AHT10** (0x38, I²C1 **alone**, 3V3) + **LM35 → PA7** + **NTC → PB1** (no SHT40/TMP102 on
> proto — PCB-only). The kit's TP4056 has **no TEMP pin** → charge cutoff is **PA8 `CHRG_RUN`**
> (IRF9540N on TP4056 IN+, **inverted vs PROD CHRG_EN**). Cutoff switch wired: nodo SYS → SPST
> → MAIN5V. **The fan in hand is 2-wire** → PB10 tach test drops. §1/§3 rows below are patched;
> the authoritative wiring = ledger xlsx + `Drogheda_Guia-Conexion-Protoboard_ES_v2.2.pdf`.
> **Firmware v2.3 still reads SHT40 (0x44)** — the AHT10 driver / LM35 channel / CHRG_RUN flag
> are a pending firmware pass; until then the I²C and charge-cut rows are wire-now/test-later.
---
## 0. Verdict — are you ready to build? **Yes, with three caveats**
You can build and bring up the **core watchdog** tomorrow. Nothing about the schematic or its
ERC state blocks a breadboard build. The caveats are about *firmware coverage* and *scope
discipline*, not readiness:
1. **ERC "issues" are cosmetic — not a blocker.** File-based ERC on `hbox-watchdog-v3.kicad_sch`
= **0 errors, 1 warning** (a `Q_NPN_BCE` symbol-cache mismatch). The ground net is unified
(4 `GND` symbols, **0** placed `GNDREF` instances — the GNDREF you may see is just an orphaned
library-cache entry, not a real second ground). None of this affects a breadboard. *(Clean it
only before you go to PCB layout — see §2.)*
2. **Two v3 sub-circuits aren't in firmware yet.** The flashed v2.3 build does **not** drive the
4-LED battery gauge (PB12–15) or `CHRG_EN` (PA8). You can wire them, but they'll sit dark/idle
until a firmware pass. Decide per §4 whether to build them now or defer.
3. **v2.3 has never been hardware-validated.** Repo invariant: *bench-test before flash.*
Tomorrow is its first real bench test — treat step 1 (flash + confirm telemetry) as the gate
before trusting any later step.
**The one thing I couldn't verify:** your exact purchased parts. The two proto BOM `.xlsx`
(`watchdog-protoboard-BOM-3boards.xlsx`, `watchdog-LISTA-DE-COMPRAS-ES.xlsx`) are locked open in
LibreOffice, so I rebuilt the checklist (§3) from the design docs. Close LibreOffice and I'll diff
your actual list against it.
---
## 1. What you can prove tomorrow (firmware v2.3 supports it) vs. not
| Sub-circuit | Pins | v2.3 firmware | Testable tomorrow? |
|---|---|---|---|
| Boot + `$PHLG`/STREAM telemetry (USB) | USB-C | ✅ `ENABLE_PHLG=1` | **Yes** — this is the gate |
| Status LED (blink codes) | PB0 | ✅ | **Yes** |
| **RTK-stack load switch** (the recovery heart) | PA1 → 2N3904 → IRF9540 | ✅ OFF-at-reset, MCU-asserts-ON | **Yes** |
| Sense: battery / 5 V / ignition | PA0 / PA4 / PA5 | ✅ hysteresis + debounce | **Yes** |
| Smart fan (PWM) | PA6 · *(PB10 tach = DNP, fan in hand is 2-wire)* | ✅ 25 kHz PWM · RPM/stall **n/a** | **Yes** (PWM ramp; no tach) |
| I²C temp/RH — **AHT10 0x38, alone on the bus** [2026-07-03] | PB6/PB7 | ❌ v2.3 reads SHT40 0x44 → **AHT10 driver pending** (+ MCU-temp fallback works) | wire OK, **reads after firmware patch** |
| Analog temp ×2 — NTC→PB1 + **LM35→PA7** [2026-07-03] | PB1 / PA7 | ❌ channels not coded | wire OK, verify with multimeter meanwhile |
| 4-LED battery gauge | PB12–15 | ❌ not coded | wire OK, **stays dark** |
| Temp-qualified charge cut — **`CHRG_RUN`** [2026-07-03] | PA8 → 2N3904 → IRF9540N on TP4056 IN+ | ❌ not coded (**inverted vs PROD `CHRG_EN`** — needs flag) | wire OK; hand-test by jumpering PA8 high/low |
| Reset (hardware) | NRST | n/a (HW only) | **Yes** — button just works |
**Fan note [updated 2026-07-03]:** the fan in hand is **2-wire** → no tach; PB10 stays DNP and
v2.3's RPM/stall check reads nothing (harmless). Fan-fault will be inferred from temperature in
the firmware pass. PWM drive on PA6 through the IRLZ44N tests exactly the same.
---
## 2. The ERC situation (so you can stop worrying about it tonight)
- **What ERC actually reports on the DEV file:** 0 errors, 1 warning (`Q_NPN_BCE` not found in
lib `Device`). That warning means the symbol in your schematic is from the project cache and the
installed `Device` lib has a slightly different name/pins — **purely a library-link cosmetic**.
- **The GNDREF you may have seen:** there are **no placed GNDREF symbols** — only the leftover
symbol *definition* in the embedded cache. Your ground is one net.
- **Why it doesn't block the breadboard:** ERC validates a *netlist for fabrication*. On a
breadboard you tie all grounds together physically; off-grid placement and a cache-name mismatch
are invisible to copper you wire by hand.
- **Before PCB layout (later), clean these in KiCAD:** Tools → *Update Symbols from Library*
(clears the `Q_NPN_BCE` cache warning), then *Annotate* and re-run ERC; nudge any off-grid parts
onto the 1.27 mm grid. **Don't let me edit the schematic while you have KiCAD open** (file-lock
conflict) — close it first and I'll do the cleanup pass.
---
## 3. Pre-build parts checklist (reconstructed — confirm against your box)
**Already have (don't buy):** Blackpill STM32F411, USB-C cable, 18650 + PowerBoost (or bench PSU),
Mean Well SD-15B-05 (or bench 5 V), multimeter, a heat source (hair-dryer/cup of hot water) for the
fan test. *F9P + 4G master are NOT needed for this bring-up.*
**Core (the "brains" — must-have):**
- [ ] Breadboard ×2 (830-pt) + jumper kits (M-M and M-F)
- [ ] Resistor assortment incl. **330 Ω, 1 k, 4.7 k, 10 k, 100 k, 220 Ω**
- [ ] **2N3904** ×3 (load-switch driver, TO-92)
- [ ] **IRF9540 / IRF9540N** ×2 (P-FET high-side 5 V switch, TO-220)
- [ ] LED ×5 (status) · **100 nF** ceramic ×10 (ADC filters/decoupling) · 100 µF ≥16 V ×4 (bulk)
- [ ] **10 kΩ trim pot** ×2 + tactile button/slide switch ×2 (sweep VBAT / simulate ignition)
- [ ] Male header strip 1×40 (to pin any bare module)
**Thermal (v3 new):**
- [x] 5 V fan, 40–60 mm — **2-wire, in hand** [2026-07-03] (no tach; PB10 DNP)
- [ ] **IRLZ44N** ×2 (logic-level N-FET, fan low-side) — *plain IRF540/IRFZ44 won't turn on from
3.3 V; if out of IRLZ44N use 2N2222A/TIP120 + 1 kΩ base*
- [ ] **1N5819** ×3 (fan flyback; 1N4007 acceptable)
- [x] I²C **AHT10** breakout (0x38) — **in hand** [2026-07-03]; **alone on the bus**, 3V3 only;
firmware read patch pending (v2.3 speaks SHT40)
- [x] **LM35** (TO-92) — **in hand** [2026-07-03]; analog temp #2 on **PA7**, powered from 5 V
**v3 additions (build only if you want them wired now — see §4):**
- [ ] Reset: tactile button → NRST↔GND (+ optional 2-pin header for external reset)
- [ ] Battery gauge: **4× LED + 4× 330 Ω** on PB12–15 *(will stay dark until firmware)*
- [ ] Battery-backup stand-in: **TP4056** module + **MT3608** boost + **2× 1N5819** (OR-ing)
*(reproduces charge / power-loss→backup / BAT_SENSE)*. **[2026-07-03]** The kit's TP4056 has
**no TEMP pin** → the 10 kΩ charger-NTC is unused; the temp-qualified cutoff **is now on the
proto in hardware**: PA8 `CHRG_RUN` → 1 k → 2N3904 → IRF9540N (10 k pull-up) on TP4056 IN+
(HIGH = charge; MCU absent = no charge — inverted vs PROD). Plus the **cutoff switch**:
nodo SYS → SPST → MAIN5V (kills vehicle **and** battery)
---
## 4. Decision before you sit down: how much of v3 to wire
- **Recommended for tomorrow — build the testable core + thermal** (everything in §1 marked
*Yes*). It proves the whole watchdog logic and the new fan/temp loop, which is the point of the
proto. Add the **reset button** (free — works with no firmware).
- **Gauge (PB12–15):** wire it if you want the layout/feel, but it won't light until I write the
gauge driver. *Cheaper to add later.* — **I can write that firmware pass tonight/tomorrow if you
want the LEDs live.**
- **Battery-backup stand-in (TP4056+MT3608):** worth wiring if you specifically want to watch
power-loss → backup hand-off and `BAT_SENSE` track the cell. Skip if tomorrow is about the
watchdog logic only.
---
## 5. Bring-up sequence (run in order — each step gates the next)
1. **USB only — flash & gate.** Compile v2.3 (Arduino IDE / STM32duino, board = Blackpill F411CE),
flash via DFU (hold BOOT0). Open serial @115200. **Confirm `BOOT` / `COLS` / `TLM` lines and a
`$PHLG,...*CS` every 30 s.** If this fails, stop and fix firmware before wiring anything.
2. **Status LED** — PB0 → 330 Ω → LED → GND. Watch blink codes change with state.
3. **Load switch (the recovery heart)** — PA1 → 1 kΩ → 2N3904 base; collector → IRF9540 gate;
10 kΩ gate→5 V; drain → switched 5 V; put an LED+330 Ω on the switched output.
**Confirm: OFF at reset, ON when PA1 asserts.** (Power-off is the safe state.)
4. **Sense dividers** — 10 k/10 k ÷2 into **PA0** (battery via 18650/pot) and **PA4** (5 V rail);
10 kΩ pot into **PA5** (ignition). Sweep and watch `veh`/`ign`/`vbat` flip in TLM with
hysteresis (V5V_ON 4.20 / V5V_OFF 3.80; BAT_CRIT 3.40 / BAT_REC 3.70).
5. **Fan + tach** — PA6 → 220 Ω → IRLZ44N gate; fan(−) at the drain; 1N5819 ∥ fan; 100 kΩ
gate→GND. 3-wire tach → 10 kΩ pull-up to 3V3 → PB10. Watch it spin/ramp; **unplug fan →
`fan_fault`** in telemetry.
6. **I²C temp** — SHT40/TMP102 on PB6/PB7 (+4.7 kΩ pull-ups each). Heat it → fan ramps on the
45→70 °C curve. *No sensor? The MCU-temp fallback still ramps the fan — warm the whole board.*
7. **(Optional) reset button** — NRST↔GND momentary; press → clean reboot, reset-cause line in log.
8. **(Optional) battery-backup stand-in** — vehicle 5 V → TP4056 IN; cell on TP4056 BAT; TP4056/cell
→ MT3608 → 5 V via 1N5819 OR-ing into the rail; NTC by the cell. Pull vehicle 5 V → watch backup
hold the rail and `BAT_SENSE` track.
---
## 6. Wiring cheat-sheet (Blackpill side, v3)
```
PA0 ← BAT ÷2 (10k/10k) from 18650+ / pot PA6 → 220Ω → IRLZ44N gate; fan(−); 1N5819 ∥ fan
PA4 ← 5V ÷2 (10k/10k) from 5V rail PB10 ← fan tach, 10k pull-up → 3V3
PA5 ← IGN ÷2 (10k/10k) from pot/switch PB6/PB7 → I²C SCL/SDA (+4.7k each → 3V3)
PA1 → 1k → 2N3904 base; collector → IRF9540 PB0 → 330Ω → LED → GND
gate; 10k gate→5V; drain → switched 5V NRST ← reset button → GND (optional)
→ stack (LED+330Ω as a test load) PB12–15 → 330Ω → LED → GND (gauge; dark till FW)
GND / 5V / 3V3 rails common. Fan 5V from a SEPARATE 5V (2nd PSU / LM2596) — not the switched stack rail.
```
> **Proto↔PCB part map (don't get confused):** the schematic uses SMD equivalents (Q1 **AO3401A**
> P-FET, Q5 **MMBT3904**, Q2 **AO3400A** fan FET). On the breadboard you use the through-hole
> stand-ins above (**IRF9540N / 2N3904 / IRLZ44N**) — same topology, same firmware.
---
## 7. After the proto works — next steps (not tomorrow)
- Firmware pass: gauge-LED driver (PB12–15 from `BAT_SENSE`) + `CHRG_EN` cut-charge-when-hot logic.
- KiCAD: cosmetic ERC cleanup → footprints → **then** PCB layout (DEV first, then build PROD per
[[watchdog-production-schematic-delta]]).
- Pack Ah confirmed **~12 Ah** (2026-06-30; "40 Ah" label was wrong) — sizes the LTC4040 charge current (≈C/5, ≤2.5 A).
## Related
[[watchdog-electrical-design-state]] (CANONICAL) · [[watchdog-protoboard-bringup]] (Jun-22 shop
list) · [[watchdog-production-schematic-delta]] (PROD build spec) · `kicad/hbox-watchdog-v3.kicad_sch`