59 lines
4.4 KiB
Markdown
59 lines
4.4 KiB
Markdown
# hbox_v5_bringup — EinarBoard v5 first-flash bring-up firmware
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Bench-proves a newly assembled v5 board over USB-C **J11** only. Never powers the RTK stack.
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Bench mode: `P`+`Y` stack ON/OFF, `n` NMEA monitor (fix 4 = RTK FIX). Console (0.2.1): CR+LF lines, `EVT` on every state change, named `STAT` every 5 s, `$PHLG` every 10 s in the fleet v3.x layout (server-parseable).
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Checks: HSE 25 MHz + USB CDC · LSE Y4 · I2C: PCF8574 0x20 / SHT40 0x44 / TMP102 0x48 /
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SC16IS752 0x4D · gauge + RGB LED walk · ADC · digital inputs. Prints PASS/FAIL, then a
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`STAT` line every 2 s. Console commands: `r` rerun · `g` gauge walk · `i` I2C scan · `h` help.
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Procedure for technicians (ES): `06-Testing-Validation/2026-09-15_Drogheda_EinarBoard-v5_Procedimiento-Prueba-y-Flasheo_ES_v1.0.md`
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## Build
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STM32duino core 3.x (`STMicroelectronics:stm32`). Target is the **generic F411RE**, not the Blackpill.
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```bash
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arduino-cli compile \
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--fqbn "STMicroelectronics:stm32:GenF4:pnum=GENERIC_F411RETX,usb=CDCgen,xserial=generic,rtlib=nanofp" \
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--build-property "build.extra_flags=-DHSE_VALUE=25000000UL" \
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--output-dir out hbox_v5_bringup
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```
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`rtlib=nanofp` is required — the default newlib-nano build prints nothing for `%f`, so every voltage
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and temperature line would be blank. `SystemClock_Config()` is overridden in the sketch (HSE 25 MHz → 96 MHz, USB 48 MHz) because the
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generic variant defaults to HSI, which is not accurate enough for USB.
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## Flash (DFU, J11)
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Hold **SW2** (BOOT0) → tap **SW1** (RESET) → release SW2 → device `0483:DF11` appears.
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```bash
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dfu-util -a 0 -s 0x08000000:leave -D release/hbox-v5-bringup_0.2.1.bin
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```
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or STM32CubeProgrammer → USB → Connect → Download `release/hbox-v5-bringup_0.2.1.bin` @ `0x08000000`.
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## Release
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| File | Version | SHA-256 (first 16) | Size |
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|---|---|---|---|
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| **`release/hbox-v5-bringup_0.2.1.bin`** | **0.2.1 (2026-09-17) — USE THIS** | `78b34f4603550c05` | 70 084 B |
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| `release/superseded/hbox-v5-bringup_0.2.1.bin` | 0.2.0 — superseded (LF-only console, no EVT/$PHLG) | `78b34f46494f9ee1` | 64 780 B |
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| `release/hbox-v5-bringup_0.1.1.bin` | 0.1.1 — superseded (no bench mode) | `91ca6f87a86686be` | 55 104 B |
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| `release/hbox-v5-bringup_0.1.0.bin` | 0.1.0 — SUPERSEDED (no float printf, ETH_CS driven) | `1a9a77ae479c8f86` | 41 040 B |
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## Changelog
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- **0.2.1** (2026-09-17): console made monitorable — every line ends CR+LF (no more PuTTY staircase); `EVT up=…` line on every
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state change (stack ON/OFF with reason and the expected voltages, ignition edge, 5 V present/lost, charger status/fault edges,
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first NMEA frame / NMEA lost >5 s, GGA fix-quality change, stack refused/cancelled); `STAT` every 5 s with named values
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(`ign=ON`, `chrg=idle`, `flt=none`, `tntc=n/c`, `i2cerr=`, `t_on=`, `nmea=`/`bad=`); `$PHLG` every 10 s + after each stack change,
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**same 24-field layout + XOR checksum as fleet fw v3.x** (verified against `htracker/retranslator.py::_parse_phlg`; `fw=0.2.1-bu`,
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`state=BENCH|RUN`, `link=SRCH|DEGR|OK`); NMEA checksum verified (bad frames counted as `rxbad`); `P` arms non-blocking (10 s window),
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`Y` confirms; new commands `t` ($PHLG now), `l` (field legend), `v` (multimeter checkpoints for the stack gate: SYS5V/PWR_CTRL/GATE_LS/SW_5V);
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stack auto-OFF if 5 V is lost; `v5=…(BAJO)` + EVT when VEH5V drops under 4.6 V (LTC4040 PFI zone: PFI divider R51 270k/R52 100k
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→ 4.44 V falling, backup VSYS 4.79 V via R53 499k/R54 100k) — the 24-Jul modem-hiccup mechanism, now visible in the log. Build: no-op ctags + explicit definition order (arduino/ctags unreachable from the build host).
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- **0.2.0** (2026-09-17): bench mode for the assembled unit — `P`+`Y` powers the RTK stack (only with 5 V on P2),
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`P` again turns it off; `n` streams `$GxGGA` from the simpleRTK2B UART1 (PA3, 115200) for 20 s with fix/sats/HDOP;
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`STAT` shows `stack=` and the last GGA. Charge stays disabled, K1 released. Uses the core's `Serial2` (USART2).
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- **0.1.1** (2026-09-16, audit): build with `rtlib=nanofp` (floats printed blank in 0.1.0); `ETH_CS` now
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`INPUT_PULLUP` instead of driving HIGH into the unpowered W5500; reset cause reports `PIN` only when
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`PINRSTF` is set (else `UNKNOWN`).
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- **0.1.0** (2026-09-15): first build.
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## ⚠ Do not flash `blackpillrtkcode_v3` (v3.0.3) on v5
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Its `PIN_BATLED1..4` = PB12–PB15 are the W5500 SPI2 bus on this board. `board_v5.h` is the
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verified v5 pin map — the production v5 firmware should include it rather than redefine pins.
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