Electrical/PCB: - LTC4040 Block B sized to the 12 Ah 1S4P pack (RPROG 825R -> 2.42 A ~ C/5, RS 8 mR -> 3.1 A input limit, PFI 4.60 V, backup 4.79 V, charge 4.00 V Li-ion via VSYS-referenced straps) + Block E cutoff (P11) + Block F PA4->VEH5V re-tap + Block H fail-safe Modo-B bypass (K1 normally-closed relay) + Block I NTC->PB1. - CARRIER-BOARD conversion: simpleRTK2B Pro on UNO-pattern female headers (MOD1; D0/D1=UART1, D2=RX2, D8=TX2, IOREF=3V3, 5V=SW_5V) + 4G NTRIP Master on on-board XBee socket (J7/J8; VCC=3V3_MODEM via new Block K MP1584 buck off SW_5V - the HP XBee socket is 3.3 V not 5 V). Board 120x100, placement + GND pour + DRC baselines. Custom symbols: LTC4040EUFD, AO4406A, SimpleRTK2B_Pro_Socket. - Fixed duplicated U2, stale no-connects, A4->A3 sheet; ERC 0 errors. Docs: - Canonical electrical-design-state + production delta (Block B values table, 5b/5c/5d/5e) + design/rationale/connections/BOM swept to the Jul-2 assumptions ledger (Conexiones-por-Bloque xlsx). - Guia de Conexion Protoboard: LaTeX source now maintained in-repo -> v2.1 PDF. - CircuiTikZ sheet + wiring Beamer: block 11 (NTC->PB1) + guinda ignition legend. - Client decks: Avance v1.1 (overclaims fixed) + RCA v1.1 (2-jul addendum). Repo hygiene: - .gitignore: live rtk-config (SIM/APN/NTRIP creds) now ignored and REMOVED from tracking (NOTE: rotate those credentials - they exist in prior commits); KiCad .bak/snapshots/.history, LaTeX intermediates, Office locks ignored+purged. - Removed rogue .history gitlinks that broke git status.
10 KiB
| title | tags | project | author | date | status | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Watchdog v3 — Proto Bench Bring-up & Build-Readiness (DEV board) |
|
Project Drogheda | Helgen CTO | 2026-06-24 | Active — tomorrow's bench guide (supersedes the procedure half of watchdog-protoboard-bringup.md for v3) |
Watchdog v3 — Proto Build Readiness & Bench Bring-up
Scope: breadboard the DEV watchdog on the existing Blackpill and prove the state machine + sensing + load switch + fan/temp loop. PCB layout is explicitly out of scope for tomorrow (do it after the proto works). Authority: watchdog-electrical-design-state (canonical) · firmware
04-Source-Code/firmware/blackpillrtkcode_v2/(v2.3) · schematickicad/hbox-watchdog-v3.kicad_sch.
0. Verdict — are you ready to build? Yes, with three caveats
You can build and bring up the core watchdog tomorrow. Nothing about the schematic or its ERC state blocks a breadboard build. The caveats are about firmware coverage and scope discipline, not readiness:
- ERC "issues" are cosmetic — not a blocker. File-based ERC on
hbox-watchdog-v3.kicad_sch= 0 errors, 1 warning (aQ_NPN_BCEsymbol-cache mismatch). The ground net is unified (4GNDsymbols, 0 placedGNDREFinstances — the GNDREF you may see is just an orphaned library-cache entry, not a real second ground). None of this affects a breadboard. (Clean it only before you go to PCB layout — see §2.) - Two v3 sub-circuits aren't in firmware yet. The flashed v2.3 build does not drive the
4-LED battery gauge (PB12–15) or
CHRG_EN(PA8). You can wire them, but they'll sit dark/idle until a firmware pass. Decide per §4 whether to build them now or defer. - v2.3 has never been hardware-validated. Repo invariant: bench-test before flash. Tomorrow is its first real bench test — treat step 1 (flash + confirm telemetry) as the gate before trusting any later step.
The one thing I couldn't verify: your exact purchased parts. The two proto BOM .xlsx
(watchdog-protoboard-BOM-3boards.xlsx, watchdog-LISTA-DE-COMPRAS-ES.xlsx) are locked open in
LibreOffice, so I rebuilt the checklist (§3) from the design docs. Close LibreOffice and I'll diff
your actual list against it.
1. What you can prove tomorrow (firmware v2.3 supports it) vs. not
| Sub-circuit | Pins | v2.3 firmware | Testable tomorrow? |
|---|---|---|---|
Boot + $PHLG/STREAM telemetry (USB) |
USB-C | ✅ ENABLE_PHLG=1 |
Yes — this is the gate |
| Status LED (blink codes) | PB0 | ✅ | Yes |
| RTK-stack load switch (the recovery heart) | PA1 → 2N3904 → IRF9540 | ✅ OFF-at-reset, MCU-asserts-ON | Yes |
| Sense: battery / 5 V / ignition | PA0 / PA4 / PA5 | ✅ hysteresis + debounce | Yes |
| Smart fan + tach | PA6 / PB10 | ✅ 25 kHz PWM, RPM, stall fault | Yes (3-wire fan) |
| I²C temp/RH (closed-loop fan) | PB6/PB7 → SHT40 0x44 + TMP102 0x48 | ✅ + MCU-temp fallback | Yes (fallback works even with no sensor) |
| 4-LED battery gauge | PB12–15 | ❌ not coded | wire OK, stays dark |
Temp-qualified charge cut (CHRG_EN) |
PA8 | ❌ not coded | No (also LTC4040/PROD-only) |
| Reset (hardware) | NRST | n/a (HW only) | Yes — button just works |
Fan note: v2.3 reads a 3-wire tach on PB10, so use a 3-wire 5 V fan on the breadboard. (The "2-wire production fan" decision in the canonical doc is a PCB change; it doesn't apply to tomorrow's bench.)
2. The ERC situation (so you can stop worrying about it tonight)
- What ERC actually reports on the DEV file: 0 errors, 1 warning (
Q_NPN_BCEnot found in libDevice). That warning means the symbol in your schematic is from the project cache and the installedDevicelib has a slightly different name/pins — purely a library-link cosmetic. - The GNDREF you may have seen: there are no placed GNDREF symbols — only the leftover symbol definition in the embedded cache. Your ground is one net.
- Why it doesn't block the breadboard: ERC validates a netlist for fabrication. On a breadboard you tie all grounds together physically; off-grid placement and a cache-name mismatch are invisible to copper you wire by hand.
- Before PCB layout (later), clean these in KiCAD: Tools → Update Symbols from Library
(clears the
Q_NPN_BCEcache warning), then Annotate and re-run ERC; nudge any off-grid parts onto the 1.27 mm grid. Don't let me edit the schematic while you have KiCAD open (file-lock conflict) — close it first and I'll do the cleanup pass.
3. Pre-build parts checklist (reconstructed — confirm against your box)
Already have (don't buy): Blackpill STM32F411, USB-C cable, 18650 + PowerBoost (or bench PSU), Mean Well SD-15B-05 (or bench 5 V), multimeter, a heat source (hair-dryer/cup of hot water) for the fan test. F9P + 4G master are NOT needed for this bring-up.
Core (the "brains" — must-have):
- Breadboard ×2 (830-pt) + jumper kits (M-M and M-F)
- Resistor assortment incl. 330 Ω, 1 k, 4.7 k, 10 k, 100 k, 220 Ω
- 2N3904 ×3 (load-switch driver, TO-92)
- IRF9540 / IRF9540N ×2 (P-FET high-side 5 V switch, TO-220)
- LED ×5 (status) · 100 nF ceramic ×10 (ADC filters/decoupling) · 100 µF ≥16 V ×4 (bulk)
- 10 kΩ trim pot ×2 + tactile button/slide switch ×2 (sweep VBAT / simulate ignition)
- Male header strip 1×40 (to pin any bare module)
Thermal (v3 new):
- 3-wire 5 V fan, 40–60 mm (3-wire so PB10 reads RPM — matches v2.3)
- IRLZ44N ×2 (logic-level N-FET, fan low-side) — plain IRF540/IRFZ44 won't turn on from 3.3 V; if out of IRLZ44N use 2N2222A/TIP120 + 1 kΩ base
- 1N5819 ×3 (fan flyback; 1N4007 acceptable)
- I²C SHT40/SHT31 breakout (0x44) — or LM35/DS18B20 fallback (tell me which; I'll patch the read)
v3 additions (build only if you want them wired now — see §4):
- Reset: tactile button → NRST↔GND (+ optional 2-pin header for external reset)
- Battery gauge: 4× LED + 4× 330 Ω on PB12–15 (will stay dark until firmware)
- Battery-backup stand-in: TP4056 module + MT3608 boost + 2× 1N5819 (OR-ing) + 10 kΩ NTC (reproduces charge / power-loss→backup / BAT_SENSE; the temp-qualified cutoff is LTC4040-only → firmware-validated, not on the proto)
4. Decision before you sit down: how much of v3 to wire
- Recommended for tomorrow — build the testable core + thermal (everything in §1 marked Yes). It proves the whole watchdog logic and the new fan/temp loop, which is the point of the proto. Add the reset button (free — works with no firmware).
- Gauge (PB12–15): wire it if you want the layout/feel, but it won't light until I write the gauge driver. Cheaper to add later. — I can write that firmware pass tonight/tomorrow if you want the LEDs live.
- Battery-backup stand-in (TP4056+MT3608): worth wiring if you specifically want to watch
power-loss → backup hand-off and
BAT_SENSEtrack the cell. Skip if tomorrow is about the watchdog logic only.
5. Bring-up sequence (run in order — each step gates the next)
- USB only — flash & gate. Compile v2.3 (Arduino IDE / STM32duino, board = Blackpill F411CE),
flash via DFU (hold BOOT0). Open serial @115200. Confirm
BOOT/COLS/TLMlines and a$PHLG,...*CSevery 30 s. If this fails, stop and fix firmware before wiring anything. - Status LED — PB0 → 330 Ω → LED → GND. Watch blink codes change with state.
- Load switch (the recovery heart) — PA1 → 1 kΩ → 2N3904 base; collector → IRF9540 gate; 10 kΩ gate→5 V; drain → switched 5 V; put an LED+330 Ω on the switched output. Confirm: OFF at reset, ON when PA1 asserts. (Power-off is the safe state.)
- Sense dividers — 10 k/10 k ÷2 into PA0 (battery via 18650/pot) and PA4 (5 V rail);
10 kΩ pot into PA5 (ignition). Sweep and watch
veh/ign/vbatflip in TLM with hysteresis (V5V_ON 4.20 / V5V_OFF 3.80; BAT_CRIT 3.40 / BAT_REC 3.70). - Fan + tach — PA6 → 220 Ω → IRLZ44N gate; fan(−) at the drain; 1N5819 ∥ fan; 100 kΩ
gate→GND. 3-wire tach → 10 kΩ pull-up to 3V3 → PB10. Watch it spin/ramp; unplug fan →
fan_faultin telemetry. - I²C temp — SHT40/TMP102 on PB6/PB7 (+4.7 kΩ pull-ups each). Heat it → fan ramps on the 45→70 °C curve. No sensor? The MCU-temp fallback still ramps the fan — warm the whole board.
- (Optional) reset button — NRST↔GND momentary; press → clean reboot, reset-cause line in log.
- (Optional) battery-backup stand-in — vehicle 5 V → TP4056 IN; cell on TP4056 BAT; TP4056/cell
→ MT3608 → 5 V via 1N5819 OR-ing into the rail; NTC by the cell. Pull vehicle 5 V → watch backup
hold the rail and
BAT_SENSEtrack.
6. Wiring cheat-sheet (Blackpill side, v3)
PA0 ← BAT ÷2 (10k/10k) from 18650+ / pot PA6 → 220Ω → IRLZ44N gate; fan(−); 1N5819 ∥ fan
PA4 ← 5V ÷2 (10k/10k) from 5V rail PB10 ← fan tach, 10k pull-up → 3V3
PA5 ← IGN ÷2 (10k/10k) from pot/switch PB6/PB7 → I²C SCL/SDA (+4.7k each → 3V3)
PA1 → 1k → 2N3904 base; collector → IRF9540 PB0 → 330Ω → LED → GND
gate; 10k gate→5V; drain → switched 5V NRST ← reset button → GND (optional)
→ stack (LED+330Ω as a test load) PB12–15 → 330Ω → LED → GND (gauge; dark till FW)
GND / 5V / 3V3 rails common. Fan 5V from a SEPARATE 5V (2nd PSU / LM2596) — not the switched stack rail.
Proto↔PCB part map (don't get confused): the schematic uses SMD equivalents (Q1 AO3401A P-FET, Q5 MMBT3904, Q2 AO3400A fan FET). On the breadboard you use the through-hole stand-ins above (IRF9540N / 2N3904 / IRLZ44N) — same topology, same firmware.
7. After the proto works — next steps (not tomorrow)
- Firmware pass: gauge-LED driver (PB12–15 from
BAT_SENSE) +CHRG_ENcut-charge-when-hot logic. - KiCAD: cosmetic ERC cleanup → footprints → then PCB layout (DEV first, then build PROD per watchdog-production-schematic-delta).
- Pack Ah confirmed ~12 Ah (2026-06-30; "40 Ah" label was wrong) — sizes the LTC4040 charge current (≈C/5, ≤2.5 A).
Related
watchdog-electrical-design-state (CANONICAL) · watchdog-protoboard-bringup (Jun-22 shop
list) · watchdog-production-schematic-delta (PROD build spec) · kicad/hbox-watchdog-v3.kicad_sch