Leopoldo Rodríguez
2c3dffa232
Electrical/PCB: - LTC4040 Block B sized to the 12 Ah 1S4P pack (RPROG 825R -> 2.42 A ~ C/5, RS 8 mR -> 3.1 A input limit, PFI 4.60 V, backup 4.79 V, charge 4.00 V Li-ion via VSYS-referenced straps) + Block E cutoff (P11) + Block F PA4->VEH5V re-tap + Block H fail-safe Modo-B bypass (K1 normally-closed relay) + Block I NTC->PB1. - CARRIER-BOARD conversion: simpleRTK2B Pro on UNO-pattern female headers (MOD1; D0/D1=UART1, D2=RX2, D8=TX2, IOREF=3V3, 5V=SW_5V) + 4G NTRIP Master on on-board XBee socket (J7/J8; VCC=3V3_MODEM via new Block K MP1584 buck off SW_5V - the HP XBee socket is 3.3 V not 5 V). Board 120x100, placement + GND pour + DRC baselines. Custom symbols: LTC4040EUFD, AO4406A, SimpleRTK2B_Pro_Socket. - Fixed duplicated U2, stale no-connects, A4->A3 sheet; ERC 0 errors. Docs: - Canonical electrical-design-state + production delta (Block B values table, 5b/5c/5d/5e) + design/rationale/connections/BOM swept to the Jul-2 assumptions ledger (Conexiones-por-Bloque xlsx). - Guia de Conexion Protoboard: LaTeX source now maintained in-repo -> v2.1 PDF. - CircuiTikZ sheet + wiring Beamer: block 11 (NTC->PB1) + guinda ignition legend. - Client decks: Avance v1.1 (overclaims fixed) + RCA v1.1 (2-jul addendum). Repo hygiene: - .gitignore: live rtk-config (SIM/APN/NTRIP creds) now ignored and REMOVED from tracking (NOTE: rotate those credentials - they exist in prior commits); KiCad .bak/snapshots/.history, LaTeX intermediates, Office locks ignored+purged. - Removed rogue .history gitlinks that broke git status.
182 lines
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182 lines
10 KiB
Markdown
---
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title: Watchdog v3 — Proto Bench Bring-up & Build-Readiness (DEV board)
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tags: [project-drogheda, hardware, watchdog, prototype, breadboard, bring-up, readiness]
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project: Project Drogheda
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author: Helgen CTO
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date: 2026-06-24
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status: Active — tomorrow's bench guide (supersedes the procedure half of watchdog-protoboard-bringup.md for v3)
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---
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# Watchdog v3 — Proto Build Readiness & Bench Bring-up
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> **Scope:** breadboard the **DEV** watchdog on the existing Blackpill and prove the state
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> machine + sensing + load switch + fan/temp loop. **PCB layout is explicitly out of scope
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> for tomorrow** (do it after the proto works). Authority: [[watchdog-electrical-design-state]]
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> (canonical) · firmware `04-Source-Code/firmware/blackpillrtkcode_v2/` (v2.3) ·
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> schematic `kicad/hbox-watchdog-v3.kicad_sch`.
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---
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## 0. Verdict — are you ready to build? **Yes, with three caveats**
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You can build and bring up the **core watchdog** tomorrow. Nothing about the schematic or its
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ERC state blocks a breadboard build. The caveats are about *firmware coverage* and *scope
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discipline*, not readiness:
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1. **ERC "issues" are cosmetic — not a blocker.** File-based ERC on `hbox-watchdog-v3.kicad_sch`
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= **0 errors, 1 warning** (a `Q_NPN_BCE` symbol-cache mismatch). The ground net is unified
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(4 `GND` symbols, **0** placed `GNDREF` instances — the GNDREF you may see is just an orphaned
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library-cache entry, not a real second ground). None of this affects a breadboard. *(Clean it
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only before you go to PCB layout — see §2.)*
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2. **Two v3 sub-circuits aren't in firmware yet.** The flashed v2.3 build does **not** drive the
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4-LED battery gauge (PB12–15) or `CHRG_EN` (PA8). You can wire them, but they'll sit dark/idle
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until a firmware pass. Decide per §4 whether to build them now or defer.
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3. **v2.3 has never been hardware-validated.** Repo invariant: *bench-test before flash.*
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Tomorrow is its first real bench test — treat step 1 (flash + confirm telemetry) as the gate
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before trusting any later step.
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**The one thing I couldn't verify:** your exact purchased parts. The two proto BOM `.xlsx`
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(`watchdog-protoboard-BOM-3boards.xlsx`, `watchdog-LISTA-DE-COMPRAS-ES.xlsx`) are locked open in
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LibreOffice, so I rebuilt the checklist (§3) from the design docs. Close LibreOffice and I'll diff
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your actual list against it.
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---
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## 1. What you can prove tomorrow (firmware v2.3 supports it) vs. not
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| Sub-circuit | Pins | v2.3 firmware | Testable tomorrow? |
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|---|---|---|---|
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| Boot + `$PHLG`/STREAM telemetry (USB) | USB-C | ✅ `ENABLE_PHLG=1` | **Yes** — this is the gate |
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| Status LED (blink codes) | PB0 | ✅ | **Yes** |
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| **RTK-stack load switch** (the recovery heart) | PA1 → 2N3904 → IRF9540 | ✅ OFF-at-reset, MCU-asserts-ON | **Yes** |
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| Sense: battery / 5 V / ignition | PA0 / PA4 / PA5 | ✅ hysteresis + debounce | **Yes** |
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| Smart fan + tach | PA6 / PB10 | ✅ 25 kHz PWM, RPM, stall fault | **Yes (3-wire fan)** |
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| I²C temp/RH (closed-loop fan) | PB6/PB7 → SHT40 0x44 + TMP102 0x48 | ✅ + MCU-temp fallback | **Yes** (fallback works even with no sensor) |
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| 4-LED battery gauge | PB12–15 | ❌ not coded | wire OK, **stays dark** |
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| Temp-qualified charge cut (`CHRG_EN`) | PA8 | ❌ not coded | **No** (also LTC4040/PROD-only) |
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| Reset (hardware) | NRST | n/a (HW only) | **Yes** — button just works |
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**Fan note:** v2.3 reads a **3-wire** tach on PB10, so use a **3-wire 5 V fan** on the breadboard.
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(The "2-wire production fan" decision in the canonical doc is a *PCB* change; it doesn't apply to
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tomorrow's bench.)
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---
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## 2. The ERC situation (so you can stop worrying about it tonight)
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- **What ERC actually reports on the DEV file:** 0 errors, 1 warning (`Q_NPN_BCE` not found in
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lib `Device`). That warning means the symbol in your schematic is from the project cache and the
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installed `Device` lib has a slightly different name/pins — **purely a library-link cosmetic**.
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- **The GNDREF you may have seen:** there are **no placed GNDREF symbols** — only the leftover
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symbol *definition* in the embedded cache. Your ground is one net.
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- **Why it doesn't block the breadboard:** ERC validates a *netlist for fabrication*. On a
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breadboard you tie all grounds together physically; off-grid placement and a cache-name mismatch
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are invisible to copper you wire by hand.
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- **Before PCB layout (later), clean these in KiCAD:** Tools → *Update Symbols from Library*
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(clears the `Q_NPN_BCE` cache warning), then *Annotate* and re-run ERC; nudge any off-grid parts
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onto the 1.27 mm grid. **Don't let me edit the schematic while you have KiCAD open** (file-lock
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conflict) — close it first and I'll do the cleanup pass.
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---
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## 3. Pre-build parts checklist (reconstructed — confirm against your box)
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**Already have (don't buy):** Blackpill STM32F411, USB-C cable, 18650 + PowerBoost (or bench PSU),
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Mean Well SD-15B-05 (or bench 5 V), multimeter, a heat source (hair-dryer/cup of hot water) for the
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fan test. *F9P + 4G master are NOT needed for this bring-up.*
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**Core (the "brains" — must-have):**
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- [ ] Breadboard ×2 (830-pt) + jumper kits (M-M and M-F)
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- [ ] Resistor assortment incl. **330 Ω, 1 k, 4.7 k, 10 k, 100 k, 220 Ω**
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- [ ] **2N3904** ×3 (load-switch driver, TO-92)
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- [ ] **IRF9540 / IRF9540N** ×2 (P-FET high-side 5 V switch, TO-220)
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- [ ] LED ×5 (status) · **100 nF** ceramic ×10 (ADC filters/decoupling) · 100 µF ≥16 V ×4 (bulk)
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- [ ] **10 kΩ trim pot** ×2 + tactile button/slide switch ×2 (sweep VBAT / simulate ignition)
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- [ ] Male header strip 1×40 (to pin any bare module)
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**Thermal (v3 new):**
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- [ ] **3-wire** 5 V fan, 40–60 mm (3-wire so PB10 reads RPM — matches v2.3)
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- [ ] **IRLZ44N** ×2 (logic-level N-FET, fan low-side) — *plain IRF540/IRFZ44 won't turn on from
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3.3 V; if out of IRLZ44N use 2N2222A/TIP120 + 1 kΩ base*
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- [ ] **1N5819** ×3 (fan flyback; 1N4007 acceptable)
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- [ ] I²C **SHT40/SHT31** breakout (0x44) — *or* LM35/DS18B20 fallback (tell me which; I'll patch the read)
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**v3 additions (build only if you want them wired now — see §4):**
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- [ ] Reset: tactile button → NRST↔GND (+ optional 2-pin header for external reset)
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- [ ] Battery gauge: **4× LED + 4× 330 Ω** on PB12–15 *(will stay dark until firmware)*
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- [ ] Battery-backup stand-in: **TP4056** module + **MT3608** boost + **2× 1N5819** (OR-ing) +
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**10 kΩ NTC** *(reproduces charge / power-loss→backup / BAT_SENSE; the temp-qualified cutoff is
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LTC4040-only → firmware-validated, not on the proto)*
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---
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## 4. Decision before you sit down: how much of v3 to wire
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- **Recommended for tomorrow — build the testable core + thermal** (everything in §1 marked
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*Yes*). It proves the whole watchdog logic and the new fan/temp loop, which is the point of the
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proto. Add the **reset button** (free — works with no firmware).
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- **Gauge (PB12–15):** wire it if you want the layout/feel, but it won't light until I write the
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gauge driver. *Cheaper to add later.* — **I can write that firmware pass tonight/tomorrow if you
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want the LEDs live.**
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- **Battery-backup stand-in (TP4056+MT3608):** worth wiring if you specifically want to watch
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power-loss → backup hand-off and `BAT_SENSE` track the cell. Skip if tomorrow is about the
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watchdog logic only.
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---
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## 5. Bring-up sequence (run in order — each step gates the next)
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1. **USB only — flash & gate.** Compile v2.3 (Arduino IDE / STM32duino, board = Blackpill F411CE),
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flash via DFU (hold BOOT0). Open serial @115200. **Confirm `BOOT` / `COLS` / `TLM` lines and a
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`$PHLG,...*CS` every 30 s.** If this fails, stop and fix firmware before wiring anything.
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2. **Status LED** — PB0 → 330 Ω → LED → GND. Watch blink codes change with state.
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3. **Load switch (the recovery heart)** — PA1 → 1 kΩ → 2N3904 base; collector → IRF9540 gate;
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10 kΩ gate→5 V; drain → switched 5 V; put an LED+330 Ω on the switched output.
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**Confirm: OFF at reset, ON when PA1 asserts.** (Power-off is the safe state.)
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4. **Sense dividers** — 10 k/10 k ÷2 into **PA0** (battery via 18650/pot) and **PA4** (5 V rail);
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10 kΩ pot into **PA5** (ignition). Sweep and watch `veh`/`ign`/`vbat` flip in TLM with
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hysteresis (V5V_ON 4.20 / V5V_OFF 3.80; BAT_CRIT 3.40 / BAT_REC 3.70).
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5. **Fan + tach** — PA6 → 220 Ω → IRLZ44N gate; fan(−) at the drain; 1N5819 ∥ fan; 100 kΩ
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gate→GND. 3-wire tach → 10 kΩ pull-up to 3V3 → PB10. Watch it spin/ramp; **unplug fan →
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`fan_fault`** in telemetry.
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6. **I²C temp** — SHT40/TMP102 on PB6/PB7 (+4.7 kΩ pull-ups each). Heat it → fan ramps on the
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45→70 °C curve. *No sensor? The MCU-temp fallback still ramps the fan — warm the whole board.*
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7. **(Optional) reset button** — NRST↔GND momentary; press → clean reboot, reset-cause line in log.
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8. **(Optional) battery-backup stand-in** — vehicle 5 V → TP4056 IN; cell on TP4056 BAT; TP4056/cell
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→ MT3608 → 5 V via 1N5819 OR-ing into the rail; NTC by the cell. Pull vehicle 5 V → watch backup
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hold the rail and `BAT_SENSE` track.
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---
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## 6. Wiring cheat-sheet (Blackpill side, v3)
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```
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PA0 ← BAT ÷2 (10k/10k) from 18650+ / pot PA6 → 220Ω → IRLZ44N gate; fan(−); 1N5819 ∥ fan
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PA4 ← 5V ÷2 (10k/10k) from 5V rail PB10 ← fan tach, 10k pull-up → 3V3
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PA5 ← IGN ÷2 (10k/10k) from pot/switch PB6/PB7 → I²C SCL/SDA (+4.7k each → 3V3)
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PA1 → 1k → 2N3904 base; collector → IRF9540 PB0 → 330Ω → LED → GND
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gate; 10k gate→5V; drain → switched 5V NRST ← reset button → GND (optional)
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→ stack (LED+330Ω as a test load) PB12–15 → 330Ω → LED → GND (gauge; dark till FW)
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GND / 5V / 3V3 rails common. Fan 5V from a SEPARATE 5V (2nd PSU / LM2596) — not the switched stack rail.
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```
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> **Proto↔PCB part map (don't get confused):** the schematic uses SMD equivalents (Q1 **AO3401A**
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> P-FET, Q5 **MMBT3904**, Q2 **AO3400A** fan FET). On the breadboard you use the through-hole
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> stand-ins above (**IRF9540N / 2N3904 / IRLZ44N**) — same topology, same firmware.
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---
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## 7. After the proto works — next steps (not tomorrow)
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- Firmware pass: gauge-LED driver (PB12–15 from `BAT_SENSE`) + `CHRG_EN` cut-charge-when-hot logic.
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- KiCAD: cosmetic ERC cleanup → footprints → **then** PCB layout (DEV first, then build PROD per
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[[watchdog-production-schematic-delta]]).
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- Pack Ah confirmed **~12 Ah** (2026-06-30; "40 Ah" label was wrong) — sizes the LTC4040 charge current (≈C/5, ≤2.5 A).
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## Related
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[[watchdog-electrical-design-state]] (CANONICAL) · [[watchdog-protoboard-bringup]] (Jun-22 shop
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list) · [[watchdog-production-schematic-delta]] (PROD build spec) · `kicad/hbox-watchdog-v3.kicad_sch`
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