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4b8bdf4916
Drogheda/03-Architecture-Hardware/kicad
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Claude (Cowork) 4b8bdf4916 v6 T4c: ERC fixes - RF_IN retyped passive, PF18 PWR_FLAG on SIM_VDD 
Leo's ERC flagged exactly two errors after the T4 sync:
 1. U18 pin 2 RF_IN [Input] undriven - my hand-built ZED-F9P symbol typed the RF port as a
    logic input. RF ports are conventionally passive; retyped in Drogheda-sym AND the
    schematic's lib_symbols cache (1 substitution each, asserted). Its real connection
    arrives with the Block S bias tee in T6.
 2. U22 pin 1 VCC [Power input] undriven - SIM_VDD is fed by the modem's USIM1_VDD, whose
    EasyEDA pin type is not a power output. Idiomatic fix: PF18 PWR_FLAG on SIM_VDD,
    consistent with PF1-PF17.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YJ4eAB6zjQT49RVwpgfKdt
2026-08-25 22:27:42 +00:00
..
_archive-2026-07-07 sync: commit before registering as submodule 2026-07-08 14:58:40 -06:00
_stage auto-sync 2026-08-03 18:00 2026-08-03 18:00:18 -06:00
Drogheda-v6.3dshapes v6 T4: Blocks O+P+Q+R - A7670SA LTE island complete in the schematic (33/33 net checks pass) 2026-08-25 22:20:39 +00:00
Drogheda-v6.pretty v6 T4: Blocks O+P+Q+R - A7670SA LTE island complete in the schematic (33/33 net checks pass) 2026-08-25 22:20:39 +00:00
Drogheda.pretty 1.1 Phase A: schematic blocks M/N/O (SC16IS752+RS485+RS232, W5500+MagJack+3V3_ETH buck, PCF8574+RGB), gauge->expander frees SPI2, depop P3/P13/H3 2026-07-29 02:17:05 +00:00
exports-informe-20260807 auto-sync 2026-08-07 18:00 2026-08-07 18:00:15 -06:00
logs auto-sync 2026-08-12 18:00 2026-08-12 18:00:16 -06:00
production auto-sync 2026-08-22 18:00 2026-08-22 18:00:10 -06:00
~hbox-watchdog-v5.kicad_pro.lck auto-sync 2026-08-20 18:00 2026-08-20 18:00:15 -06:00
Drogheda-sym.kicad_sym v6 T4c: ERC fixes - RF_IN retyped passive, PF18 PWR_FLAG on SIM_VDD 2026-08-25 22:27:42 +00:00
Drogheda-v6.kicad_sym v6 T4: Blocks O+P+Q+R - A7670SA LTE island complete in the schematic (33/33 net checks pass) 2026-08-25 22:20:39 +00:00
fabrication-toolkit-options.json auto-sync 2026-08-22 18:00 2026-08-22 18:00:10 -06:00
fp-lib-table v6 T3: Block N - ZED-F9P (U18) + low-noise LDO (U21) placed and wired 2026-08-24 23:25:44 +00:00
HBOX-v3-PROD.step auto-sync 2026-07-07 18:00 2026-07-07 18:00:12 -06:00
HBOX-v3.2-PROD.step auto-sync 2026-07-30 18:00 2026-07-30 18:00:16 -06:00
HBOX-v3.2-PROD.stl auto-sync 2026-07-30 18:00 2026-07-30 18:00:16 -06:00
HBOX-v4.0-PROD.stl auto-sync 2026-08-13 18:10 2026-08-13 18:10:25 -06:00
hbox-watchdog-v3-PROD.kicad_dru auto-sync 2026-07-06 18:00 2026-07-06 18:00:09 -06:00
hbox-watchdog-v3-PROD.kicad_pcb HBOX v4: project renamed hbox-watchdog-v4 (199 sch + 113 pcb refs); v3-PROD files restored to as-fabricated as the frozen EinarBoard 1.0 record; ERC endpoint_off_grid muted on v4 2026-07-29 03:34:46 +00:00
hbox-watchdog-v3-PROD.kicad_pro HBOX v4: project renamed hbox-watchdog-v4 (199 sch + 113 pcb refs); v3-PROD files restored to as-fabricated as the frozen EinarBoard 1.0 record; ERC endpoint_off_grid muted on v4 2026-07-29 03:34:46 +00:00
hbox-watchdog-v3-PROD.kicad_sch HBOX v4: project renamed hbox-watchdog-v4 (199 sch + 113 pcb refs); v3-PROD files restored to as-fabricated as the frozen EinarBoard 1.0 record; ERC endpoint_off_grid muted on v4 2026-07-29 03:34:46 +00:00
hbox-watchdog-v3.kicad_pcb add objectivity rule across all projects 2026-06-24 00:44:04 -06:00
hbox-watchdog-v3.kicad_prl add objectivity rule across all projects 2026-06-24 00:44:04 -06:00
hbox-watchdog-v3.kicad_pro auto-sync 2026-06-24 18:00 2026-06-24 18:00:06 -06:00
hbox-watchdog-v3.kicad_sch auto-sync 2026-07-06 18:00 2026-07-06 18:00:09 -06:00
hbox-watchdog-v4-c6.dsn auto-sync 2026-07-30 18:00 2026-07-30 18:00:16 -06:00
hbox-watchdog-v4-PROD.dsn 1.1 Phase C7: Freerouting session imported file-level (1773 seg / 232 via, 135 nets) 2026-07-30 07:29:29 +00:00
hbox-watchdog-v4-PROD.rules 1.1 Phase C7: Freerouting session imported file-level (1773 seg / 232 via, 135 nets) 2026-07-30 07:29:29 +00:00
hbox-watchdog-v4-PROD.ses 1.1 Phase C7: Freerouting session imported file-level (1773 seg / 232 via, 135 nets) 2026-07-30 07:29:29 +00:00
hbox-watchdog-v4.kicad_dru C14: netclass-scoped HV24 rule at 0.5 mm + copper fixes to satisfy it 2026-08-01 05:45:07 +00:00
hbox-watchdog-v4.kicad_pcb auto-sync 2026-08-01 18:00 2026-08-01 18:00:16 -06:00
hbox-watchdog-v4.kicad_pro 1.1 Phase C7: Freerouting session imported file-level (1773 seg / 232 via, 135 nets) 2026-07-30 07:29:29 +00:00
hbox-watchdog-v4.kicad_sch 1.1 Phase C10: production footprint corrections + LCSC + silk rev (PRE-FAB GATE) 2026-07-30 23:21:58 +00:00
hbox-watchdog-v5.kicad_dru auto-sync 2026-08-22 18:00 2026-08-22 18:00:10 -06:00
hbox-watchdog-v5.kicad_pcb v5.5+: Leo's copper touch-up - GND stitching +4 seg/+2 vias, /SYS5V -2 seg, zones refilled (45 -> 48 filled polys) 2026-08-24 23:02:13 +00:00
hbox-watchdog-v5.kicad_pro v5.5: zone refills complete (F.Cu 35 / B.Cu 7 / In1 2 / In2 1 filled polys) - checkpoint before the v6 fork 2026-08-24 22:46:23 +00:00
hbox-watchdog-v5.kicad_sch auto-sync 2026-08-22 18:00 2026-08-22 18:00:10 -06:00
hbox-watchdog-v6.kicad_dru v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6 2026-08-24 22:51:21 +00:00
hbox-watchdog-v6.kicad_pcb v6 T3 CLOSED: Leo's Update-PCB-from-Schematic - Block N on the board; -04B pin table verified 2026-08-25 14:49:16 +00:00
hbox-watchdog-v6.kicad_pro v6 T0-T2: fork hbox-watchdog-v6 from v5.5; delete MOD1/J7/J8/SW4G1; K1 pin10 PA9 -> PC6 2026-08-24 22:51:21 +00:00
hbox-watchdog-v6.kicad_sch v6 T4c: ERC fixes - RF_IN retyped passive, PF18 PWR_FLAG on SIM_VDD 2026-08-25 22:27:42 +00:00
sym-lib-table v6 T3: Block N - ZED-F9P (U18) + low-noise LDO (U21) placed and wired 2026-08-24 23:25:44 +00:00
v4-bom.xls auto-sync 2026-08-22 18:00 2026-08-22 18:00:10 -06:00
v4-drc.rpt auto-sync 2026-08-01 18:00 2026-08-01 18:00:16 -06:00
v5-ERC.rpt auto-sync 2026-08-12 18:00 2026-08-12 18:00:16 -06:00